2 * Copyright (C) 2012 Avionic Design GmbH
3 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
10 #include <linux/bitops.h>
11 #include <linux/host1x.h>
12 #include <linux/idr.h>
13 #include <linux/iommu.h>
15 #include <drm/drm_atomic.h>
16 #include <drm/drm_atomic_helper.h>
21 #define DRIVER_NAME "tegra"
22 #define DRIVER_DESC "NVIDIA Tegra graphics"
23 #define DRIVER_DATE "20120330"
24 #define DRIVER_MAJOR 0
25 #define DRIVER_MINOR 0
26 #define DRIVER_PATCHLEVEL 0
28 #define CARVEOUT_SZ SZ_64M
29 #define CDMA_GATHER_FETCHES_MAX_NB 16383
31 struct tegra_drm_file
{
36 static void tegra_atomic_schedule(struct tegra_drm
*tegra
,
37 struct drm_atomic_state
*state
)
39 tegra
->commit
.state
= state
;
40 schedule_work(&tegra
->commit
.work
);
43 static void tegra_atomic_complete(struct tegra_drm
*tegra
,
44 struct drm_atomic_state
*state
)
46 struct drm_device
*drm
= tegra
->drm
;
49 * Everything below can be run asynchronously without the need to grab
50 * any modeset locks at all under one condition: It must be guaranteed
51 * that the asynchronous work has either been cancelled (if the driver
52 * supports it, which at least requires that the framebuffers get
53 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
54 * before the new state gets committed on the software side with
55 * drm_atomic_helper_swap_state().
57 * This scheme allows new atomic state updates to be prepared and
58 * checked in parallel to the asynchronous completion of the previous
59 * update. Which is important since compositors need to figure out the
60 * composition of the next frame right after having submitted the
64 drm_atomic_helper_commit_modeset_disables(drm
, state
);
65 drm_atomic_helper_commit_modeset_enables(drm
, state
);
66 drm_atomic_helper_commit_planes(drm
, state
,
67 DRM_PLANE_COMMIT_ACTIVE_ONLY
);
69 drm_atomic_helper_wait_for_vblanks(drm
, state
);
71 drm_atomic_helper_cleanup_planes(drm
, state
);
72 drm_atomic_state_put(state
);
75 static void tegra_atomic_work(struct work_struct
*work
)
77 struct tegra_drm
*tegra
= container_of(work
, struct tegra_drm
,
80 tegra_atomic_complete(tegra
, tegra
->commit
.state
);
83 static int tegra_atomic_commit(struct drm_device
*drm
,
84 struct drm_atomic_state
*state
, bool nonblock
)
86 struct tegra_drm
*tegra
= drm
->dev_private
;
89 err
= drm_atomic_helper_prepare_planes(drm
, state
);
93 /* serialize outstanding nonblocking commits */
94 mutex_lock(&tegra
->commit
.lock
);
95 flush_work(&tegra
->commit
.work
);
98 * This is the point of no return - everything below never fails except
99 * when the hw goes bonghits. Which means we can commit the new state on
100 * the software side now.
103 drm_atomic_helper_swap_state(state
, true);
105 drm_atomic_state_get(state
);
107 tegra_atomic_schedule(tegra
, state
);
109 tegra_atomic_complete(tegra
, state
);
111 mutex_unlock(&tegra
->commit
.lock
);
115 static const struct drm_mode_config_funcs tegra_drm_mode_funcs
= {
116 .fb_create
= tegra_fb_create
,
117 #ifdef CONFIG_DRM_FBDEV_EMULATION
118 .output_poll_changed
= tegra_fb_output_poll_changed
,
120 .atomic_check
= drm_atomic_helper_check
,
121 .atomic_commit
= tegra_atomic_commit
,
124 static int tegra_drm_load(struct drm_device
*drm
, unsigned long flags
)
126 struct host1x_device
*device
= to_host1x_device(drm
->dev
);
127 struct tegra_drm
*tegra
;
130 tegra
= kzalloc(sizeof(*tegra
), GFP_KERNEL
);
134 if (iommu_present(&platform_bus_type
)) {
135 u64 carveout_start
, carveout_end
, gem_start
, gem_end
;
136 struct iommu_domain_geometry
*geometry
;
139 tegra
->domain
= iommu_domain_alloc(&platform_bus_type
);
140 if (!tegra
->domain
) {
145 geometry
= &tegra
->domain
->geometry
;
146 gem_start
= geometry
->aperture_start
;
147 gem_end
= geometry
->aperture_end
- CARVEOUT_SZ
;
148 carveout_start
= gem_end
+ 1;
149 carveout_end
= geometry
->aperture_end
;
151 order
= __ffs(tegra
->domain
->pgsize_bitmap
);
152 init_iova_domain(&tegra
->carveout
.domain
, 1UL << order
,
153 carveout_start
>> order
,
154 carveout_end
>> order
);
156 tegra
->carveout
.shift
= iova_shift(&tegra
->carveout
.domain
);
157 tegra
->carveout
.limit
= carveout_end
>> tegra
->carveout
.shift
;
159 drm_mm_init(&tegra
->mm
, gem_start
, gem_end
- gem_start
+ 1);
160 mutex_init(&tegra
->mm_lock
);
162 DRM_DEBUG("IOMMU apertures:\n");
163 DRM_DEBUG(" GEM: %#llx-%#llx\n", gem_start
, gem_end
);
164 DRM_DEBUG(" Carveout: %#llx-%#llx\n", carveout_start
,
168 mutex_init(&tegra
->clients_lock
);
169 INIT_LIST_HEAD(&tegra
->clients
);
171 mutex_init(&tegra
->commit
.lock
);
172 INIT_WORK(&tegra
->commit
.work
, tegra_atomic_work
);
174 drm
->dev_private
= tegra
;
177 drm_mode_config_init(drm
);
179 drm
->mode_config
.min_width
= 0;
180 drm
->mode_config
.min_height
= 0;
182 drm
->mode_config
.max_width
= 4096;
183 drm
->mode_config
.max_height
= 4096;
185 drm
->mode_config
.allow_fb_modifiers
= true;
187 drm
->mode_config
.funcs
= &tegra_drm_mode_funcs
;
189 err
= tegra_drm_fb_prepare(drm
);
193 drm_kms_helper_poll_init(drm
);
195 err
= host1x_device_init(device
);
200 * We don't use the drm_irq_install() helpers provided by the DRM
201 * core, so we need to set this manually in order to allow the
202 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
204 drm
->irq_enabled
= true;
206 /* syncpoints are used for full 32-bit hardware VBLANK counters */
207 drm
->max_vblank_count
= 0xffffffff;
209 err
= drm_vblank_init(drm
, drm
->mode_config
.num_crtc
);
213 drm_mode_config_reset(drm
);
215 err
= tegra_drm_fb_init(drm
);
222 drm_vblank_cleanup(drm
);
224 host1x_device_exit(device
);
226 drm_kms_helper_poll_fini(drm
);
227 tegra_drm_fb_free(drm
);
229 drm_mode_config_cleanup(drm
);
232 iommu_domain_free(tegra
->domain
);
233 drm_mm_takedown(&tegra
->mm
);
234 mutex_destroy(&tegra
->mm_lock
);
235 put_iova_domain(&tegra
->carveout
.domain
);
242 static void tegra_drm_unload(struct drm_device
*drm
)
244 struct host1x_device
*device
= to_host1x_device(drm
->dev
);
245 struct tegra_drm
*tegra
= drm
->dev_private
;
248 drm_kms_helper_poll_fini(drm
);
249 tegra_drm_fb_exit(drm
);
250 drm_mode_config_cleanup(drm
);
251 drm_vblank_cleanup(drm
);
253 err
= host1x_device_exit(device
);
258 iommu_domain_free(tegra
->domain
);
259 drm_mm_takedown(&tegra
->mm
);
260 mutex_destroy(&tegra
->mm_lock
);
261 put_iova_domain(&tegra
->carveout
.domain
);
267 static int tegra_drm_open(struct drm_device
*drm
, struct drm_file
*filp
)
269 struct tegra_drm_file
*fpriv
;
271 fpriv
= kzalloc(sizeof(*fpriv
), GFP_KERNEL
);
275 idr_init(&fpriv
->contexts
);
276 mutex_init(&fpriv
->lock
);
277 filp
->driver_priv
= fpriv
;
282 static void tegra_drm_context_free(struct tegra_drm_context
*context
)
284 context
->client
->ops
->close_channel(context
);
288 static void tegra_drm_lastclose(struct drm_device
*drm
)
290 #ifdef CONFIG_DRM_FBDEV_EMULATION
291 struct tegra_drm
*tegra
= drm
->dev_private
;
293 tegra_fbdev_restore_mode(tegra
->fbdev
);
297 static struct host1x_bo
*
298 host1x_bo_lookup(struct drm_file
*file
, u32 handle
)
300 struct drm_gem_object
*gem
;
303 gem
= drm_gem_object_lookup(file
, handle
);
307 drm_gem_object_unreference_unlocked(gem
);
309 bo
= to_tegra_bo(gem
);
313 static int host1x_reloc_copy_from_user(struct host1x_reloc
*dest
,
314 struct drm_tegra_reloc __user
*src
,
315 struct drm_device
*drm
,
316 struct drm_file
*file
)
321 err
= get_user(cmdbuf
, &src
->cmdbuf
.handle
);
325 err
= get_user(dest
->cmdbuf
.offset
, &src
->cmdbuf
.offset
);
329 err
= get_user(target
, &src
->target
.handle
);
333 err
= get_user(dest
->target
.offset
, &src
->target
.offset
);
337 err
= get_user(dest
->shift
, &src
->shift
);
341 dest
->cmdbuf
.bo
= host1x_bo_lookup(file
, cmdbuf
);
342 if (!dest
->cmdbuf
.bo
)
345 dest
->target
.bo
= host1x_bo_lookup(file
, target
);
346 if (!dest
->target
.bo
)
352 static int host1x_waitchk_copy_from_user(struct host1x_waitchk
*dest
,
353 struct drm_tegra_waitchk __user
*src
,
354 struct drm_file
*file
)
359 err
= get_user(cmdbuf
, &src
->handle
);
363 err
= get_user(dest
->offset
, &src
->offset
);
367 err
= get_user(dest
->syncpt_id
, &src
->syncpt
);
371 err
= get_user(dest
->thresh
, &src
->thresh
);
375 dest
->bo
= host1x_bo_lookup(file
, cmdbuf
);
382 int tegra_drm_submit(struct tegra_drm_context
*context
,
383 struct drm_tegra_submit
*args
, struct drm_device
*drm
,
384 struct drm_file
*file
)
386 unsigned int num_cmdbufs
= args
->num_cmdbufs
;
387 unsigned int num_relocs
= args
->num_relocs
;
388 unsigned int num_waitchks
= args
->num_waitchks
;
389 struct drm_tegra_cmdbuf __user
*cmdbufs
=
390 (void __user
*)(uintptr_t)args
->cmdbufs
;
391 struct drm_tegra_reloc __user
*relocs
=
392 (void __user
*)(uintptr_t)args
->relocs
;
393 struct drm_tegra_waitchk __user
*waitchks
=
394 (void __user
*)(uintptr_t)args
->waitchks
;
395 struct drm_tegra_syncpt syncpt
;
396 struct host1x
*host1x
= dev_get_drvdata(drm
->dev
->parent
);
397 struct host1x_syncpt
*sp
;
398 struct host1x_job
*job
;
401 /* We don't yet support other than one syncpt_incr struct per submit */
402 if (args
->num_syncpts
!= 1)
405 /* We don't yet support waitchks */
406 if (args
->num_waitchks
!= 0)
409 job
= host1x_job_alloc(context
->channel
, args
->num_cmdbufs
,
410 args
->num_relocs
, args
->num_waitchks
);
414 job
->num_relocs
= args
->num_relocs
;
415 job
->num_waitchk
= args
->num_waitchks
;
416 job
->client
= (u32
)args
->context
;
417 job
->class = context
->client
->base
.class;
418 job
->serialize
= true;
420 while (num_cmdbufs
) {
421 struct drm_tegra_cmdbuf cmdbuf
;
422 struct host1x_bo
*bo
;
423 struct tegra_bo
*obj
;
426 if (copy_from_user(&cmdbuf
, cmdbufs
, sizeof(cmdbuf
))) {
432 * The maximum number of CDMA gather fetches is 16383, a higher
433 * value means the words count is malformed.
435 if (cmdbuf
.words
> CDMA_GATHER_FETCHES_MAX_NB
) {
440 bo
= host1x_bo_lookup(file
, cmdbuf
.handle
);
446 offset
= (u64
)cmdbuf
.offset
+ (u64
)cmdbuf
.words
* sizeof(u32
);
447 obj
= host1x_to_tegra_bo(bo
);
450 * Gather buffer base address must be 4-bytes aligned,
451 * unaligned offset is malformed and cause commands stream
452 * corruption on the buffer address relocation.
454 if (offset
& 3 || offset
>= obj
->gem
.size
) {
459 host1x_job_add_gather(job
, bo
, cmdbuf
.words
, cmdbuf
.offset
);
464 /* copy and resolve relocations from submit */
465 while (num_relocs
--) {
466 struct host1x_reloc
*reloc
;
467 struct tegra_bo
*obj
;
469 err
= host1x_reloc_copy_from_user(&job
->relocarray
[num_relocs
],
470 &relocs
[num_relocs
], drm
,
475 reloc
= &job
->relocarray
[num_relocs
];
476 obj
= host1x_to_tegra_bo(reloc
->cmdbuf
.bo
);
479 * The unaligned cmdbuf offset will cause an unaligned write
480 * during of the relocations patching, corrupting the commands
483 if (reloc
->cmdbuf
.offset
& 3 ||
484 reloc
->cmdbuf
.offset
>= obj
->gem
.size
) {
489 obj
= host1x_to_tegra_bo(reloc
->target
.bo
);
491 if (reloc
->target
.offset
>= obj
->gem
.size
) {
497 /* copy and resolve waitchks from submit */
498 while (num_waitchks
--) {
499 struct host1x_waitchk
*wait
= &job
->waitchk
[num_waitchks
];
500 struct tegra_bo
*obj
;
502 err
= host1x_waitchk_copy_from_user(wait
,
503 &waitchks
[num_waitchks
],
508 obj
= host1x_to_tegra_bo(wait
->bo
);
511 * The unaligned offset will cause an unaligned write during
512 * of the waitchks patching, corrupting the commands stream.
514 if (wait
->offset
& 3 ||
515 wait
->offset
>= obj
->gem
.size
) {
521 if (copy_from_user(&syncpt
, (void __user
*)(uintptr_t)args
->syncpts
,
527 /* check whether syncpoint ID is valid */
528 sp
= host1x_syncpt_get(host1x
, syncpt
.id
);
534 job
->is_addr_reg
= context
->client
->ops
->is_addr_reg
;
535 job
->is_valid_class
= context
->client
->ops
->is_valid_class
;
536 job
->syncpt_incrs
= syncpt
.incrs
;
537 job
->syncpt_id
= syncpt
.id
;
538 job
->timeout
= 10000;
540 if (args
->timeout
&& args
->timeout
< 10000)
541 job
->timeout
= args
->timeout
;
543 err
= host1x_job_pin(job
, context
->client
->base
.dev
);
547 err
= host1x_job_submit(job
);
551 args
->fence
= job
->syncpt_end
;
557 host1x_job_unpin(job
);
564 #ifdef CONFIG_DRM_TEGRA_STAGING
565 static int tegra_gem_create(struct drm_device
*drm
, void *data
,
566 struct drm_file
*file
)
568 struct drm_tegra_gem_create
*args
= data
;
571 bo
= tegra_bo_create_with_handle(file
, drm
, args
->size
, args
->flags
,
579 static int tegra_gem_mmap(struct drm_device
*drm
, void *data
,
580 struct drm_file
*file
)
582 struct drm_tegra_gem_mmap
*args
= data
;
583 struct drm_gem_object
*gem
;
586 gem
= drm_gem_object_lookup(file
, args
->handle
);
590 bo
= to_tegra_bo(gem
);
592 args
->offset
= drm_vma_node_offset_addr(&bo
->gem
.vma_node
);
594 drm_gem_object_unreference_unlocked(gem
);
599 static int tegra_syncpt_read(struct drm_device
*drm
, void *data
,
600 struct drm_file
*file
)
602 struct host1x
*host
= dev_get_drvdata(drm
->dev
->parent
);
603 struct drm_tegra_syncpt_read
*args
= data
;
604 struct host1x_syncpt
*sp
;
606 sp
= host1x_syncpt_get(host
, args
->id
);
610 args
->value
= host1x_syncpt_read_min(sp
);
614 static int tegra_syncpt_incr(struct drm_device
*drm
, void *data
,
615 struct drm_file
*file
)
617 struct host1x
*host1x
= dev_get_drvdata(drm
->dev
->parent
);
618 struct drm_tegra_syncpt_incr
*args
= data
;
619 struct host1x_syncpt
*sp
;
621 sp
= host1x_syncpt_get(host1x
, args
->id
);
625 return host1x_syncpt_incr(sp
);
628 static int tegra_syncpt_wait(struct drm_device
*drm
, void *data
,
629 struct drm_file
*file
)
631 struct host1x
*host1x
= dev_get_drvdata(drm
->dev
->parent
);
632 struct drm_tegra_syncpt_wait
*args
= data
;
633 struct host1x_syncpt
*sp
;
635 sp
= host1x_syncpt_get(host1x
, args
->id
);
639 return host1x_syncpt_wait(sp
, args
->thresh
, args
->timeout
,
643 static int tegra_client_open(struct tegra_drm_file
*fpriv
,
644 struct tegra_drm_client
*client
,
645 struct tegra_drm_context
*context
)
649 err
= client
->ops
->open_channel(client
, context
);
653 err
= idr_alloc(&fpriv
->contexts
, context
, 1, 0, GFP_KERNEL
);
655 client
->ops
->close_channel(context
);
659 context
->client
= client
;
665 static int tegra_open_channel(struct drm_device
*drm
, void *data
,
666 struct drm_file
*file
)
668 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
669 struct tegra_drm
*tegra
= drm
->dev_private
;
670 struct drm_tegra_open_channel
*args
= data
;
671 struct tegra_drm_context
*context
;
672 struct tegra_drm_client
*client
;
675 context
= kzalloc(sizeof(*context
), GFP_KERNEL
);
679 mutex_lock(&fpriv
->lock
);
681 list_for_each_entry(client
, &tegra
->clients
, list
)
682 if (client
->base
.class == args
->client
) {
683 err
= tegra_client_open(fpriv
, client
, context
);
687 args
->context
= context
->id
;
694 mutex_unlock(&fpriv
->lock
);
698 static int tegra_close_channel(struct drm_device
*drm
, void *data
,
699 struct drm_file
*file
)
701 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
702 struct drm_tegra_close_channel
*args
= data
;
703 struct tegra_drm_context
*context
;
706 mutex_lock(&fpriv
->lock
);
708 context
= idr_find(&fpriv
->contexts
, args
->context
);
714 idr_remove(&fpriv
->contexts
, context
->id
);
715 tegra_drm_context_free(context
);
718 mutex_unlock(&fpriv
->lock
);
722 static int tegra_get_syncpt(struct drm_device
*drm
, void *data
,
723 struct drm_file
*file
)
725 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
726 struct drm_tegra_get_syncpt
*args
= data
;
727 struct tegra_drm_context
*context
;
728 struct host1x_syncpt
*syncpt
;
731 mutex_lock(&fpriv
->lock
);
733 context
= idr_find(&fpriv
->contexts
, args
->context
);
739 if (args
->index
>= context
->client
->base
.num_syncpts
) {
744 syncpt
= context
->client
->base
.syncpts
[args
->index
];
745 args
->id
= host1x_syncpt_id(syncpt
);
748 mutex_unlock(&fpriv
->lock
);
752 static int tegra_submit(struct drm_device
*drm
, void *data
,
753 struct drm_file
*file
)
755 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
756 struct drm_tegra_submit
*args
= data
;
757 struct tegra_drm_context
*context
;
760 mutex_lock(&fpriv
->lock
);
762 context
= idr_find(&fpriv
->contexts
, args
->context
);
768 err
= context
->client
->ops
->submit(context
, args
, drm
, file
);
771 mutex_unlock(&fpriv
->lock
);
775 static int tegra_get_syncpt_base(struct drm_device
*drm
, void *data
,
776 struct drm_file
*file
)
778 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
779 struct drm_tegra_get_syncpt_base
*args
= data
;
780 struct tegra_drm_context
*context
;
781 struct host1x_syncpt_base
*base
;
782 struct host1x_syncpt
*syncpt
;
785 mutex_lock(&fpriv
->lock
);
787 context
= idr_find(&fpriv
->contexts
, args
->context
);
793 if (args
->syncpt
>= context
->client
->base
.num_syncpts
) {
798 syncpt
= context
->client
->base
.syncpts
[args
->syncpt
];
800 base
= host1x_syncpt_get_base(syncpt
);
806 args
->id
= host1x_syncpt_base_id(base
);
809 mutex_unlock(&fpriv
->lock
);
813 static int tegra_gem_set_tiling(struct drm_device
*drm
, void *data
,
814 struct drm_file
*file
)
816 struct drm_tegra_gem_set_tiling
*args
= data
;
817 enum tegra_bo_tiling_mode mode
;
818 struct drm_gem_object
*gem
;
819 unsigned long value
= 0;
822 switch (args
->mode
) {
823 case DRM_TEGRA_GEM_TILING_MODE_PITCH
:
824 mode
= TEGRA_BO_TILING_MODE_PITCH
;
826 if (args
->value
!= 0)
831 case DRM_TEGRA_GEM_TILING_MODE_TILED
:
832 mode
= TEGRA_BO_TILING_MODE_TILED
;
834 if (args
->value
!= 0)
839 case DRM_TEGRA_GEM_TILING_MODE_BLOCK
:
840 mode
= TEGRA_BO_TILING_MODE_BLOCK
;
852 gem
= drm_gem_object_lookup(file
, args
->handle
);
856 bo
= to_tegra_bo(gem
);
858 bo
->tiling
.mode
= mode
;
859 bo
->tiling
.value
= value
;
861 drm_gem_object_unreference_unlocked(gem
);
866 static int tegra_gem_get_tiling(struct drm_device
*drm
, void *data
,
867 struct drm_file
*file
)
869 struct drm_tegra_gem_get_tiling
*args
= data
;
870 struct drm_gem_object
*gem
;
874 gem
= drm_gem_object_lookup(file
, args
->handle
);
878 bo
= to_tegra_bo(gem
);
880 switch (bo
->tiling
.mode
) {
881 case TEGRA_BO_TILING_MODE_PITCH
:
882 args
->mode
= DRM_TEGRA_GEM_TILING_MODE_PITCH
;
886 case TEGRA_BO_TILING_MODE_TILED
:
887 args
->mode
= DRM_TEGRA_GEM_TILING_MODE_TILED
;
891 case TEGRA_BO_TILING_MODE_BLOCK
:
892 args
->mode
= DRM_TEGRA_GEM_TILING_MODE_BLOCK
;
893 args
->value
= bo
->tiling
.value
;
901 drm_gem_object_unreference_unlocked(gem
);
906 static int tegra_gem_set_flags(struct drm_device
*drm
, void *data
,
907 struct drm_file
*file
)
909 struct drm_tegra_gem_set_flags
*args
= data
;
910 struct drm_gem_object
*gem
;
913 if (args
->flags
& ~DRM_TEGRA_GEM_FLAGS
)
916 gem
= drm_gem_object_lookup(file
, args
->handle
);
920 bo
= to_tegra_bo(gem
);
923 if (args
->flags
& DRM_TEGRA_GEM_BOTTOM_UP
)
924 bo
->flags
|= TEGRA_BO_BOTTOM_UP
;
926 drm_gem_object_unreference_unlocked(gem
);
931 static int tegra_gem_get_flags(struct drm_device
*drm
, void *data
,
932 struct drm_file
*file
)
934 struct drm_tegra_gem_get_flags
*args
= data
;
935 struct drm_gem_object
*gem
;
938 gem
= drm_gem_object_lookup(file
, args
->handle
);
942 bo
= to_tegra_bo(gem
);
945 if (bo
->flags
& TEGRA_BO_BOTTOM_UP
)
946 args
->flags
|= DRM_TEGRA_GEM_BOTTOM_UP
;
948 drm_gem_object_unreference_unlocked(gem
);
954 static const struct drm_ioctl_desc tegra_drm_ioctls
[] = {
955 #ifdef CONFIG_DRM_TEGRA_STAGING
956 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE
, tegra_gem_create
, 0),
957 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP
, tegra_gem_mmap
, 0),
958 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ
, tegra_syncpt_read
, 0),
959 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR
, tegra_syncpt_incr
, 0),
960 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT
, tegra_syncpt_wait
, 0),
961 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL
, tegra_open_channel
, 0),
962 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL
, tegra_close_channel
, 0),
963 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT
, tegra_get_syncpt
, 0),
964 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT
, tegra_submit
, 0),
965 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE
, tegra_get_syncpt_base
, 0),
966 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING
, tegra_gem_set_tiling
, 0),
967 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING
, tegra_gem_get_tiling
, 0),
968 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS
, tegra_gem_set_flags
, 0),
969 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS
, tegra_gem_get_flags
, 0),
973 static const struct file_operations tegra_drm_fops
= {
974 .owner
= THIS_MODULE
,
976 .release
= drm_release
,
977 .unlocked_ioctl
= drm_ioctl
,
978 .mmap
= tegra_drm_mmap
,
981 .compat_ioctl
= drm_compat_ioctl
,
982 .llseek
= noop_llseek
,
985 static int tegra_drm_context_cleanup(int id
, void *p
, void *data
)
987 struct tegra_drm_context
*context
= p
;
989 tegra_drm_context_free(context
);
994 static void tegra_drm_postclose(struct drm_device
*drm
, struct drm_file
*file
)
996 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
998 mutex_lock(&fpriv
->lock
);
999 idr_for_each(&fpriv
->contexts
, tegra_drm_context_cleanup
, NULL
);
1000 mutex_unlock(&fpriv
->lock
);
1002 idr_destroy(&fpriv
->contexts
);
1003 mutex_destroy(&fpriv
->lock
);
1007 #ifdef CONFIG_DEBUG_FS
1008 static int tegra_debugfs_framebuffers(struct seq_file
*s
, void *data
)
1010 struct drm_info_node
*node
= (struct drm_info_node
*)s
->private;
1011 struct drm_device
*drm
= node
->minor
->dev
;
1012 struct drm_framebuffer
*fb
;
1014 mutex_lock(&drm
->mode_config
.fb_lock
);
1016 list_for_each_entry(fb
, &drm
->mode_config
.fb_list
, head
) {
1017 seq_printf(s
, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
1018 fb
->base
.id
, fb
->width
, fb
->height
,
1020 fb
->format
->cpp
[0] * 8,
1021 drm_framebuffer_read_refcount(fb
));
1024 mutex_unlock(&drm
->mode_config
.fb_lock
);
1029 static int tegra_debugfs_iova(struct seq_file
*s
, void *data
)
1031 struct drm_info_node
*node
= (struct drm_info_node
*)s
->private;
1032 struct drm_device
*drm
= node
->minor
->dev
;
1033 struct tegra_drm
*tegra
= drm
->dev_private
;
1034 struct drm_printer p
= drm_seq_file_printer(s
);
1036 mutex_lock(&tegra
->mm_lock
);
1037 drm_mm_print(&tegra
->mm
, &p
);
1038 mutex_unlock(&tegra
->mm_lock
);
1043 static struct drm_info_list tegra_debugfs_list
[] = {
1044 { "framebuffers", tegra_debugfs_framebuffers
, 0 },
1045 { "iova", tegra_debugfs_iova
, 0 },
1048 static int tegra_debugfs_init(struct drm_minor
*minor
)
1050 return drm_debugfs_create_files(tegra_debugfs_list
,
1051 ARRAY_SIZE(tegra_debugfs_list
),
1052 minor
->debugfs_root
, minor
);
1056 static struct drm_driver tegra_drm_driver
= {
1057 .driver_features
= DRIVER_MODESET
| DRIVER_GEM
| DRIVER_PRIME
|
1059 .load
= tegra_drm_load
,
1060 .unload
= tegra_drm_unload
,
1061 .open
= tegra_drm_open
,
1062 .postclose
= tegra_drm_postclose
,
1063 .lastclose
= tegra_drm_lastclose
,
1065 #if defined(CONFIG_DEBUG_FS)
1066 .debugfs_init
= tegra_debugfs_init
,
1069 .gem_free_object_unlocked
= tegra_bo_free_object
,
1070 .gem_vm_ops
= &tegra_bo_vm_ops
,
1072 .prime_handle_to_fd
= drm_gem_prime_handle_to_fd
,
1073 .prime_fd_to_handle
= drm_gem_prime_fd_to_handle
,
1074 .gem_prime_export
= tegra_gem_prime_export
,
1075 .gem_prime_import
= tegra_gem_prime_import
,
1077 .dumb_create
= tegra_bo_dumb_create
,
1078 .dumb_map_offset
= tegra_bo_dumb_map_offset
,
1079 .dumb_destroy
= drm_gem_dumb_destroy
,
1081 .ioctls
= tegra_drm_ioctls
,
1082 .num_ioctls
= ARRAY_SIZE(tegra_drm_ioctls
),
1083 .fops
= &tegra_drm_fops
,
1085 .name
= DRIVER_NAME
,
1086 .desc
= DRIVER_DESC
,
1087 .date
= DRIVER_DATE
,
1088 .major
= DRIVER_MAJOR
,
1089 .minor
= DRIVER_MINOR
,
1090 .patchlevel
= DRIVER_PATCHLEVEL
,
1093 int tegra_drm_register_client(struct tegra_drm
*tegra
,
1094 struct tegra_drm_client
*client
)
1096 mutex_lock(&tegra
->clients_lock
);
1097 list_add_tail(&client
->list
, &tegra
->clients
);
1098 mutex_unlock(&tegra
->clients_lock
);
1103 int tegra_drm_unregister_client(struct tegra_drm
*tegra
,
1104 struct tegra_drm_client
*client
)
1106 mutex_lock(&tegra
->clients_lock
);
1107 list_del_init(&client
->list
);
1108 mutex_unlock(&tegra
->clients_lock
);
1113 void *tegra_drm_alloc(struct tegra_drm
*tegra
, size_t size
,
1122 size
= iova_align(&tegra
->carveout
.domain
, size
);
1124 size
= PAGE_ALIGN(size
);
1126 gfp
= GFP_KERNEL
| __GFP_ZERO
;
1127 if (!tegra
->domain
) {
1129 * Many units only support 32-bit addresses, even on 64-bit
1130 * SoCs. If there is no IOMMU to translate into a 32-bit IO
1131 * virtual address space, force allocations to be in the
1132 * lower 32-bit range.
1137 virt
= (void *)__get_free_pages(gfp
, get_order(size
));
1139 return ERR_PTR(-ENOMEM
);
1141 if (!tegra
->domain
) {
1143 * If IOMMU is disabled, devices address physical memory
1146 *dma
= virt_to_phys(virt
);
1150 alloc
= alloc_iova(&tegra
->carveout
.domain
,
1151 size
>> tegra
->carveout
.shift
,
1152 tegra
->carveout
.limit
, true);
1158 *dma
= iova_dma_addr(&tegra
->carveout
.domain
, alloc
);
1159 err
= iommu_map(tegra
->domain
, *dma
, virt_to_phys(virt
),
1160 size
, IOMMU_READ
| IOMMU_WRITE
);
1167 __free_iova(&tegra
->carveout
.domain
, alloc
);
1169 free_pages((unsigned long)virt
, get_order(size
));
1171 return ERR_PTR(err
);
1174 void tegra_drm_free(struct tegra_drm
*tegra
, size_t size
, void *virt
,
1178 size
= iova_align(&tegra
->carveout
.domain
, size
);
1180 size
= PAGE_ALIGN(size
);
1182 if (tegra
->domain
) {
1183 iommu_unmap(tegra
->domain
, dma
, size
);
1184 free_iova(&tegra
->carveout
.domain
,
1185 iova_pfn(&tegra
->carveout
.domain
, dma
));
1188 free_pages((unsigned long)virt
, get_order(size
));
1191 static int host1x_drm_probe(struct host1x_device
*dev
)
1193 struct drm_driver
*driver
= &tegra_drm_driver
;
1194 struct drm_device
*drm
;
1197 drm
= drm_dev_alloc(driver
, &dev
->dev
);
1199 return PTR_ERR(drm
);
1201 dev_set_drvdata(&dev
->dev
, drm
);
1203 err
= drm_dev_register(drm
, 0);
1214 static int host1x_drm_remove(struct host1x_device
*dev
)
1216 struct drm_device
*drm
= dev_get_drvdata(&dev
->dev
);
1218 drm_dev_unregister(drm
);
1224 #ifdef CONFIG_PM_SLEEP
1225 static int host1x_drm_suspend(struct device
*dev
)
1227 struct drm_device
*drm
= dev_get_drvdata(dev
);
1228 struct tegra_drm
*tegra
= drm
->dev_private
;
1230 drm_kms_helper_poll_disable(drm
);
1231 tegra_drm_fb_suspend(drm
);
1233 tegra
->state
= drm_atomic_helper_suspend(drm
);
1234 if (IS_ERR(tegra
->state
)) {
1235 tegra_drm_fb_resume(drm
);
1236 drm_kms_helper_poll_enable(drm
);
1237 return PTR_ERR(tegra
->state
);
1243 static int host1x_drm_resume(struct device
*dev
)
1245 struct drm_device
*drm
= dev_get_drvdata(dev
);
1246 struct tegra_drm
*tegra
= drm
->dev_private
;
1248 drm_atomic_helper_resume(drm
, tegra
->state
);
1249 tegra_drm_fb_resume(drm
);
1250 drm_kms_helper_poll_enable(drm
);
1256 static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops
, host1x_drm_suspend
,
1259 static const struct of_device_id host1x_drm_subdevs
[] = {
1260 { .compatible
= "nvidia,tegra20-dc", },
1261 { .compatible
= "nvidia,tegra20-hdmi", },
1262 { .compatible
= "nvidia,tegra20-gr2d", },
1263 { .compatible
= "nvidia,tegra20-gr3d", },
1264 { .compatible
= "nvidia,tegra30-dc", },
1265 { .compatible
= "nvidia,tegra30-hdmi", },
1266 { .compatible
= "nvidia,tegra30-gr2d", },
1267 { .compatible
= "nvidia,tegra30-gr3d", },
1268 { .compatible
= "nvidia,tegra114-dsi", },
1269 { .compatible
= "nvidia,tegra114-hdmi", },
1270 { .compatible
= "nvidia,tegra114-gr3d", },
1271 { .compatible
= "nvidia,tegra124-dc", },
1272 { .compatible
= "nvidia,tegra124-sor", },
1273 { .compatible
= "nvidia,tegra124-hdmi", },
1274 { .compatible
= "nvidia,tegra124-dsi", },
1275 { .compatible
= "nvidia,tegra124-vic", },
1276 { .compatible
= "nvidia,tegra132-dsi", },
1277 { .compatible
= "nvidia,tegra210-dc", },
1278 { .compatible
= "nvidia,tegra210-dsi", },
1279 { .compatible
= "nvidia,tegra210-sor", },
1280 { .compatible
= "nvidia,tegra210-sor1", },
1281 { .compatible
= "nvidia,tegra210-vic", },
1285 static struct host1x_driver host1x_drm_driver
= {
1288 .pm
= &host1x_drm_pm_ops
,
1290 .probe
= host1x_drm_probe
,
1291 .remove
= host1x_drm_remove
,
1292 .subdevs
= host1x_drm_subdevs
,
1295 static struct platform_driver
* const drivers
[] = {
1299 &tegra_dpaux_driver
,
1306 static int __init
host1x_drm_init(void)
1310 err
= host1x_driver_register(&host1x_drm_driver
);
1314 err
= platform_register_drivers(drivers
, ARRAY_SIZE(drivers
));
1316 goto unregister_host1x
;
1321 host1x_driver_unregister(&host1x_drm_driver
);
1324 module_init(host1x_drm_init
);
1326 static void __exit
host1x_drm_exit(void)
1328 platform_unregister_drivers(drivers
, ARRAY_SIZE(drivers
));
1329 host1x_driver_unregister(&host1x_drm_driver
);
1331 module_exit(host1x_drm_exit
);
1333 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
1334 MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1335 MODULE_LICENSE("GPL v2");