| blob | a9a8027a6c0eaa748541282448f41b9eec834d6c |
1 /*
2 * linux/arch/x86_64/entry.S
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
7 *
8 * entry.S contains the system-call and fault low-level handling routines.
9 *
10 * Some of this is documented in Documentation/x86/entry_64.txt
11 *
12 * A note on terminology:
13 * - iret frame: Architecture defined interrupt frame from SS to RIP
14 * at the top of the kernel process stack.
15 *
16 * Some macro usage:
17 * - ENTRY/END: Define functions in the symbol table.
18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
19 * - idtentry: Define exception entry points.
20 */
21 #include <linux/linkage.h>
22 #include <asm/segment.h>
23 #include <asm/cache.h>
24 #include <asm/errno.h>
25 #include "calling.h"
26 #include <asm/asm-offsets.h>
27 #include <asm/msr.h>
28 #include <asm/unistd.h>
29 #include <asm/thread_info.h>
30 #include <asm/hw_irq.h>
31 #include <asm/page_types.h>
32 #include <asm/irqflags.h>
33 #include <asm/paravirt.h>
34 #include <asm/percpu.h>
35 #include <asm/asm.h>
36 #include <asm/smap.h>
37 #include <asm/pgtable_types.h>
38 #include <asm/export.h>
39 #include <linux/err.h>
41 .code64
42 .section .entry.text, "ax"
44 #ifdef CONFIG_PARAVIRT
45 ENTRY(native_usergs_sysret64)
46 swapgs
47 sysretq
48 ENDPROC(native_usergs_sysret64)
49 #endif /* CONFIG_PARAVIRT */
51 .macro TRACE_IRQS_IRETQ
52 #ifdef CONFIG_TRACE_IRQFLAGS
53 bt $9, EFLAGS(%rsp) /* interrupts off? */
54 jnc 1f
55 TRACE_IRQS_ON
56 1:
57 #endif
58 .endm
60 /*
61 * When dynamic function tracer is enabled it will add a breakpoint
62 * to all locations that it is about to modify, sync CPUs, update
63 * all the code, sync CPUs, then remove the breakpoints. In this time
64 * if lockdep is enabled, it might jump back into the debug handler
65 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
66 *
67 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
68 * make sure the stack pointer does not get reset back to the top
69 * of the debug stack, and instead just reuses the current stack.
70 */
71 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
73 .macro TRACE_IRQS_OFF_DEBUG
74 call debug_stack_set_zero
75 TRACE_IRQS_OFF
76 call debug_stack_reset
77 .endm
79 .macro TRACE_IRQS_ON_DEBUG
80 call debug_stack_set_zero
81 TRACE_IRQS_ON
82 call debug_stack_reset
83 .endm
85 .macro TRACE_IRQS_IRETQ_DEBUG
86 bt $9, EFLAGS(%rsp) /* interrupts off? */
87 jnc 1f
88 TRACE_IRQS_ON_DEBUG
89 1:
90 .endm
92 #else
93 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
94 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
95 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
96 #endif
98 /*
99 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
100 *
101 * This is the only entry point used for 64-bit system calls. The
102 * hardware interface is reasonably well designed and the register to
103 * argument mapping Linux uses fits well with the registers that are
104 * available when SYSCALL is used.
105 *
106 * SYSCALL instructions can be found inlined in libc implementations as
107 * well as some other programs and libraries. There are also a handful
108 * of SYSCALL instructions in the vDSO used, for example, as a
109 * clock_gettimeofday fallback.
110 *
111 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
112 * then loads new ss, cs, and rip from previously programmed MSRs.
113 * rflags gets masked by a value from another MSR (so CLD and CLAC
114 * are not needed). SYSCALL does not save anything on the stack
115 * and does not change rsp.
116 *
117 * Registers on entry:
118 * rax system call number
119 * rcx return address
120 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
121 * rdi arg0
122 * rsi arg1
123 * rdx arg2
124 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
125 * r8 arg4
126 * r9 arg5
127 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
128 *
129 * Only called from user space.
130 *
131 * When user can change pt_regs->foo always force IRET. That is because
132 * it deals with uncanonical addresses better. SYSRET has trouble
133 * with them due to bugs in both AMD and Intel CPUs.
134 */
136 ENTRY(entry_SYSCALL_64)
137 /*
138 * Interrupts are off on entry.
139 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
140 * it is too small to ever cause noticeable irq latency.
141 */
142 SWAPGS_UNSAFE_STACK
143 /*
144 * A hypervisor implementation might want to use a label
145 * after the swapgs, so that it can do the swapgs
146 * for the guest and jump here on syscall.
147 */
148 GLOBAL(entry_SYSCALL_64_after_swapgs)
150 movq %rsp, PER_CPU_VAR(rsp_scratch)
151 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
153 TRACE_IRQS_OFF
155 /* Construct struct pt_regs on stack */
156 pushq $__USER_DS /* pt_regs->ss */
157 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
158 pushq %r11 /* pt_regs->flags */
159 pushq $__USER_CS /* pt_regs->cs */
160 pushq %rcx /* pt_regs->ip */
161 pushq %rax /* pt_regs->orig_ax */
162 pushq %rdi /* pt_regs->di */
163 pushq %rsi /* pt_regs->si */
164 pushq %rdx /* pt_regs->dx */
165 pushq %rcx /* pt_regs->cx */
166 pushq $-ENOSYS /* pt_regs->ax */
167 pushq %r8 /* pt_regs->r8 */
168 pushq %r9 /* pt_regs->r9 */
169 pushq %r10 /* pt_regs->r10 */
170 pushq %r11 /* pt_regs->r11 */
171 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
173 /*
174 * If we need to do entry work or if we guess we'll need to do
175 * exit work, go straight to the slow path.
176 */
177 movq PER_CPU_VAR(current_task), %r11
178 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
179 jnz entry_SYSCALL64_slow_path
181 entry_SYSCALL_64_fastpath:
182 /*
183 * Easy case: enable interrupts and issue the syscall. If the syscall
184 * needs pt_regs, we'll call a stub that disables interrupts again
185 * and jumps to the slow path.
186 */
187 TRACE_IRQS_ON
188 ENABLE_INTERRUPTS(CLBR_NONE)
189 #if __SYSCALL_MASK == ~0
190 cmpq $__NR_syscall_max, %rax
191 #else
192 andl $__SYSCALL_MASK, %eax
193 cmpl $__NR_syscall_max, %eax
194 #endif
195 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
196 movq %r10, %rcx
198 /*
199 * This call instruction is handled specially in stub_ptregs_64.
200 * It might end up jumping to the slow path. If it jumps, RAX
201 * and all argument registers are clobbered.
202 */
203 call *sys_call_table(, %rax, 8)
204 .Lentry_SYSCALL_64_after_fastpath_call:
206 movq %rax, RAX(%rsp)
207 1:
209 /*
210 * If we get here, then we know that pt_regs is clean for SYSRET64.
211 * If we see that no exit work is required (which we are required
212 * to check with IRQs off), then we can go straight to SYSRET64.
213 */
214 DISABLE_INTERRUPTS(CLBR_ANY)
215 TRACE_IRQS_OFF
216 movq PER_CPU_VAR(current_task), %r11
217 testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
218 jnz 1f
220 LOCKDEP_SYS_EXIT
221 TRACE_IRQS_ON /* user mode is traced as IRQs on */
222 movq RIP(%rsp), %rcx
223 movq EFLAGS(%rsp), %r11
224 RESTORE_C_REGS_EXCEPT_RCX_R11
225 movq RSP(%rsp), %rsp
226 USERGS_SYSRET64
228 1:
229 /*
230 * The fast path looked good when we started, but something changed
231 * along the way and we need to switch to the slow path. Calling
232 * raise(3) will trigger this, for example. IRQs are off.
233 */
234 TRACE_IRQS_ON
235 ENABLE_INTERRUPTS(CLBR_ANY)
236 SAVE_EXTRA_REGS
237 movq %rsp, %rdi
238 call syscall_return_slowpath /* returns with IRQs disabled */
239 jmp return_from_SYSCALL_64
241 entry_SYSCALL64_slow_path:
242 /* IRQs are off. */
243 SAVE_EXTRA_REGS
244 movq %rsp, %rdi
245 call do_syscall_64 /* returns with IRQs disabled */
247 return_from_SYSCALL_64:
248 RESTORE_EXTRA_REGS
249 TRACE_IRQS_IRETQ /* we're about to change IF */
251 /*
252 * Try to use SYSRET instead of IRET if we're returning to
253 * a completely clean 64-bit userspace context.
254 */
255 movq RCX(%rsp), %rcx
256 movq RIP(%rsp), %r11
257 cmpq %rcx, %r11 /* RCX == RIP */
258 jne opportunistic_sysret_failed
260 /*
261 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
262 * in kernel space. This essentially lets the user take over
263 * the kernel, since userspace controls RSP.
264 *
265 * If width of "canonical tail" ever becomes variable, this will need
266 * to be updated to remain correct on both old and new CPUs.
267 *
268 * Change top bits to match most significant bit (47th or 56th bit
269 * depending on paging mode) in the address.
270 */
271 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
272 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
274 /* If this changed %rcx, it was not canonical */
275 cmpq %rcx, %r11
276 jne opportunistic_sysret_failed
278 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
279 jne opportunistic_sysret_failed
281 movq R11(%rsp), %r11
282 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
283 jne opportunistic_sysret_failed
285 /*
286 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot
287 * restore RF properly. If the slowpath sets it for whatever reason, we
288 * need to restore it correctly.
289 *
290 * SYSRET can restore TF, but unlike IRET, restoring TF results in a
291 * trap from userspace immediately after SYSRET. This would cause an
292 * infinite loop whenever #DB happens with register state that satisfies
293 * the opportunistic SYSRET conditions. For example, single-stepping
294 * this user code:
295 *
296 * movq $stuck_here, %rcx
297 * pushfq
298 * popq %r11
299 * stuck_here:
300 *
301 * would never get past 'stuck_here'.
302 */
303 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
304 jnz opportunistic_sysret_failed
306 /* nothing to check for RSP */
308 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
309 jne opportunistic_sysret_failed
311 /*
312 * We win! This label is here just for ease of understanding
313 * perf profiles. Nothing jumps here.
314 */
315 syscall_return_via_sysret:
316 /* rcx and r11 are already restored (see code above) */
317 RESTORE_C_REGS_EXCEPT_RCX_R11
318 movq RSP(%rsp), %rsp
319 USERGS_SYSRET64
321 opportunistic_sysret_failed:
322 SWAPGS
323 jmp restore_c_regs_and_iret
324 END(entry_SYSCALL_64)
326 ENTRY(stub_ptregs_64)
327 /*
328 * Syscalls marked as needing ptregs land here.
329 * If we are on the fast path, we need to save the extra regs,
330 * which we achieve by trying again on the slow path. If we are on
331 * the slow path, the extra regs are already saved.
332 *
333 * RAX stores a pointer to the C function implementing the syscall.
334 * IRQs are on.
335 */
336 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
337 jne 1f
339 /*
340 * Called from fast path -- disable IRQs again, pop return address
341 * and jump to slow path
342 */
343 DISABLE_INTERRUPTS(CLBR_ANY)
344 TRACE_IRQS_OFF
345 popq %rax
346 jmp entry_SYSCALL64_slow_path
348 1:
349 jmp *%rax /* Called from C */
350 END(stub_ptregs_64)
352 .macro ptregs_stub func
353 ENTRY(ptregs_\func)
354 leaq \func(%rip), %rax
355 jmp stub_ptregs_64
356 END(ptregs_\func)
357 .endm
359 /* Instantiate ptregs_stub for each ptregs-using syscall */
360 #define __SYSCALL_64_QUAL_(sym)
361 #define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
362 #define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
363 #include <asm/syscalls_64.h>
365 /*
366 * %rdi: prev task
367 * %rsi: next task
368 */
369 ENTRY(__switch_to_asm)
370 /*
371 * Save callee-saved registers
372 * This must match the order in inactive_task_frame
373 */
374 pushq %rbp
375 pushq %rbx
376 pushq %r12
377 pushq %r13
378 pushq %r14
379 pushq %r15
381 /* switch stack */
382 movq %rsp, TASK_threadsp(%rdi)
383 movq TASK_threadsp(%rsi), %rsp
385 #ifdef CONFIG_CC_STACKPROTECTOR
386 movq TASK_stack_canary(%rsi), %rbx
387 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset
388 #endif
390 /* restore callee-saved registers */
391 popq %r15
392 popq %r14
393 popq %r13
394 popq %r12
395 popq %rbx
396 popq %rbp
398 jmp __switch_to
399 END(__switch_to_asm)
401 /*
402 * A newly forked process directly context switches into this address.
403 *
404 * rax: prev task we switched from
405 * rbx: kernel thread func (NULL for user thread)
406 * r12: kernel thread arg
407 */
408 ENTRY(ret_from_fork)
409 movq %rax, %rdi
410 call schedule_tail /* rdi: 'prev' task parameter */
412 testq %rbx, %rbx /* from kernel_thread? */
413 jnz 1f /* kernel threads are uncommon */
415 2:
416 movq %rsp, %rdi
417 call syscall_return_slowpath /* returns with IRQs disabled */
418 TRACE_IRQS_ON /* user mode is traced as IRQS on */
419 SWAPGS
420 jmp restore_regs_and_iret
422 1:
423 /* kernel thread */
424 movq %r12, %rdi
425 call *%rbx
426 /*
427 * A kernel thread is allowed to return here after successfully
428 * calling do_execve(). Exit to userspace to complete the execve()
429 * syscall.
430 */
431 movq $0, RAX(%rsp)
432 jmp 2b
433 END(ret_from_fork)
435 /*
436 * Build the entry stubs with some assembler magic.
437 * We pack 1 stub into every 8-byte block.
438 */
439 .align 8
440 ENTRY(irq_entries_start)
441 vector=FIRST_EXTERNAL_VECTOR
442 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
443 pushq $(~vector+0x80) /* Note: always in signed byte range */
444 vector=vector+1
445 jmp common_interrupt
446 .align 8
447 .endr
448 END(irq_entries_start)
450 /*
451 * Interrupt entry/exit.
452 *
453 * Interrupt entry points save only callee clobbered registers in fast path.
454 *
455 * Entry runs with interrupts off.
456 */
458 /* 0(%rsp): ~(interrupt number) */
459 .macro interrupt func
460 cld
461 ALLOC_PT_GPREGS_ON_STACK
462 SAVE_C_REGS
463 SAVE_EXTRA_REGS
464 ENCODE_FRAME_POINTER
466 testb $3, CS(%rsp)
467 jz 1f
469 /*
470 * IRQ from user mode. Switch to kernel gsbase and inform context
471 * tracking that we're in kernel mode.
472 */
473 SWAPGS
475 /*
476 * We need to tell lockdep that IRQs are off. We can't do this until
477 * we fix gsbase, and we should do it before enter_from_user_mode
478 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
479 * the simplest way to handle it is to just call it twice if
480 * we enter from user mode. There's no reason to optimize this since
481 * TRACE_IRQS_OFF is a no-op if lockdep is off.
482 */
483 TRACE_IRQS_OFF
485 CALL_enter_from_user_mode
487 1:
488 /*
489 * Save previous stack pointer, optionally switch to interrupt stack.
490 * irq_count is used to check if a CPU is already on an interrupt stack
491 * or not. While this is essentially redundant with preempt_count it is
492 * a little cheaper to use a separate counter in the PDA (short of
493 * moving irq_enter into assembly, which would be too much work)
494 */
495 movq %rsp, %rdi
496 incl PER_CPU_VAR(irq_count)
497 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
498 pushq %rdi
499 /* We entered an interrupt context - irqs are off: */
500 TRACE_IRQS_OFF
502 call \func /* rdi points to pt_regs */
503 .endm
505 /*
506 * The interrupt stubs push (~vector+0x80) onto the stack and
507 * then jump to common_interrupt.
508 */
509 .p2align CONFIG_X86_L1_CACHE_SHIFT
510 common_interrupt:
511 ASM_CLAC
512 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
513 interrupt do_IRQ
514 /* 0(%rsp): old RSP */
515 ret_from_intr:
516 DISABLE_INTERRUPTS(CLBR_ANY)
517 TRACE_IRQS_OFF
518 decl PER_CPU_VAR(irq_count)
520 /* Restore saved previous stack */
521 popq %rsp
523 testb $3, CS(%rsp)
524 jz retint_kernel
526 /* Interrupt came from user space */
527 GLOBAL(retint_user)
528 mov %rsp,%rdi
529 call prepare_exit_to_usermode
530 TRACE_IRQS_IRETQ
531 SWAPGS
532 jmp restore_regs_and_iret
534 /* Returning to kernel space */
535 retint_kernel:
536 #ifdef CONFIG_PREEMPT
537 /* Interrupts are off */
538 /* Check if we need preemption */
539 bt $9, EFLAGS(%rsp) /* were interrupts off? */
540 jnc 1f
541 0: cmpl $0, PER_CPU_VAR(__preempt_count)
542 jnz 1f
543 call preempt_schedule_irq
544 jmp 0b
545 1:
546 #endif
547 /*
548 * The iretq could re-enable interrupts:
549 */
550 TRACE_IRQS_IRETQ
552 /*
553 * At this label, code paths which return to kernel and to user,
554 * which come from interrupts/exception and from syscalls, merge.
555 */
556 GLOBAL(restore_regs_and_iret)
557 RESTORE_EXTRA_REGS
558 restore_c_regs_and_iret:
559 RESTORE_C_REGS
560 REMOVE_PT_GPREGS_FROM_STACK 8
561 INTERRUPT_RETURN
563 ENTRY(native_iret)
564 /*
565 * Are we returning to a stack segment from the LDT? Note: in
566 * 64-bit mode SS:RSP on the exception stack is always valid.
567 */
568 #ifdef CONFIG_X86_ESPFIX64
569 testb $4, (SS-RIP)(%rsp)
570 jnz native_irq_return_ldt
571 #endif
573 .global native_irq_return_iret
574 native_irq_return_iret:
575 /*
576 * This may fault. Non-paranoid faults on return to userspace are
577 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
578 * Double-faults due to espfix64 are handled in do_double_fault.
579 * Other faults here are fatal.
580 */
581 iretq
583 #ifdef CONFIG_X86_ESPFIX64
584 native_irq_return_ldt:
585 /*
586 * We are running with user GSBASE. All GPRs contain their user
587 * values. We have a percpu ESPFIX stack that is eight slots
588 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom
589 * of the ESPFIX stack.
590 *
591 * We clobber RAX and RDI in this code. We stash RDI on the
592 * normal stack and RAX on the ESPFIX stack.
593 *
594 * The ESPFIX stack layout we set up looks like this:
595 *
596 * --- top of ESPFIX stack ---
597 * SS
598 * RSP
599 * RFLAGS
600 * CS
601 * RIP <-- RSP points here when we're done
602 * RAX <-- espfix_waddr points here
603 * --- bottom of ESPFIX stack ---
604 */
606 pushq %rdi /* Stash user RDI */
607 SWAPGS
608 movq PER_CPU_VAR(espfix_waddr), %rdi
609 movq %rax, (0*8)(%rdi) /* user RAX */
610 movq (1*8)(%rsp), %rax /* user RIP */
611 movq %rax, (1*8)(%rdi)
612 movq (2*8)(%rsp), %rax /* user CS */
613 movq %rax, (2*8)(%rdi)
614 movq (3*8)(%rsp), %rax /* user RFLAGS */
615 movq %rax, (3*8)(%rdi)
616 movq (5*8)(%rsp), %rax /* user SS */
617 movq %rax, (5*8)(%rdi)
618 movq (4*8)(%rsp), %rax /* user RSP */
619 movq %rax, (4*8)(%rdi)
620 /* Now RAX == RSP. */
622 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */
623 popq %rdi /* Restore user RDI */
625 /*
626 * espfix_stack[31:16] == 0. The page tables are set up such that
627 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
628 * espfix_waddr for any X. That is, there are 65536 RO aliases of
629 * the same page. Set up RSP so that RSP[31:16] contains the
630 * respective 16 bits of the /userspace/ RSP and RSP nonetheless
631 * still points to an RO alias of the ESPFIX stack.
632 */
633 orq PER_CPU_VAR(espfix_stack), %rax
634 SWAPGS
635 movq %rax, %rsp
637 /*
638 * At this point, we cannot write to the stack any more, but we can
639 * still read.
640 */
641 popq %rax /* Restore user RAX */
643 /*
644 * RSP now points to an ordinary IRET frame, except that the page
645 * is read-only and RSP[31:16] are preloaded with the userspace
646 * values. We can now IRET back to userspace.
647 */
648 jmp native_irq_return_iret
649 #endif
650 END(common_interrupt)
652 /*
653 * APIC interrupts.
654 */
655 .macro apicinterrupt3 num sym do_sym
656 ENTRY(\sym)
657 ASM_CLAC
658 pushq $~(\num)
659 .Lcommon_\sym:
660 interrupt \do_sym
661 jmp ret_from_intr
662 END(\sym)
663 .endm
665 #ifdef CONFIG_TRACING
666 #define trace(sym) trace_##sym
667 #define smp_trace(sym) smp_trace_##sym
669 .macro trace_apicinterrupt num sym
670 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
671 .endm
672 #else
673 .macro trace_apicinterrupt num sym do_sym
674 .endm
675 #endif
677 /* Make sure APIC interrupt handlers end up in the irqentry section: */
678 #if defined(CONFIG_FUNCTION_GRAPH_TRACER) || defined(CONFIG_KASAN)
679 # define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
680 # define POP_SECTION_IRQENTRY .popsection
681 #else
682 # define PUSH_SECTION_IRQENTRY
683 # define POP_SECTION_IRQENTRY
684 #endif
686 .macro apicinterrupt num sym do_sym
687 PUSH_SECTION_IRQENTRY
688 apicinterrupt3 \num \sym \do_sym
689 trace_apicinterrupt \num \sym
690 POP_SECTION_IRQENTRY
691 .endm
693 #ifdef CONFIG_SMP
694 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
695 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
696 #endif
698 #ifdef CONFIG_X86_UV
699 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
700 #endif
702 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
703 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
705 #ifdef CONFIG_HAVE_KVM
706 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
707 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
708 #endif
710 #ifdef CONFIG_X86_MCE_THRESHOLD
711 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
712 #endif
714 #ifdef CONFIG_X86_MCE_AMD
715 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
716 #endif
718 #ifdef CONFIG_X86_THERMAL_VECTOR
719 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
720 #endif
722 #ifdef CONFIG_SMP
723 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
724 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
725 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
726 #endif
728 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
729 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
731 #ifdef CONFIG_IRQ_WORK
732 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
733 #endif
735 /*
736 * Exception entry points.
737 */
738 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
740 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
741 ENTRY(\sym)
742 /* Sanity check */
743 .if \shift_ist != -1 && \paranoid == 0
744 .error "using shift_ist requires paranoid=1"
745 .endif
747 ASM_CLAC
748 PARAVIRT_ADJUST_EXCEPTION_FRAME
750 .ifeq \has_error_code
751 pushq $-1 /* ORIG_RAX: no syscall to restart */
752 .endif
754 ALLOC_PT_GPREGS_ON_STACK
756 .if \paranoid
757 .if \paranoid == 1
758 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
759 jnz 1f
760 .endif
761 call paranoid_entry
762 .else
763 call error_entry
764 .endif
765 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
767 .if \paranoid
768 .if \shift_ist != -1
769 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
770 .else
771 TRACE_IRQS_OFF
772 .endif
773 .endif
775 movq %rsp, %rdi /* pt_regs pointer */
777 .if \has_error_code
778 movq ORIG_RAX(%rsp), %rsi /* get error code */
779 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
780 .else
781 xorl %esi, %esi /* no error code */
782 .endif
784 .if \shift_ist != -1
785 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
786 .endif
788 call \do_sym
790 .if \shift_ist != -1
791 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
792 .endif
794 /* these procedures expect "no swapgs" flag in ebx */
795 .if \paranoid
796 jmp paranoid_exit
797 .else
798 jmp error_exit
799 .endif
801 .if \paranoid == 1
802 /*
803 * Paranoid entry from userspace. Switch stacks and treat it
804 * as a normal entry. This means that paranoid handlers
805 * run in real process context if user_mode(regs).
806 */
807 1:
808 call error_entry
811 movq %rsp, %rdi /* pt_regs pointer */
812 call sync_regs
813 movq %rax, %rsp /* switch stack */
815 movq %rsp, %rdi /* pt_regs pointer */
817 .if \has_error_code
818 movq ORIG_RAX(%rsp), %rsi /* get error code */
819 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
820 .else
821 xorl %esi, %esi /* no error code */
822 .endif
824 call \do_sym
826 jmp error_exit /* %ebx: no swapgs flag */
827 .endif
828 END(\sym)
829 .endm
831 #ifdef CONFIG_TRACING
832 .macro trace_idtentry sym do_sym has_error_code:req
833 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
834 idtentry \sym \do_sym has_error_code=\has_error_code
835 .endm
836 #else
837 .macro trace_idtentry sym do_sym has_error_code:req
838 idtentry \sym \do_sym has_error_code=\has_error_code
839 .endm
840 #endif
842 idtentry divide_error do_divide_error has_error_code=0
843 idtentry overflow do_overflow has_error_code=0
844 idtentry bounds do_bounds has_error_code=0
845 idtentry invalid_op do_invalid_op has_error_code=0
846 idtentry device_not_available do_device_not_available has_error_code=0
847 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
848 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
849 idtentry invalid_TSS do_invalid_TSS has_error_code=1
850 idtentry segment_not_present do_segment_not_present has_error_code=1
851 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
852 idtentry coprocessor_error do_coprocessor_error has_error_code=0
853 idtentry alignment_check do_alignment_check has_error_code=1
854 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
857 /*
858 * Reload gs selector with exception handling
859 * edi: new selector
860 */
861 ENTRY(native_load_gs_index)
862 pushfq
863 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
864 SWAPGS
865 .Lgs_change:
866 movl %edi, %gs
867 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
868 SWAPGS
869 popfq
870 ret
871 END(native_load_gs_index)
872 EXPORT_SYMBOL(native_load_gs_index)
874 _ASM_EXTABLE(.Lgs_change, bad_gs)
875 .section .fixup, "ax"
876 /* running with kernelgs */
877 bad_gs:
878 SWAPGS /* switch back to user gs */
879 .macro ZAP_GS
880 /* This can't be a string because the preprocessor needs to see it. */
881 movl $__USER_DS, %eax
882 movl %eax, %gs
883 .endm
884 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
885 xorl %eax, %eax
886 movl %eax, %gs
887 jmp 2b
888 .previous
890 /* Call softirq on interrupt stack. Interrupts are off. */
891 ENTRY(do_softirq_own_stack)
892 pushq %rbp
893 mov %rsp, %rbp
894 incl PER_CPU_VAR(irq_count)
895 cmove PER_CPU_VAR(irq_stack_ptr), %rsp
896 push %rbp /* frame pointer backlink */
897 call __do_softirq
898 leaveq
899 decl PER_CPU_VAR(irq_count)
900 ret
901 END(do_softirq_own_stack)
903 #ifdef CONFIG_XEN
904 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
906 /*
907 * A note on the "critical region" in our callback handler.
908 * We want to avoid stacking callback handlers due to events occurring
909 * during handling of the last event. To do this, we keep events disabled
910 * until we've done all processing. HOWEVER, we must enable events before
911 * popping the stack frame (can't be done atomically) and so it would still
912 * be possible to get enough handler activations to overflow the stack.
913 * Although unlikely, bugs of that kind are hard to track down, so we'd
914 * like to avoid the possibility.
915 * So, on entry to the handler we detect whether we interrupted an
916 * existing activation in its critical region -- if so, we pop the current
917 * activation and restart the handler using the previous one.
918 */
919 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
921 /*
922 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
923 * see the correct pointer to the pt_regs
924 */
925 movq %rdi, %rsp /* we don't return, adjust the stack frame */
926 11: incl PER_CPU_VAR(irq_count)
927 movq %rsp, %rbp
928 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
929 pushq %rbp /* frame pointer backlink */
930 call xen_evtchn_do_upcall
931 popq %rsp
932 decl PER_CPU_VAR(irq_count)
933 #ifndef CONFIG_PREEMPT
934 call xen_maybe_preempt_hcall
935 #endif
936 jmp error_exit
937 END(xen_do_hypervisor_callback)
939 /*
940 * Hypervisor uses this for application faults while it executes.
941 * We get here for two reasons:
942 * 1. Fault while reloading DS, ES, FS or GS
943 * 2. Fault while executing IRET
944 * Category 1 we do not need to fix up as Xen has already reloaded all segment
945 * registers that could be reloaded and zeroed the others.
946 * Category 2 we fix up by killing the current process. We cannot use the
947 * normal Linux return path in this case because if we use the IRET hypercall
948 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
949 * We distinguish between categories by comparing each saved segment register
950 * with its current contents: any discrepancy means we in category 1.
951 */
952 ENTRY(xen_failsafe_callback)
953 movl %ds, %ecx
954 cmpw %cx, 0x10(%rsp)
955 jne 1f
956 movl %es, %ecx
957 cmpw %cx, 0x18(%rsp)
958 jne 1f
959 movl %fs, %ecx
960 cmpw %cx, 0x20(%rsp)
961 jne 1f
962 movl %gs, %ecx
963 cmpw %cx, 0x28(%rsp)
964 jne 1f
965 /* All segments match their saved values => Category 2 (Bad IRET). */
966 movq (%rsp), %rcx
967 movq 8(%rsp), %r11
968 addq $0x30, %rsp
969 pushq $0 /* RIP */
970 pushq %r11
971 pushq %rcx
972 jmp general_protection
973 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
974 movq (%rsp), %rcx
975 movq 8(%rsp), %r11
976 addq $0x30, %rsp
977 pushq $-1 /* orig_ax = -1 => not a system call */
978 ALLOC_PT_GPREGS_ON_STACK
979 SAVE_C_REGS
980 SAVE_EXTRA_REGS
981 ENCODE_FRAME_POINTER
982 jmp error_exit
983 END(xen_failsafe_callback)
985 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
986 xen_hvm_callback_vector xen_evtchn_do_upcall
988 #endif /* CONFIG_XEN */
990 #if IS_ENABLED(CONFIG_HYPERV)
991 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
992 hyperv_callback_vector hyperv_vector_handler
993 #endif /* CONFIG_HYPERV */
995 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
996 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
997 idtentry stack_segment do_stack_segment has_error_code=1
999 #ifdef CONFIG_XEN
1000 idtentry xen_debug do_debug has_error_code=0
1001 idtentry xen_int3 do_int3 has_error_code=0
1002 idtentry xen_stack_segment do_stack_segment has_error_code=1
1003 #endif
1005 idtentry general_protection do_general_protection has_error_code=1
1006 trace_idtentry page_fault do_page_fault has_error_code=1
1008 #ifdef CONFIG_KVM_GUEST
1009 idtentry async_page_fault do_async_page_fault has_error_code=1
1010 #endif
1012 #ifdef CONFIG_X86_MCE
1013 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1014 #endif
1016 /*
1017 * Save all registers in pt_regs, and switch gs if needed.
1018 * Use slow, but surefire "are we in kernel?" check.
1019 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1020 */
1021 ENTRY(paranoid_entry)
1022 cld
1023 SAVE_C_REGS 8
1024 SAVE_EXTRA_REGS 8
1025 ENCODE_FRAME_POINTER 8
1026 movl $1, %ebx
1027 movl $MSR_GS_BASE, %ecx
1028 rdmsr
1029 testl %edx, %edx
1030 js 1f /* negative -> in kernel */
1031 SWAPGS
1032 xorl %ebx, %ebx
1033 1: ret
1034 END(paranoid_entry)
1036 /*
1037 * "Paranoid" exit path from exception stack. This is invoked
1038 * only on return from non-NMI IST interrupts that came
1039 * from kernel space.
1040 *
1041 * We may be returning to very strange contexts (e.g. very early
1042 * in syscall entry), so checking for preemption here would
1043 * be complicated. Fortunately, we there's no good reason
1044 * to try to handle preemption here.
1045 *
1046 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
1047 */
1048 ENTRY(paranoid_exit)
1049 DISABLE_INTERRUPTS(CLBR_ANY)
1050 TRACE_IRQS_OFF_DEBUG
1051 testl %ebx, %ebx /* swapgs needed? */
1052 jnz paranoid_exit_no_swapgs
1053 TRACE_IRQS_IRETQ
1054 SWAPGS_UNSAFE_STACK
1055 jmp paranoid_exit_restore
1056 paranoid_exit_no_swapgs:
1057 TRACE_IRQS_IRETQ_DEBUG
1058 paranoid_exit_restore:
1059 RESTORE_EXTRA_REGS
1060 RESTORE_C_REGS
1061 REMOVE_PT_GPREGS_FROM_STACK 8
1062 INTERRUPT_RETURN
1063 END(paranoid_exit)
1065 /*
1066 * Save all registers in pt_regs, and switch gs if needed.
1067 * Return: EBX=0: came from user mode; EBX=1: otherwise
1068 */
1069 ENTRY(error_entry)
1070 cld
1071 SAVE_C_REGS 8
1072 SAVE_EXTRA_REGS 8
1073 ENCODE_FRAME_POINTER 8
1074 xorl %ebx, %ebx
1075 testb $3, CS+8(%rsp)
1076 jz .Lerror_kernelspace
1078 /*
1079 * We entered from user mode or we're pretending to have entered
1080 * from user mode due to an IRET fault.
1081 */
1082 SWAPGS
1084 .Lerror_entry_from_usermode_after_swapgs:
1085 /*
1086 * We need to tell lockdep that IRQs are off. We can't do this until
1087 * we fix gsbase, and we should do it before enter_from_user_mode
1088 * (which can take locks).
1089 */
1090 TRACE_IRQS_OFF
1091 CALL_enter_from_user_mode
1092 ret
1094 .Lerror_entry_done:
1095 TRACE_IRQS_OFF
1096 ret
1098 /*
1099 * There are two places in the kernel that can potentially fault with
1100 * usergs. Handle them here. B stepping K8s sometimes report a
1101 * truncated RIP for IRET exceptions returning to compat mode. Check
1102 * for these here too.
1103 */
1104 .Lerror_kernelspace:
1105 incl %ebx
1106 leaq native_irq_return_iret(%rip), %rcx
1107 cmpq %rcx, RIP+8(%rsp)
1108 je .Lerror_bad_iret
1109 movl %ecx, %eax /* zero extend */
1110 cmpq %rax, RIP+8(%rsp)
1111 je .Lbstep_iret
1112 cmpq $.Lgs_change, RIP+8(%rsp)
1113 jne .Lerror_entry_done
1115 /*
1116 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1117 * gsbase and proceed. We'll fix up the exception and land in
1118 * .Lgs_change's error handler with kernel gsbase.
1119 */
1120 SWAPGS
1121 jmp .Lerror_entry_done
1123 .Lbstep_iret:
1124 /* Fix truncated RIP */
1125 movq %rcx, RIP+8(%rsp)
1126 /* fall through */
1128 .Lerror_bad_iret:
1129 /*
1130 * We came from an IRET to user mode, so we have user gsbase.
1131 * Switch to kernel gsbase:
1132 */
1133 SWAPGS
1135 /*
1136 * Pretend that the exception came from user mode: set up pt_regs
1137 * as if we faulted immediately after IRET and clear EBX so that
1138 * error_exit knows that we will be returning to user mode.
1139 */
1140 mov %rsp, %rdi
1141 call fixup_bad_iret
1142 mov %rax, %rsp
1143 decl %ebx
1144 jmp .Lerror_entry_from_usermode_after_swapgs
1145 END(error_entry)
1148 /*
1149 * On entry, EBX is a "return to kernel mode" flag:
1150 * 1: already in kernel mode, don't need SWAPGS
1151 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1152 */
1153 ENTRY(error_exit)
1154 DISABLE_INTERRUPTS(CLBR_ANY)
1155 TRACE_IRQS_OFF
1156 testl %ebx, %ebx
1157 jnz retint_kernel
1158 jmp retint_user
1159 END(error_exit)
1161 /* Runs on exception stack */
1162 ENTRY(nmi)
1163 /*
1164 * Fix up the exception frame if we're on Xen.
1165 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most
1166 * one value to the stack on native, so it may clobber the rdx
1167 * scratch slot, but it won't clobber any of the important
1168 * slots past it.
1169 *
1170 * Xen is a different story, because the Xen frame itself overlaps
1171 * the "NMI executing" variable.
1172 */
1173 PARAVIRT_ADJUST_EXCEPTION_FRAME
1175 /*
1176 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1177 * the iretq it performs will take us out of NMI context.
1178 * This means that we can have nested NMIs where the next
1179 * NMI is using the top of the stack of the previous NMI. We
1180 * can't let it execute because the nested NMI will corrupt the
1181 * stack of the previous NMI. NMI handlers are not re-entrant
1182 * anyway.
1183 *
1184 * To handle this case we do the following:
1185 * Check the a special location on the stack that contains
1186 * a variable that is set when NMIs are executing.
1187 * The interrupted task's stack is also checked to see if it
1188 * is an NMI stack.
1189 * If the variable is not set and the stack is not the NMI
1190 * stack then:
1191 * o Set the special variable on the stack
1192 * o Copy the interrupt frame into an "outermost" location on the
1193 * stack
1194 * o Copy the interrupt frame into an "iret" location on the stack
1195 * o Continue processing the NMI
1196 * If the variable is set or the previous stack is the NMI stack:
1197 * o Modify the "iret" location to jump to the repeat_nmi
1198 * o return back to the first NMI
1199 *
1200 * Now on exit of the first NMI, we first clear the stack variable
1201 * The NMI stack will tell any nested NMIs at that point that it is
1202 * nested. Then we pop the stack normally with iret, and if there was
1203 * a nested NMI that updated the copy interrupt stack frame, a
1204 * jump will be made to the repeat_nmi code that will handle the second
1205 * NMI.
1206 *
1207 * However, espfix prevents us from directly returning to userspace
1208 * with a single IRET instruction. Similarly, IRET to user mode
1209 * can fault. We therefore handle NMIs from user space like
1210 * other IST entries.
1211 */
1213 /* Use %rdx as our temp variable throughout */
1214 pushq %rdx
1216 testb $3, CS-RIP+8(%rsp)
1217 jz .Lnmi_from_kernel
1219 /*
1220 * NMI from user mode. We need to run on the thread stack, but we
1221 * can't go through the normal entry paths: NMIs are masked, and
1222 * we don't want to enable interrupts, because then we'll end
1223 * up in an awkward situation in which IRQs are on but NMIs
1224 * are off.
1225 *
1226 * We also must not push anything to the stack before switching
1227 * stacks lest we corrupt the "NMI executing" variable.
1228 */
1230 SWAPGS_UNSAFE_STACK
1231 cld
1232 movq %rsp, %rdx
1233 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1234 pushq 5*8(%rdx) /* pt_regs->ss */
1235 pushq 4*8(%rdx) /* pt_regs->rsp */
1236 pushq 3*8(%rdx) /* pt_regs->flags */
1237 pushq 2*8(%rdx) /* pt_regs->cs */
1238 pushq 1*8(%rdx) /* pt_regs->rip */
1239 pushq $-1 /* pt_regs->orig_ax */
1240 pushq %rdi /* pt_regs->di */
1241 pushq %rsi /* pt_regs->si */
1242 pushq (%rdx) /* pt_regs->dx */
1243 pushq %rcx /* pt_regs->cx */
1244 pushq %rax /* pt_regs->ax */
1245 pushq %r8 /* pt_regs->r8 */
1246 pushq %r9 /* pt_regs->r9 */
1247 pushq %r10 /* pt_regs->r10 */
1248 pushq %r11 /* pt_regs->r11 */
1249 pushq %rbx /* pt_regs->rbx */
1250 pushq %rbp /* pt_regs->rbp */
1251 pushq %r12 /* pt_regs->r12 */
1252 pushq %r13 /* pt_regs->r13 */
1253 pushq %r14 /* pt_regs->r14 */
1254 pushq %r15 /* pt_regs->r15 */
1255 ENCODE_FRAME_POINTER
1257 /*
1258 * At this point we no longer need to worry about stack damage
1259 * due to nesting -- we're on the normal thread stack and we're
1260 * done with the NMI stack.
1261 */
1263 movq %rsp, %rdi
1264 movq $-1, %rsi
1265 call do_nmi
1267 /*
1268 * Return back to user mode. We must *not* do the normal exit
1269 * work, because we don't want to enable interrupts.
1270 */
1271 SWAPGS
1272 jmp restore_regs_and_iret
1274 .Lnmi_from_kernel:
1275 /*
1276 * Here's what our stack frame will look like:
1277 * +---------------------------------------------------------+
1278 * | original SS |
1279 * | original Return RSP |
1280 * | original RFLAGS |
1281 * | original CS |
1282 * | original RIP |
1283 * +---------------------------------------------------------+
1284 * | temp storage for rdx |
1285 * +---------------------------------------------------------+
1286 * | "NMI executing" variable |
1287 * +---------------------------------------------------------+
1288 * | iret SS } Copied from "outermost" frame |
1289 * | iret Return RSP } on each loop iteration; overwritten |
1290 * | iret RFLAGS } by a nested NMI to force another |
1291 * | iret CS } iteration if needed. |
1292 * | iret RIP } |
1293 * +---------------------------------------------------------+
1294 * | outermost SS } initialized in first_nmi; |
1295 * | outermost Return RSP } will not be changed before |
1296 * | outermost RFLAGS } NMI processing is done. |
1297 * | outermost CS } Copied to "iret" frame on each |
1298 * | outermost RIP } iteration. |
1299 * +---------------------------------------------------------+
1300 * | pt_regs |
1301 * +---------------------------------------------------------+
1302 *
1303 * The "original" frame is used by hardware. Before re-enabling
1304 * NMIs, we need to be done with it, and we need to leave enough
1305 * space for the asm code here.
1306 *
1307 * We return by executing IRET while RSP points to the "iret" frame.
1308 * That will either return for real or it will loop back into NMI
1309 * processing.
1310 *
1311 * The "outermost" frame is copied to the "iret" frame on each
1312 * iteration of the loop, so each iteration starts with the "iret"
1313 * frame pointing to the final return target.
1314 */
1316 /*
1317 * Determine whether we're a nested NMI.
1318 *
1319 * If we interrupted kernel code between repeat_nmi and
1320 * end_repeat_nmi, then we are a nested NMI. We must not
1321 * modify the "iret" frame because it's being written by
1322 * the outer NMI. That's okay; the outer NMI handler is
1323 * about to about to call do_nmi anyway, so we can just
1324 * resume the outer NMI.
1325 */
1327 movq $repeat_nmi, %rdx
1328 cmpq 8(%rsp), %rdx
1329 ja 1f
1330 movq $end_repeat_nmi, %rdx
1331 cmpq 8(%rsp), %rdx
1332 ja nested_nmi_out
1333 1:
1335 /*
1336 * Now check "NMI executing". If it's set, then we're nested.
1337 * This will not detect if we interrupted an outer NMI just
1338 * before IRET.
1339 */
1340 cmpl $1, -8(%rsp)
1341 je nested_nmi
1343 /*
1344 * Now test if the previous stack was an NMI stack. This covers
1345 * the case where we interrupt an outer NMI after it clears
1346 * "NMI executing" but before IRET. We need to be careful, though:
1347 * there is one case in which RSP could point to the NMI stack
1348 * despite there being no NMI active: naughty userspace controls
1349 * RSP at the very beginning of the SYSCALL targets. We can
1350 * pull a fast one on naughty userspace, though: we program
1351 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1352 * if it controls the kernel's RSP. We set DF before we clear
1353 * "NMI executing".
1354 */
1355 lea 6*8(%rsp), %rdx
1356 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1357 cmpq %rdx, 4*8(%rsp)
1358 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1359 ja first_nmi
1361 subq $EXCEPTION_STKSZ, %rdx
1362 cmpq %rdx, 4*8(%rsp)
1363 /* If it is below the NMI stack, it is a normal NMI */
1364 jb first_nmi
1366 /* Ah, it is within the NMI stack. */
1368 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1369 jz first_nmi /* RSP was user controlled. */
1371 /* This is a nested NMI. */
1373 nested_nmi:
1374 /*
1375 * Modify the "iret" frame to point to repeat_nmi, forcing another
1376 * iteration of NMI handling.
1377 */
1378 subq $8, %rsp
1379 leaq -10*8(%rsp), %rdx
1380 pushq $__KERNEL_DS
1381 pushq %rdx
1382 pushfq
1383 pushq $__KERNEL_CS
1384 pushq $repeat_nmi
1386 /* Put stack back */
1387 addq $(6*8), %rsp
1389 nested_nmi_out:
1390 popq %rdx
1392 /* We are returning to kernel mode, so this cannot result in a fault. */
1393 INTERRUPT_RETURN
1395 first_nmi:
1396 /* Restore rdx. */
1397 movq (%rsp), %rdx
1399 /* Make room for "NMI executing". */
1400 pushq $0
1402 /* Leave room for the "iret" frame */
1403 subq $(5*8), %rsp
1405 /* Copy the "original" frame to the "outermost" frame */
1406 .rept 5
1407 pushq 11*8(%rsp)
1408 .endr
1410 /* Everything up to here is safe from nested NMIs */
1412 #ifdef CONFIG_DEBUG_ENTRY
1413 /*
1414 * For ease of testing, unmask NMIs right away. Disabled by
1415 * default because IRET is very expensive.
1416 */
1417 pushq $0 /* SS */
1418 pushq %rsp /* RSP (minus 8 because of the previous push) */
1419 addq $8, (%rsp) /* Fix up RSP */
1420 pushfq /* RFLAGS */
1421 pushq $__KERNEL_CS /* CS */
1422 pushq $1f /* RIP */
1423 INTERRUPT_RETURN /* continues at repeat_nmi below */
1424 1:
1425 #endif
1427 repeat_nmi:
1428 /*
1429 * If there was a nested NMI, the first NMI's iret will return
1430 * here. But NMIs are still enabled and we can take another
1431 * nested NMI. The nested NMI checks the interrupted RIP to see
1432 * if it is between repeat_nmi and end_repeat_nmi, and if so
1433 * it will just return, as we are about to repeat an NMI anyway.
1434 * This makes it safe to copy to the stack frame that a nested
1435 * NMI will update.
1436 *
1437 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1438 * we're repeating an NMI, gsbase has the same value that it had on
1439 * the first iteration. paranoid_entry will load the kernel
1440 * gsbase if needed before we call do_nmi. "NMI executing"
1441 * is zero.
1442 */
1443 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1445 /*
1446 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1447 * here must not modify the "iret" frame while we're writing to
1448 * it or it will end up containing garbage.
1449 */
1450 addq $(10*8), %rsp
1451 .rept 5
1452 pushq -6*8(%rsp)
1453 .endr
1454 subq $(5*8), %rsp
1455 end_repeat_nmi:
1457 /*
1458 * Everything below this point can be preempted by a nested NMI.
1459 * If this happens, then the inner NMI will change the "iret"
1460 * frame to point back to repeat_nmi.
1461 */
1462 pushq $-1 /* ORIG_RAX: no syscall to restart */
1463 ALLOC_PT_GPREGS_ON_STACK
1465 /*
1466 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1467 * as we should not be calling schedule in NMI context.
1468 * Even with normal interrupts enabled. An NMI should not be
1469 * setting NEED_RESCHED or anything that normal interrupts and
1470 * exceptions might do.
1471 */
1472 call paranoid_entry
1474 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1475 movq %rsp, %rdi
1476 movq $-1, %rsi
1477 call do_nmi
1479 testl %ebx, %ebx /* swapgs needed? */
1480 jnz nmi_restore
1481 nmi_swapgs:
1482 SWAPGS_UNSAFE_STACK
1483 nmi_restore:
1484 RESTORE_EXTRA_REGS
1485 RESTORE_C_REGS
1487 /* Point RSP at the "iret" frame. */
1488 REMOVE_PT_GPREGS_FROM_STACK 6*8
1490 /*
1491 * Clear "NMI executing". Set DF first so that we can easily
1492 * distinguish the remaining code between here and IRET from
1493 * the SYSCALL entry and exit paths. On a native kernel, we
1494 * could just inspect RIP, but, on paravirt kernels,
1495 * INTERRUPT_RETURN can translate into a jump into a
1496 * hypercall page.
1497 */
1498 std
1499 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1501 /*
1502 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI
1503 * stack in a single instruction. We are returning to kernel
1504 * mode, so this cannot result in a fault.
1505 */
1506 INTERRUPT_RETURN
1507 END(nmi)
1509 ENTRY(ignore_sysret)
1510 mov $-ENOSYS, %eax
1511 sysret
1512 END(ignore_sysret)
1514 ENTRY(rewind_stack_do_exit)
1515 /* Prevent any naive code from trying to unwind to our caller. */
1516 xorl %ebp, %ebp
1518 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax
1519 leaq -TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%rax), %rsp
1521 call do_exit
1522 1: jmp 1b
1523 END(rewind_stack_do_exit)