2 #include <linux/initrd.h>
3 #include <linux/ioport.h>
4 #include <linux/swap.h>
5 #include <linux/memblock.h>
6 #include <linux/bootmem.h> /* for max_low_pfn */
8 #include <asm/set_memory.h>
9 #include <asm/e820/api.h>
12 #include <asm/page_types.h>
13 #include <asm/sections.h>
14 #include <asm/setup.h>
15 #include <asm/tlbflush.h>
17 #include <asm/proto.h>
18 #include <asm/dma.h> /* for MAX_DMA_PFN */
19 #include <asm/microcode.h>
20 #include <asm/kaslr.h>
23 * We need to define the tracepoints somewhere, and tlb.c
24 * is only compied when SMP=y.
26 #define CREATE_TRACE_POINTS
27 #include <trace/events/tlb.h>
29 #include "mm_internal.h"
32 * Tables translating between page_cache_type_t and pte encoding.
34 * The default values are defined statically as minimal supported mode;
35 * WC and WT fall back to UC-. pat_init() updates these values to support
36 * more cache modes, WC and WT, when it is safe to do so. See pat_init()
37 * for the details. Note, __early_ioremap() used during early boot-time
38 * takes pgprot_t (pte encoding) and does not use these tables.
40 * Index into __cachemode2pte_tbl[] is the cachemode.
42 * Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
43 * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
45 uint16_t __cachemode2pte_tbl
[_PAGE_CACHE_MODE_NUM
] = {
46 [_PAGE_CACHE_MODE_WB
] = 0 | 0 ,
47 [_PAGE_CACHE_MODE_WC
] = 0 | _PAGE_PCD
,
48 [_PAGE_CACHE_MODE_UC_MINUS
] = 0 | _PAGE_PCD
,
49 [_PAGE_CACHE_MODE_UC
] = _PAGE_PWT
| _PAGE_PCD
,
50 [_PAGE_CACHE_MODE_WT
] = 0 | _PAGE_PCD
,
51 [_PAGE_CACHE_MODE_WP
] = 0 | _PAGE_PCD
,
53 EXPORT_SYMBOL(__cachemode2pte_tbl
);
55 uint8_t __pte2cachemode_tbl
[8] = {
56 [__pte2cm_idx( 0 | 0 | 0 )] = _PAGE_CACHE_MODE_WB
,
57 [__pte2cm_idx(_PAGE_PWT
| 0 | 0 )] = _PAGE_CACHE_MODE_UC_MINUS
,
58 [__pte2cm_idx( 0 | _PAGE_PCD
| 0 )] = _PAGE_CACHE_MODE_UC_MINUS
,
59 [__pte2cm_idx(_PAGE_PWT
| _PAGE_PCD
| 0 )] = _PAGE_CACHE_MODE_UC
,
60 [__pte2cm_idx( 0 | 0 | _PAGE_PAT
)] = _PAGE_CACHE_MODE_WB
,
61 [__pte2cm_idx(_PAGE_PWT
| 0 | _PAGE_PAT
)] = _PAGE_CACHE_MODE_UC_MINUS
,
62 [__pte2cm_idx(0 | _PAGE_PCD
| _PAGE_PAT
)] = _PAGE_CACHE_MODE_UC_MINUS
,
63 [__pte2cm_idx(_PAGE_PWT
| _PAGE_PCD
| _PAGE_PAT
)] = _PAGE_CACHE_MODE_UC
,
65 EXPORT_SYMBOL(__pte2cachemode_tbl
);
67 static unsigned long __initdata pgt_buf_start
;
68 static unsigned long __initdata pgt_buf_end
;
69 static unsigned long __initdata pgt_buf_top
;
71 static unsigned long min_pfn_mapped
;
73 static bool __initdata can_use_brk_pgt
= true;
76 * Pages returned are already directly mapped.
78 * Changing that is likely to break Xen, see commit:
80 * 279b706 x86,xen: introduce x86_init.mapping.pagetable_reserve
82 * for detailed information.
84 __ref
void *alloc_low_pages(unsigned int num
)
92 order
= get_order((unsigned long)num
<< PAGE_SHIFT
);
93 return (void *)__get_free_pages(GFP_ATOMIC
| __GFP_NOTRACK
|
97 if ((pgt_buf_end
+ num
) > pgt_buf_top
|| !can_use_brk_pgt
) {
99 if (min_pfn_mapped
>= max_pfn_mapped
)
100 panic("alloc_low_pages: ran out of memory");
101 ret
= memblock_find_in_range(min_pfn_mapped
<< PAGE_SHIFT
,
102 max_pfn_mapped
<< PAGE_SHIFT
,
103 PAGE_SIZE
* num
, PAGE_SIZE
);
105 panic("alloc_low_pages: can not alloc memory");
106 memblock_reserve(ret
, PAGE_SIZE
* num
);
107 pfn
= ret
>> PAGE_SHIFT
;
111 printk(KERN_DEBUG
"BRK [%#010lx, %#010lx] PGTABLE\n",
112 pfn
<< PAGE_SHIFT
, (pgt_buf_end
<< PAGE_SHIFT
) - 1);
115 for (i
= 0; i
< num
; i
++) {
118 adr
= __va((pfn
+ i
) << PAGE_SHIFT
);
122 return __va(pfn
<< PAGE_SHIFT
);
126 * By default need 3 4k for initial PMD_SIZE, 3 4k for 0-ISA_END_ADDRESS.
127 * With KASLR memory randomization, depending on the machine e820 memory
128 * and the PUD alignment. We may need twice more pages when KASLR memory
129 * randomization is enabled.
131 #ifndef CONFIG_RANDOMIZE_MEMORY
132 #define INIT_PGD_PAGE_COUNT 6
134 #define INIT_PGD_PAGE_COUNT 12
136 #define INIT_PGT_BUF_SIZE (INIT_PGD_PAGE_COUNT * PAGE_SIZE)
137 RESERVE_BRK(early_pgt_alloc
, INIT_PGT_BUF_SIZE
);
138 void __init
early_alloc_pgt_buf(void)
140 unsigned long tables
= INIT_PGT_BUF_SIZE
;
143 base
= __pa(extend_brk(tables
, PAGE_SIZE
));
145 pgt_buf_start
= base
>> PAGE_SHIFT
;
146 pgt_buf_end
= pgt_buf_start
;
147 pgt_buf_top
= pgt_buf_start
+ (tables
>> PAGE_SHIFT
);
152 early_param_on_off("gbpages", "nogbpages", direct_gbpages
, CONFIG_X86_DIRECT_GBPAGES
);
157 unsigned page_size_mask
;
160 static int page_size_mask
;
162 static void __init
probe_page_size_mask(void)
165 * For CONFIG_KMEMCHECK or pagealloc debugging, identity mapping will
167 * This will simplify cpa(), which otherwise needs to support splitting
168 * large pages into small in interrupt context, etc.
170 if (boot_cpu_has(X86_FEATURE_PSE
) && !debug_pagealloc_enabled() && !IS_ENABLED(CONFIG_KMEMCHECK
))
171 page_size_mask
|= 1 << PG_LEVEL_2M
;
175 /* Enable PSE if available */
176 if (boot_cpu_has(X86_FEATURE_PSE
))
177 cr4_set_bits_and_update_boot(X86_CR4_PSE
);
179 /* Enable PGE if available */
180 if (boot_cpu_has(X86_FEATURE_PGE
)) {
181 cr4_set_bits_and_update_boot(X86_CR4_PGE
);
182 __supported_pte_mask
|= _PAGE_GLOBAL
;
184 __supported_pte_mask
&= ~_PAGE_GLOBAL
;
186 /* Enable 1 GB linear kernel mappings if available: */
187 if (direct_gbpages
&& boot_cpu_has(X86_FEATURE_GBPAGES
)) {
188 printk(KERN_INFO
"Using GB pages for direct mapping\n");
189 page_size_mask
|= 1 << PG_LEVEL_1G
;
196 #define NR_RANGE_MR 3
197 #else /* CONFIG_X86_64 */
198 #define NR_RANGE_MR 5
201 static int __meminit
save_mr(struct map_range
*mr
, int nr_range
,
202 unsigned long start_pfn
, unsigned long end_pfn
,
203 unsigned long page_size_mask
)
205 if (start_pfn
< end_pfn
) {
206 if (nr_range
>= NR_RANGE_MR
)
207 panic("run out of range for init_memory_mapping\n");
208 mr
[nr_range
].start
= start_pfn
<<PAGE_SHIFT
;
209 mr
[nr_range
].end
= end_pfn
<<PAGE_SHIFT
;
210 mr
[nr_range
].page_size_mask
= page_size_mask
;
218 * adjust the page_size_mask for small range to go with
219 * big page size instead small one if nearby are ram too.
221 static void __ref
adjust_range_page_size_mask(struct map_range
*mr
,
226 for (i
= 0; i
< nr_range
; i
++) {
227 if ((page_size_mask
& (1<<PG_LEVEL_2M
)) &&
228 !(mr
[i
].page_size_mask
& (1<<PG_LEVEL_2M
))) {
229 unsigned long start
= round_down(mr
[i
].start
, PMD_SIZE
);
230 unsigned long end
= round_up(mr
[i
].end
, PMD_SIZE
);
233 if ((end
>> PAGE_SHIFT
) > max_low_pfn
)
237 if (memblock_is_region_memory(start
, end
- start
))
238 mr
[i
].page_size_mask
|= 1<<PG_LEVEL_2M
;
240 if ((page_size_mask
& (1<<PG_LEVEL_1G
)) &&
241 !(mr
[i
].page_size_mask
& (1<<PG_LEVEL_1G
))) {
242 unsigned long start
= round_down(mr
[i
].start
, PUD_SIZE
);
243 unsigned long end
= round_up(mr
[i
].end
, PUD_SIZE
);
245 if (memblock_is_region_memory(start
, end
- start
))
246 mr
[i
].page_size_mask
|= 1<<PG_LEVEL_1G
;
251 static const char *page_size_string(struct map_range
*mr
)
253 static const char str_1g
[] = "1G";
254 static const char str_2m
[] = "2M";
255 static const char str_4m
[] = "4M";
256 static const char str_4k
[] = "4k";
258 if (mr
->page_size_mask
& (1<<PG_LEVEL_1G
))
261 * 32-bit without PAE has a 4M large page size.
262 * PG_LEVEL_2M is misnamed, but we can at least
263 * print out the right size in the string.
265 if (IS_ENABLED(CONFIG_X86_32
) &&
266 !IS_ENABLED(CONFIG_X86_PAE
) &&
267 mr
->page_size_mask
& (1<<PG_LEVEL_2M
))
270 if (mr
->page_size_mask
& (1<<PG_LEVEL_2M
))
276 static int __meminit
split_mem_range(struct map_range
*mr
, int nr_range
,
280 unsigned long start_pfn
, end_pfn
, limit_pfn
;
284 limit_pfn
= PFN_DOWN(end
);
286 /* head if not big page alignment ? */
287 pfn
= start_pfn
= PFN_DOWN(start
);
290 * Don't use a large page for the first 2/4MB of memory
291 * because there are often fixed size MTRRs in there
292 * and overlapping MTRRs into large pages can cause
296 end_pfn
= PFN_DOWN(PMD_SIZE
);
298 end_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
299 #else /* CONFIG_X86_64 */
300 end_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
302 if (end_pfn
> limit_pfn
)
304 if (start_pfn
< end_pfn
) {
305 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
, 0);
309 /* big page (2M) range */
310 start_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
312 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
));
313 #else /* CONFIG_X86_64 */
314 end_pfn
= round_up(pfn
, PFN_DOWN(PUD_SIZE
));
315 if (end_pfn
> round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
)))
316 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
));
319 if (start_pfn
< end_pfn
) {
320 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
,
321 page_size_mask
& (1<<PG_LEVEL_2M
));
326 /* big page (1G) range */
327 start_pfn
= round_up(pfn
, PFN_DOWN(PUD_SIZE
));
328 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PUD_SIZE
));
329 if (start_pfn
< end_pfn
) {
330 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
,
332 ((1<<PG_LEVEL_2M
)|(1<<PG_LEVEL_1G
)));
336 /* tail is not big page (1G) alignment */
337 start_pfn
= round_up(pfn
, PFN_DOWN(PMD_SIZE
));
338 end_pfn
= round_down(limit_pfn
, PFN_DOWN(PMD_SIZE
));
339 if (start_pfn
< end_pfn
) {
340 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
,
341 page_size_mask
& (1<<PG_LEVEL_2M
));
346 /* tail is not big page (2M) alignment */
349 nr_range
= save_mr(mr
, nr_range
, start_pfn
, end_pfn
, 0);
352 adjust_range_page_size_mask(mr
, nr_range
);
354 /* try to merge same page size and continuous */
355 for (i
= 0; nr_range
> 1 && i
< nr_range
- 1; i
++) {
356 unsigned long old_start
;
357 if (mr
[i
].end
!= mr
[i
+1].start
||
358 mr
[i
].page_size_mask
!= mr
[i
+1].page_size_mask
)
361 old_start
= mr
[i
].start
;
362 memmove(&mr
[i
], &mr
[i
+1],
363 (nr_range
- 1 - i
) * sizeof(struct map_range
));
364 mr
[i
--].start
= old_start
;
368 for (i
= 0; i
< nr_range
; i
++)
369 pr_debug(" [mem %#010lx-%#010lx] page %s\n",
370 mr
[i
].start
, mr
[i
].end
- 1,
371 page_size_string(&mr
[i
]));
376 struct range pfn_mapped
[E820_MAX_ENTRIES
];
379 static void add_pfn_range_mapped(unsigned long start_pfn
, unsigned long end_pfn
)
381 nr_pfn_mapped
= add_range_with_merge(pfn_mapped
, E820_MAX_ENTRIES
,
382 nr_pfn_mapped
, start_pfn
, end_pfn
);
383 nr_pfn_mapped
= clean_sort_range(pfn_mapped
, E820_MAX_ENTRIES
);
385 max_pfn_mapped
= max(max_pfn_mapped
, end_pfn
);
387 if (start_pfn
< (1UL<<(32-PAGE_SHIFT
)))
388 max_low_pfn_mapped
= max(max_low_pfn_mapped
,
389 min(end_pfn
, 1UL<<(32-PAGE_SHIFT
)));
392 bool pfn_range_is_mapped(unsigned long start_pfn
, unsigned long end_pfn
)
396 for (i
= 0; i
< nr_pfn_mapped
; i
++)
397 if ((start_pfn
>= pfn_mapped
[i
].start
) &&
398 (end_pfn
<= pfn_mapped
[i
].end
))
405 * Setup the direct mapping of the physical memory at PAGE_OFFSET.
406 * This runs before bootmem is initialized and gets pages directly from
407 * the physical memory. To access them they are temporarily mapped.
409 unsigned long __ref
init_memory_mapping(unsigned long start
,
412 struct map_range mr
[NR_RANGE_MR
];
413 unsigned long ret
= 0;
416 pr_debug("init_memory_mapping: [mem %#010lx-%#010lx]\n",
419 memset(mr
, 0, sizeof(mr
));
420 nr_range
= split_mem_range(mr
, 0, start
, end
);
422 for (i
= 0; i
< nr_range
; i
++)
423 ret
= kernel_physical_mapping_init(mr
[i
].start
, mr
[i
].end
,
424 mr
[i
].page_size_mask
);
426 add_pfn_range_mapped(start
>> PAGE_SHIFT
, ret
>> PAGE_SHIFT
);
428 return ret
>> PAGE_SHIFT
;
432 * We need to iterate through the E820 memory map and create direct mappings
433 * for only E820_TYPE_RAM and E820_KERN_RESERVED regions. We cannot simply
434 * create direct mappings for all pfns from [0 to max_low_pfn) and
435 * [4GB to max_pfn) because of possible memory holes in high addresses
436 * that cannot be marked as UC by fixed/variable range MTRRs.
437 * Depending on the alignment of E820 ranges, this may possibly result
438 * in using smaller size (i.e. 4K instead of 2M or 1G) page tables.
440 * init_mem_mapping() calls init_range_memory_mapping() with big range.
441 * That range would have hole in the middle or ends, and only ram parts
442 * will be mapped in init_range_memory_mapping().
444 static unsigned long __init
init_range_memory_mapping(
445 unsigned long r_start
,
448 unsigned long start_pfn
, end_pfn
;
449 unsigned long mapped_ram_size
= 0;
452 for_each_mem_pfn_range(i
, MAX_NUMNODES
, &start_pfn
, &end_pfn
, NULL
) {
453 u64 start
= clamp_val(PFN_PHYS(start_pfn
), r_start
, r_end
);
454 u64 end
= clamp_val(PFN_PHYS(end_pfn
), r_start
, r_end
);
459 * if it is overlapping with brk pgt, we need to
460 * alloc pgt buf from memblock instead.
462 can_use_brk_pgt
= max(start
, (u64
)pgt_buf_end
<<PAGE_SHIFT
) >=
463 min(end
, (u64
)pgt_buf_top
<<PAGE_SHIFT
);
464 init_memory_mapping(start
, end
);
465 mapped_ram_size
+= end
- start
;
466 can_use_brk_pgt
= true;
469 return mapped_ram_size
;
472 static unsigned long __init
get_new_step_size(unsigned long step_size
)
475 * Initial mapped size is PMD_SIZE (2M).
476 * We can not set step_size to be PUD_SIZE (1G) yet.
477 * In worse case, when we cross the 1G boundary, and
478 * PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k)
479 * to map 1G range with PTE. Hence we use one less than the
480 * difference of page table level shifts.
482 * Don't need to worry about overflow in the top-down case, on 32bit,
483 * when step_size is 0, round_down() returns 0 for start, and that
484 * turns it into 0x100000000ULL.
485 * In the bottom-up case, round_up(x, 0) returns 0 though too, which
486 * needs to be taken into consideration by the code below.
488 return step_size
<< (PMD_SHIFT
- PAGE_SHIFT
- 1);
492 * memory_map_top_down - Map [map_start, map_end) top down
493 * @map_start: start address of the target memory range
494 * @map_end: end address of the target memory range
496 * This function will setup direct mapping for memory range
497 * [map_start, map_end) in top-down. That said, the page tables
498 * will be allocated at the end of the memory, and we map the
499 * memory in top-down.
501 static void __init
memory_map_top_down(unsigned long map_start
,
502 unsigned long map_end
)
504 unsigned long real_end
, start
, last_start
;
505 unsigned long step_size
;
507 unsigned long mapped_ram_size
= 0;
509 /* xen has big range in reserved near end of ram, skip it at first.*/
510 addr
= memblock_find_in_range(map_start
, map_end
, PMD_SIZE
, PMD_SIZE
);
511 real_end
= addr
+ PMD_SIZE
;
513 /* step_size need to be small so pgt_buf from BRK could cover it */
514 step_size
= PMD_SIZE
;
515 max_pfn_mapped
= 0; /* will get exact value next */
516 min_pfn_mapped
= real_end
>> PAGE_SHIFT
;
517 last_start
= start
= real_end
;
520 * We start from the top (end of memory) and go to the bottom.
521 * The memblock_find_in_range() gets us a block of RAM from the
522 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
525 while (last_start
> map_start
) {
526 if (last_start
> step_size
) {
527 start
= round_down(last_start
- 1, step_size
);
528 if (start
< map_start
)
532 mapped_ram_size
+= init_range_memory_mapping(start
,
535 min_pfn_mapped
= last_start
>> PAGE_SHIFT
;
536 if (mapped_ram_size
>= step_size
)
537 step_size
= get_new_step_size(step_size
);
540 if (real_end
< map_end
)
541 init_range_memory_mapping(real_end
, map_end
);
545 * memory_map_bottom_up - Map [map_start, map_end) bottom up
546 * @map_start: start address of the target memory range
547 * @map_end: end address of the target memory range
549 * This function will setup direct mapping for memory range
550 * [map_start, map_end) in bottom-up. Since we have limited the
551 * bottom-up allocation above the kernel, the page tables will
552 * be allocated just above the kernel and we map the memory
553 * in [map_start, map_end) in bottom-up.
555 static void __init
memory_map_bottom_up(unsigned long map_start
,
556 unsigned long map_end
)
558 unsigned long next
, start
;
559 unsigned long mapped_ram_size
= 0;
560 /* step_size need to be small so pgt_buf from BRK could cover it */
561 unsigned long step_size
= PMD_SIZE
;
564 min_pfn_mapped
= start
>> PAGE_SHIFT
;
567 * We start from the bottom (@map_start) and go to the top (@map_end).
568 * The memblock_find_in_range() gets us a block of RAM from the
569 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
572 while (start
< map_end
) {
573 if (step_size
&& map_end
- start
> step_size
) {
574 next
= round_up(start
+ 1, step_size
);
581 mapped_ram_size
+= init_range_memory_mapping(start
, next
);
584 if (mapped_ram_size
>= step_size
)
585 step_size
= get_new_step_size(step_size
);
589 void __init
init_mem_mapping(void)
593 probe_page_size_mask();
596 end
= max_pfn
<< PAGE_SHIFT
;
598 end
= max_low_pfn
<< PAGE_SHIFT
;
601 /* the ISA range is always mapped regardless of memory holes */
602 init_memory_mapping(0, ISA_END_ADDRESS
);
604 /* Init the trampoline, possibly with KASLR memory offset */
608 * If the allocation is in bottom-up direction, we setup direct mapping
609 * in bottom-up, otherwise we setup direct mapping in top-down.
611 if (memblock_bottom_up()) {
612 unsigned long kernel_end
= __pa_symbol(_end
);
615 * we need two separate calls here. This is because we want to
616 * allocate page tables above the kernel. So we first map
617 * [kernel_end, end) to make memory above the kernel be mapped
618 * as soon as possible. And then use page tables allocated above
619 * the kernel to map [ISA_END_ADDRESS, kernel_end).
621 memory_map_bottom_up(kernel_end
, end
);
622 memory_map_bottom_up(ISA_END_ADDRESS
, kernel_end
);
624 memory_map_top_down(ISA_END_ADDRESS
, end
);
628 if (max_pfn
> max_low_pfn
) {
629 /* can we preseve max_low_pfn ?*/
630 max_low_pfn
= max_pfn
;
633 early_ioremap_page_table_range_init();
636 load_cr3(swapper_pg_dir
);
639 early_memtest(0, max_pfn_mapped
<< PAGE_SHIFT
);
643 * devmem_is_allowed() checks to see if /dev/mem access to a certain address
644 * is valid. The argument is a physical page number.
646 * On x86, access has to be given to the first megabyte of RAM because that
647 * area traditionally contains BIOS code and data regions used by X, dosemu,
648 * and similar apps. Since they map the entire memory range, the whole range
649 * must be allowed (for mapping), but any areas that would otherwise be
650 * disallowed are flagged as being "zero filled" instead of rejected.
651 * Access has to be given to non-kernel-ram areas as well, these contain the
652 * PCI mmio resources as well as potential bios/acpi data regions.
654 int devmem_is_allowed(unsigned long pagenr
)
656 if (page_is_ram(pagenr
)) {
658 * For disallowed memory regions in the low 1MB range,
659 * request that the page be shown as all zeros.
668 * This must follow RAM test, since System RAM is considered a
669 * restricted resource under CONFIG_STRICT_IOMEM.
671 if (iomem_is_exclusive(pagenr
<< PAGE_SHIFT
)) {
672 /* Low 1MB bypasses iomem restrictions. */
682 void free_init_pages(char *what
, unsigned long begin
, unsigned long end
)
684 unsigned long begin_aligned
, end_aligned
;
686 /* Make sure boundaries are page aligned */
687 begin_aligned
= PAGE_ALIGN(begin
);
688 end_aligned
= end
& PAGE_MASK
;
690 if (WARN_ON(begin_aligned
!= begin
|| end_aligned
!= end
)) {
691 begin
= begin_aligned
;
699 * If debugging page accesses then do not free this memory but
700 * mark them not present - any buggy init-section access will
701 * create a kernel page fault:
703 if (debug_pagealloc_enabled()) {
704 pr_info("debug: unmapping init [mem %#010lx-%#010lx]\n",
706 set_memory_np(begin
, (end
- begin
) >> PAGE_SHIFT
);
709 * We just marked the kernel text read only above, now that
710 * we are going to free part of that, we need to make that
711 * writeable and non-executable first.
713 set_memory_nx(begin
, (end
- begin
) >> PAGE_SHIFT
);
714 set_memory_rw(begin
, (end
- begin
) >> PAGE_SHIFT
);
716 free_reserved_area((void *)begin
, (void *)end
,
717 POISON_FREE_INITMEM
, what
);
721 void __ref
free_initmem(void)
723 e820__reallocate_tables();
725 free_init_pages("unused kernel",
726 (unsigned long)(&__init_begin
),
727 (unsigned long)(&__init_end
));
730 #ifdef CONFIG_BLK_DEV_INITRD
731 void __init
free_initrd_mem(unsigned long start
, unsigned long end
)
734 * end could be not aligned, and We can not align that,
735 * decompresser could be confused by aligned initrd_end
736 * We already reserve the end partial page before in
737 * - i386_start_kernel()
738 * - x86_64_start_kernel()
739 * - relocate_initrd()
740 * So here We can do PAGE_ALIGN() safely to get partial page to be freed
742 free_init_pages("initrd", start
, PAGE_ALIGN(end
));
747 * Calculate the precise size of the DMA zone (first 16 MB of RAM),
748 * and pass it to the MM layer - to help it set zone watermarks more
751 * Done on 64-bit systems only for the time being, although 32-bit systems
752 * might benefit from this as well.
754 void __init
memblock_find_dma_reserve(void)
757 u64 nr_pages
= 0, nr_free_pages
= 0;
758 unsigned long start_pfn
, end_pfn
;
759 phys_addr_t start_addr
, end_addr
;
764 * Iterate over all memory ranges (free and reserved ones alike),
765 * to calculate the total number of pages in the first 16 MB of RAM:
768 for_each_mem_pfn_range(i
, MAX_NUMNODES
, &start_pfn
, &end_pfn
, NULL
) {
769 start_pfn
= min(start_pfn
, MAX_DMA_PFN
);
770 end_pfn
= min(end_pfn
, MAX_DMA_PFN
);
772 nr_pages
+= end_pfn
- start_pfn
;
776 * Iterate over free memory ranges to calculate the number of free
777 * pages in the DMA zone, while not counting potential partial
778 * pages at the beginning or the end of the range:
781 for_each_free_mem_range(u
, NUMA_NO_NODE
, MEMBLOCK_NONE
, &start_addr
, &end_addr
, NULL
) {
782 start_pfn
= min_t(unsigned long, PFN_UP(start_addr
), MAX_DMA_PFN
);
783 end_pfn
= min_t(unsigned long, PFN_DOWN(end_addr
), MAX_DMA_PFN
);
785 if (start_pfn
< end_pfn
)
786 nr_free_pages
+= end_pfn
- start_pfn
;
789 set_dma_reserve(nr_pages
- nr_free_pages
);
793 void __init
zone_sizes_init(void)
795 unsigned long max_zone_pfns
[MAX_NR_ZONES
];
797 memset(max_zone_pfns
, 0, sizeof(max_zone_pfns
));
799 #ifdef CONFIG_ZONE_DMA
800 max_zone_pfns
[ZONE_DMA
] = min(MAX_DMA_PFN
, max_low_pfn
);
802 #ifdef CONFIG_ZONE_DMA32
803 max_zone_pfns
[ZONE_DMA32
] = min(MAX_DMA32_PFN
, max_low_pfn
);
805 max_zone_pfns
[ZONE_NORMAL
] = max_low_pfn
;
806 #ifdef CONFIG_HIGHMEM
807 max_zone_pfns
[ZONE_HIGHMEM
] = max_pfn
;
810 free_area_init_nodes(max_zone_pfns
);
813 DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state
, cpu_tlbstate
) = {
814 .loaded_mm
= &init_mm
,
816 .cr4
= ~0UL, /* fail hard if we screw up cr4 shadow initialization */
818 EXPORT_SYMBOL_GPL(cpu_tlbstate
);
820 void update_cache_mode_entry(unsigned entry
, enum page_cache_mode cache
)
822 /* entry 0 MUST be WB (hardwired to speed up translations) */
823 BUG_ON(!entry
&& cache
!= _PAGE_CACHE_MODE_WB
);
825 __cachemode2pte_tbl
[cache
] = __cm_idx2pte(entry
);
826 __pte2cachemode_tbl
[entry
] = cache
;