Merge tag 'chrome-platform-for-linus-4.13' of git://git.kernel.org/pub/scm/linux...
[linux/fpc-iii.git] / arch / x86 / mm / pgtable.c
blob508a708eb9a6533adbfc1003c802d6d781285367
1 #include <linux/mm.h>
2 #include <linux/gfp.h>
3 #include <asm/pgalloc.h>
4 #include <asm/pgtable.h>
5 #include <asm/tlb.h>
6 #include <asm/fixmap.h>
7 #include <asm/mtrr.h>
9 #define PGALLOC_GFP (GFP_KERNEL_ACCOUNT | __GFP_NOTRACK | __GFP_ZERO)
11 #ifdef CONFIG_HIGHPTE
12 #define PGALLOC_USER_GFP __GFP_HIGHMEM
13 #else
14 #define PGALLOC_USER_GFP 0
15 #endif
17 gfp_t __userpte_alloc_gfp = PGALLOC_GFP | PGALLOC_USER_GFP;
19 pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
21 return (pte_t *)__get_free_page(PGALLOC_GFP & ~__GFP_ACCOUNT);
24 pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
26 struct page *pte;
28 pte = alloc_pages(__userpte_alloc_gfp, 0);
29 if (!pte)
30 return NULL;
31 if (!pgtable_page_ctor(pte)) {
32 __free_page(pte);
33 return NULL;
35 return pte;
38 static int __init setup_userpte(char *arg)
40 if (!arg)
41 return -EINVAL;
44 * "userpte=nohigh" disables allocation of user pagetables in
45 * high memory.
47 if (strcmp(arg, "nohigh") == 0)
48 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
49 else
50 return -EINVAL;
51 return 0;
53 early_param("userpte", setup_userpte);
55 void ___pte_free_tlb(struct mmu_gather *tlb, struct page *pte)
57 pgtable_page_dtor(pte);
58 paravirt_release_pte(page_to_pfn(pte));
59 tlb_remove_page(tlb, pte);
62 #if CONFIG_PGTABLE_LEVELS > 2
63 void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd)
65 struct page *page = virt_to_page(pmd);
66 paravirt_release_pmd(__pa(pmd) >> PAGE_SHIFT);
68 * NOTE! For PAE, any changes to the top page-directory-pointer-table
69 * entries need a full cr3 reload to flush.
71 #ifdef CONFIG_X86_PAE
72 tlb->need_flush_all = 1;
73 #endif
74 pgtable_pmd_page_dtor(page);
75 tlb_remove_page(tlb, page);
78 #if CONFIG_PGTABLE_LEVELS > 3
79 void ___pud_free_tlb(struct mmu_gather *tlb, pud_t *pud)
81 paravirt_release_pud(__pa(pud) >> PAGE_SHIFT);
82 tlb_remove_page(tlb, virt_to_page(pud));
85 #if CONFIG_PGTABLE_LEVELS > 4
86 void ___p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d)
88 paravirt_release_p4d(__pa(p4d) >> PAGE_SHIFT);
89 tlb_remove_page(tlb, virt_to_page(p4d));
91 #endif /* CONFIG_PGTABLE_LEVELS > 4 */
92 #endif /* CONFIG_PGTABLE_LEVELS > 3 */
93 #endif /* CONFIG_PGTABLE_LEVELS > 2 */
95 static inline void pgd_list_add(pgd_t *pgd)
97 struct page *page = virt_to_page(pgd);
99 list_add(&page->lru, &pgd_list);
102 static inline void pgd_list_del(pgd_t *pgd)
104 struct page *page = virt_to_page(pgd);
106 list_del(&page->lru);
109 #define UNSHARED_PTRS_PER_PGD \
110 (SHARED_KERNEL_PMD ? KERNEL_PGD_BOUNDARY : PTRS_PER_PGD)
113 static void pgd_set_mm(pgd_t *pgd, struct mm_struct *mm)
115 BUILD_BUG_ON(sizeof(virt_to_page(pgd)->index) < sizeof(mm));
116 virt_to_page(pgd)->index = (pgoff_t)mm;
119 struct mm_struct *pgd_page_get_mm(struct page *page)
121 return (struct mm_struct *)page->index;
124 static void pgd_ctor(struct mm_struct *mm, pgd_t *pgd)
126 /* If the pgd points to a shared pagetable level (either the
127 ptes in non-PAE, or shared PMD in PAE), then just copy the
128 references from swapper_pg_dir. */
129 if (CONFIG_PGTABLE_LEVELS == 2 ||
130 (CONFIG_PGTABLE_LEVELS == 3 && SHARED_KERNEL_PMD) ||
131 CONFIG_PGTABLE_LEVELS >= 4) {
132 clone_pgd_range(pgd + KERNEL_PGD_BOUNDARY,
133 swapper_pg_dir + KERNEL_PGD_BOUNDARY,
134 KERNEL_PGD_PTRS);
137 /* list required to sync kernel mapping updates */
138 if (!SHARED_KERNEL_PMD) {
139 pgd_set_mm(pgd, mm);
140 pgd_list_add(pgd);
144 static void pgd_dtor(pgd_t *pgd)
146 if (SHARED_KERNEL_PMD)
147 return;
149 spin_lock(&pgd_lock);
150 pgd_list_del(pgd);
151 spin_unlock(&pgd_lock);
155 * List of all pgd's needed for non-PAE so it can invalidate entries
156 * in both cached and uncached pgd's; not needed for PAE since the
157 * kernel pmd is shared. If PAE were not to share the pmd a similar
158 * tactic would be needed. This is essentially codepath-based locking
159 * against pageattr.c; it is the unique case in which a valid change
160 * of kernel pagetables can't be lazily synchronized by vmalloc faults.
161 * vmalloc faults work because attached pagetables are never freed.
162 * -- nyc
165 #ifdef CONFIG_X86_PAE
167 * In PAE mode, we need to do a cr3 reload (=tlb flush) when
168 * updating the top-level pagetable entries to guarantee the
169 * processor notices the update. Since this is expensive, and
170 * all 4 top-level entries are used almost immediately in a
171 * new process's life, we just pre-populate them here.
173 * Also, if we're in a paravirt environment where the kernel pmd is
174 * not shared between pagetables (!SHARED_KERNEL_PMDS), we allocate
175 * and initialize the kernel pmds here.
177 #define PREALLOCATED_PMDS UNSHARED_PTRS_PER_PGD
179 void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd)
181 paravirt_alloc_pmd(mm, __pa(pmd) >> PAGE_SHIFT);
183 /* Note: almost everything apart from _PAGE_PRESENT is
184 reserved at the pmd (PDPT) level. */
185 set_pud(pudp, __pud(__pa(pmd) | _PAGE_PRESENT));
188 * According to Intel App note "TLBs, Paging-Structure Caches,
189 * and Their Invalidation", April 2007, document 317080-001,
190 * section 8.1: in PAE mode we explicitly have to flush the
191 * TLB via cr3 if the top-level pgd is changed...
193 flush_tlb_mm(mm);
195 #else /* !CONFIG_X86_PAE */
197 /* No need to prepopulate any pagetable entries in non-PAE modes. */
198 #define PREALLOCATED_PMDS 0
200 #endif /* CONFIG_X86_PAE */
202 static void free_pmds(struct mm_struct *mm, pmd_t *pmds[])
204 int i;
206 for(i = 0; i < PREALLOCATED_PMDS; i++)
207 if (pmds[i]) {
208 pgtable_pmd_page_dtor(virt_to_page(pmds[i]));
209 free_page((unsigned long)pmds[i]);
210 mm_dec_nr_pmds(mm);
214 static int preallocate_pmds(struct mm_struct *mm, pmd_t *pmds[])
216 int i;
217 bool failed = false;
218 gfp_t gfp = PGALLOC_GFP;
220 if (mm == &init_mm)
221 gfp &= ~__GFP_ACCOUNT;
223 for(i = 0; i < PREALLOCATED_PMDS; i++) {
224 pmd_t *pmd = (pmd_t *)__get_free_page(gfp);
225 if (!pmd)
226 failed = true;
227 if (pmd && !pgtable_pmd_page_ctor(virt_to_page(pmd))) {
228 free_page((unsigned long)pmd);
229 pmd = NULL;
230 failed = true;
232 if (pmd)
233 mm_inc_nr_pmds(mm);
234 pmds[i] = pmd;
237 if (failed) {
238 free_pmds(mm, pmds);
239 return -ENOMEM;
242 return 0;
246 * Mop up any pmd pages which may still be attached to the pgd.
247 * Normally they will be freed by munmap/exit_mmap, but any pmd we
248 * preallocate which never got a corresponding vma will need to be
249 * freed manually.
251 static void pgd_mop_up_pmds(struct mm_struct *mm, pgd_t *pgdp)
253 int i;
255 for(i = 0; i < PREALLOCATED_PMDS; i++) {
256 pgd_t pgd = pgdp[i];
258 if (pgd_val(pgd) != 0) {
259 pmd_t *pmd = (pmd_t *)pgd_page_vaddr(pgd);
261 pgdp[i] = native_make_pgd(0);
263 paravirt_release_pmd(pgd_val(pgd) >> PAGE_SHIFT);
264 pmd_free(mm, pmd);
265 mm_dec_nr_pmds(mm);
270 static void pgd_prepopulate_pmd(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmds[])
272 p4d_t *p4d;
273 pud_t *pud;
274 int i;
276 if (PREALLOCATED_PMDS == 0) /* Work around gcc-3.4.x bug */
277 return;
279 p4d = p4d_offset(pgd, 0);
280 pud = pud_offset(p4d, 0);
282 for (i = 0; i < PREALLOCATED_PMDS; i++, pud++) {
283 pmd_t *pmd = pmds[i];
285 if (i >= KERNEL_PGD_BOUNDARY)
286 memcpy(pmd, (pmd_t *)pgd_page_vaddr(swapper_pg_dir[i]),
287 sizeof(pmd_t) * PTRS_PER_PMD);
289 pud_populate(mm, pud, pmd);
294 * Xen paravirt assumes pgd table should be in one page. 64 bit kernel also
295 * assumes that pgd should be in one page.
297 * But kernel with PAE paging that is not running as a Xen domain
298 * only needs to allocate 32 bytes for pgd instead of one page.
300 #ifdef CONFIG_X86_PAE
302 #include <linux/slab.h>
304 #define PGD_SIZE (PTRS_PER_PGD * sizeof(pgd_t))
305 #define PGD_ALIGN 32
307 static struct kmem_cache *pgd_cache;
309 static int __init pgd_cache_init(void)
312 * When PAE kernel is running as a Xen domain, it does not use
313 * shared kernel pmd. And this requires a whole page for pgd.
315 if (!SHARED_KERNEL_PMD)
316 return 0;
319 * when PAE kernel is not running as a Xen domain, it uses
320 * shared kernel pmd. Shared kernel pmd does not require a whole
321 * page for pgd. We are able to just allocate a 32-byte for pgd.
322 * During boot time, we create a 32-byte slab for pgd table allocation.
324 pgd_cache = kmem_cache_create("pgd_cache", PGD_SIZE, PGD_ALIGN,
325 SLAB_PANIC, NULL);
326 if (!pgd_cache)
327 return -ENOMEM;
329 return 0;
331 core_initcall(pgd_cache_init);
333 static inline pgd_t *_pgd_alloc(void)
336 * If no SHARED_KERNEL_PMD, PAE kernel is running as a Xen domain.
337 * We allocate one page for pgd.
339 if (!SHARED_KERNEL_PMD)
340 return (pgd_t *)__get_free_page(PGALLOC_GFP);
343 * Now PAE kernel is not running as a Xen domain. We can allocate
344 * a 32-byte slab for pgd to save memory space.
346 return kmem_cache_alloc(pgd_cache, PGALLOC_GFP);
349 static inline void _pgd_free(pgd_t *pgd)
351 if (!SHARED_KERNEL_PMD)
352 free_page((unsigned long)pgd);
353 else
354 kmem_cache_free(pgd_cache, pgd);
356 #else
357 static inline pgd_t *_pgd_alloc(void)
359 return (pgd_t *)__get_free_page(PGALLOC_GFP);
362 static inline void _pgd_free(pgd_t *pgd)
364 free_page((unsigned long)pgd);
366 #endif /* CONFIG_X86_PAE */
368 pgd_t *pgd_alloc(struct mm_struct *mm)
370 pgd_t *pgd;
371 pmd_t *pmds[PREALLOCATED_PMDS];
373 pgd = _pgd_alloc();
375 if (pgd == NULL)
376 goto out;
378 mm->pgd = pgd;
380 if (preallocate_pmds(mm, pmds) != 0)
381 goto out_free_pgd;
383 if (paravirt_pgd_alloc(mm) != 0)
384 goto out_free_pmds;
387 * Make sure that pre-populating the pmds is atomic with
388 * respect to anything walking the pgd_list, so that they
389 * never see a partially populated pgd.
391 spin_lock(&pgd_lock);
393 pgd_ctor(mm, pgd);
394 pgd_prepopulate_pmd(mm, pgd, pmds);
396 spin_unlock(&pgd_lock);
398 return pgd;
400 out_free_pmds:
401 free_pmds(mm, pmds);
402 out_free_pgd:
403 _pgd_free(pgd);
404 out:
405 return NULL;
408 void pgd_free(struct mm_struct *mm, pgd_t *pgd)
410 pgd_mop_up_pmds(mm, pgd);
411 pgd_dtor(pgd);
412 paravirt_pgd_free(mm, pgd);
413 _pgd_free(pgd);
417 * Used to set accessed or dirty bits in the page table entries
418 * on other architectures. On x86, the accessed and dirty bits
419 * are tracked by hardware. However, do_wp_page calls this function
420 * to also make the pte writeable at the same time the dirty bit is
421 * set. In that case we do actually need to write the PTE.
423 int ptep_set_access_flags(struct vm_area_struct *vma,
424 unsigned long address, pte_t *ptep,
425 pte_t entry, int dirty)
427 int changed = !pte_same(*ptep, entry);
429 if (changed && dirty) {
430 *ptep = entry;
431 pte_update(vma->vm_mm, address, ptep);
434 return changed;
437 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
438 int pmdp_set_access_flags(struct vm_area_struct *vma,
439 unsigned long address, pmd_t *pmdp,
440 pmd_t entry, int dirty)
442 int changed = !pmd_same(*pmdp, entry);
444 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
446 if (changed && dirty) {
447 *pmdp = entry;
449 * We had a write-protection fault here and changed the pmd
450 * to to more permissive. No need to flush the TLB for that,
451 * #PF is architecturally guaranteed to do that and in the
452 * worst-case we'll generate a spurious fault.
456 return changed;
459 int pudp_set_access_flags(struct vm_area_struct *vma, unsigned long address,
460 pud_t *pudp, pud_t entry, int dirty)
462 int changed = !pud_same(*pudp, entry);
464 VM_BUG_ON(address & ~HPAGE_PUD_MASK);
466 if (changed && dirty) {
467 *pudp = entry;
469 * We had a write-protection fault here and changed the pud
470 * to to more permissive. No need to flush the TLB for that,
471 * #PF is architecturally guaranteed to do that and in the
472 * worst-case we'll generate a spurious fault.
476 return changed;
478 #endif
480 int ptep_test_and_clear_young(struct vm_area_struct *vma,
481 unsigned long addr, pte_t *ptep)
483 int ret = 0;
485 if (pte_young(*ptep))
486 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
487 (unsigned long *) &ptep->pte);
489 if (ret)
490 pte_update(vma->vm_mm, addr, ptep);
492 return ret;
495 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
496 int pmdp_test_and_clear_young(struct vm_area_struct *vma,
497 unsigned long addr, pmd_t *pmdp)
499 int ret = 0;
501 if (pmd_young(*pmdp))
502 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
503 (unsigned long *)pmdp);
505 return ret;
507 int pudp_test_and_clear_young(struct vm_area_struct *vma,
508 unsigned long addr, pud_t *pudp)
510 int ret = 0;
512 if (pud_young(*pudp))
513 ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,
514 (unsigned long *)pudp);
516 return ret;
518 #endif
520 int ptep_clear_flush_young(struct vm_area_struct *vma,
521 unsigned long address, pte_t *ptep)
524 * On x86 CPUs, clearing the accessed bit without a TLB flush
525 * doesn't cause data corruption. [ It could cause incorrect
526 * page aging and the (mistaken) reclaim of hot pages, but the
527 * chance of that should be relatively low. ]
529 * So as a performance optimization don't flush the TLB when
530 * clearing the accessed bit, it will eventually be flushed by
531 * a context switch or a VM operation anyway. [ In the rare
532 * event of it not getting flushed for a long time the delay
533 * shouldn't really matter because there's no real memory
534 * pressure for swapout to react to. ]
536 return ptep_test_and_clear_young(vma, address, ptep);
539 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
540 int pmdp_clear_flush_young(struct vm_area_struct *vma,
541 unsigned long address, pmd_t *pmdp)
543 int young;
545 VM_BUG_ON(address & ~HPAGE_PMD_MASK);
547 young = pmdp_test_and_clear_young(vma, address, pmdp);
548 if (young)
549 flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
551 return young;
553 #endif
556 * reserve_top_address - reserves a hole in the top of kernel address space
557 * @reserve - size of hole to reserve
559 * Can be used to relocate the fixmap area and poke a hole in the top
560 * of kernel address space to make room for a hypervisor.
562 void __init reserve_top_address(unsigned long reserve)
564 #ifdef CONFIG_X86_32
565 BUG_ON(fixmaps_set > 0);
566 __FIXADDR_TOP = round_down(-reserve, 1 << PMD_SHIFT) - PAGE_SIZE;
567 printk(KERN_INFO "Reserving virtual address space above 0x%08lx (rounded to 0x%08lx)\n",
568 -reserve, __FIXADDR_TOP + PAGE_SIZE);
569 #endif
572 int fixmaps_set;
574 void __native_set_fixmap(enum fixed_addresses idx, pte_t pte)
576 unsigned long address = __fix_to_virt(idx);
578 if (idx >= __end_of_fixed_addresses) {
579 BUG();
580 return;
582 set_pte_vaddr(address, pte);
583 fixmaps_set++;
586 void native_set_fixmap(enum fixed_addresses idx, phys_addr_t phys,
587 pgprot_t flags)
589 __native_set_fixmap(idx, pfn_pte(phys >> PAGE_SHIFT, flags));
592 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
593 #ifdef CONFIG_X86_5LEVEL
595 * p4d_set_huge - setup kernel P4D mapping
597 * No 512GB pages yet -- always return 0
599 int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
601 return 0;
605 * p4d_clear_huge - clear kernel P4D mapping when it is set
607 * No 512GB pages yet -- always return 0
609 int p4d_clear_huge(p4d_t *p4d)
611 return 0;
613 #endif
616 * pud_set_huge - setup kernel PUD mapping
618 * MTRRs can override PAT memory types with 4KiB granularity. Therefore, this
619 * function sets up a huge page only if any of the following conditions are met:
621 * - MTRRs are disabled, or
623 * - MTRRs are enabled and the range is completely covered by a single MTRR, or
625 * - MTRRs are enabled and the corresponding MTRR memory type is WB, which
626 * has no effect on the requested PAT memory type.
628 * Callers should try to decrease page size (1GB -> 2MB -> 4K) if the bigger
629 * page mapping attempt fails.
631 * Returns 1 on success and 0 on failure.
633 int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
635 u8 mtrr, uniform;
637 mtrr = mtrr_type_lookup(addr, addr + PUD_SIZE, &uniform);
638 if ((mtrr != MTRR_TYPE_INVALID) && (!uniform) &&
639 (mtrr != MTRR_TYPE_WRBACK))
640 return 0;
642 prot = pgprot_4k_2_large(prot);
644 set_pte((pte_t *)pud, pfn_pte(
645 (u64)addr >> PAGE_SHIFT,
646 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
648 return 1;
652 * pmd_set_huge - setup kernel PMD mapping
654 * See text over pud_set_huge() above.
656 * Returns 1 on success and 0 on failure.
658 int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
660 u8 mtrr, uniform;
662 mtrr = mtrr_type_lookup(addr, addr + PMD_SIZE, &uniform);
663 if ((mtrr != MTRR_TYPE_INVALID) && (!uniform) &&
664 (mtrr != MTRR_TYPE_WRBACK)) {
665 pr_warn_once("%s: Cannot satisfy [mem %#010llx-%#010llx] with a huge-page mapping due to MTRR override.\n",
666 __func__, addr, addr + PMD_SIZE);
667 return 0;
670 prot = pgprot_4k_2_large(prot);
672 set_pte((pte_t *)pmd, pfn_pte(
673 (u64)addr >> PAGE_SHIFT,
674 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
676 return 1;
680 * pud_clear_huge - clear kernel PUD mapping when it is set
682 * Returns 1 on success and 0 on failure (no PUD map is found).
684 int pud_clear_huge(pud_t *pud)
686 if (pud_large(*pud)) {
687 pud_clear(pud);
688 return 1;
691 return 0;
695 * pmd_clear_huge - clear kernel PMD mapping when it is set
697 * Returns 1 on success and 0 on failure (no PMD map is found).
699 int pmd_clear_huge(pmd_t *pmd)
701 if (pmd_large(*pmd)) {
702 pmd_clear(pmd);
703 return 1;
706 return 0;
708 #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */