drivers/net/ethernet/amazon/ena/ena_netdev.h

   1 /*
   2  * Copyright 2015 Amazon.com, Inc. or its affiliates.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #ifndef ENA_H
  34 #define ENA_H
  35
  36 #include <linux/bitops.h>
  37 #include <linux/etherdevice.h>
  38 #include <linux/inetdevice.h>
  39 #include <linux/interrupt.h>
  40 #include <linux/netdevice.h>
  41 #include <linux/skbuff.h>
  42
  43 #include "ena_com.h"
  44 #include "ena_eth_com.h"
  45
  46 #define DRV_MODULE_VER_MAJOR    1
  47 #define DRV_MODULE_VER_MINOR    2
  48 #define DRV_MODULE_VER_SUBMINOR 0
  49
  50 #define DRV_MODULE_NAME         "ena"
  51 #ifndef DRV_MODULE_VERSION
  52 #define DRV_MODULE_VERSION \
  53         __stringify(DRV_MODULE_VER_MAJOR) "."   \
  54         __stringify(DRV_MODULE_VER_MINOR) "."   \
  55         __stringify(DRV_MODULE_VER_SUBMINOR) "k"
  56 #endif
  57
  58 #define DEVICE_NAME     "Elastic Network Adapter (ENA)"
  59
  60 /* 1 for AENQ + ADMIN */
  61 #define ENA_ADMIN_MSIX_VEC              1
  62 #define ENA_MAX_MSIX_VEC(io_queues)     (ENA_ADMIN_MSIX_VEC + (io_queues))
  63
  64 #define ENA_MIN_MSIX_VEC                2
  65
  66 #define ENA_REG_BAR                     0
  67 #define ENA_MEM_BAR                     2
  68 #define ENA_BAR_MASK (BIT(ENA_REG_BAR) | BIT(ENA_MEM_BAR))
  69
  70 #define ENA_DEFAULT_RING_SIZE   (1024)
  71
  72 #define ENA_TX_WAKEUP_THRESH            (MAX_SKB_FRAGS + 2)
  73 #define ENA_DEFAULT_RX_COPYBREAK        (128 - NET_IP_ALIGN)
  74
  75 /* limit the buffer size to 600 bytes to handle MTU changes from very
  76  * small to very large, in which case the number of buffers per packet
  77  * could exceed ENA_PKT_MAX_BUFS
  78  */
  79 #define ENA_DEFAULT_MIN_RX_BUFF_ALLOC_SIZE 600
  80
  81 #define ENA_MIN_MTU             128
  82
  83 #define ENA_NAME_MAX_LEN        20
  84 #define ENA_IRQNAME_SIZE        40
  85
  86 #define ENA_PKT_MAX_BUFS        19
  87
  88 #define ENA_RX_RSS_TABLE_LOG_SIZE  7
  89 #define ENA_RX_RSS_TABLE_SIZE   (1 << ENA_RX_RSS_TABLE_LOG_SIZE)
  90
  91 #define ENA_HASH_KEY_SIZE       40
  92
  93 /* The number of tx packet completions that will be handled each NAPI poll
  94  * cycle is ring_size / ENA_TX_POLL_BUDGET_DIVIDER.
  95  */
  96 #define ENA_TX_POLL_BUDGET_DIVIDER      4
  97
  98 /* Refill Rx queue when number of available descriptors is below
  99  * QUEUE_SIZE / ENA_RX_REFILL_THRESH_DIVIDER
 100  */
 101 #define ENA_RX_REFILL_THRESH_DIVIDER    8
 102
 103 /* Number of queues to check for missing queues per timer service */
 104 #define ENA_MONITORED_TX_QUEUES 4
 105 /* Max timeout packets before device reset */
 106 #define MAX_NUM_OF_TIMEOUTED_PACKETS 128
 107
 108 #define ENA_TX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1))
 109
 110 #define ENA_RX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1))
 111 #define ENA_RX_RING_IDX_ADD(idx, n, ring_size) \
 112         (((idx) + (n)) & ((ring_size) - 1))
 113
 114 #define ENA_IO_TXQ_IDX(q)       (2 * (q))
 115 #define ENA_IO_RXQ_IDX(q)       (2 * (q) + 1)
 116
 117 #define ENA_MGMNT_IRQ_IDX               0
 118 #define ENA_IO_IRQ_FIRST_IDX            1
 119 #define ENA_IO_IRQ_IDX(q)               (ENA_IO_IRQ_FIRST_IDX + (q))
 120
 121 /* ENA device should send keep alive msg every 1 sec.
 122  * We wait for 6 sec just to be on the safe side.
 123  */
 124 #define ENA_DEVICE_KALIVE_TIMEOUT       (6 * HZ)
 125
 126 #define ENA_MMIO_DISABLE_REG_READ       BIT(0)
 127
 128 struct ena_irq {
 129         irq_handler_t handler;
 130         void *data;
 131         int cpu;
 132         u32 vector;
 133         cpumask_t affinity_hint_mask;
 134         char name[ENA_IRQNAME_SIZE];
 135 };
 136
 137 struct ena_napi {
 138         struct napi_struct napi ____cacheline_aligned;
 139         struct ena_ring *tx_ring;
 140         struct ena_ring *rx_ring;
 141         u32 qid;
 142 };
 143
 144 struct ena_tx_buffer {
 145         struct sk_buff *skb;
 146         /* num of ena desc for this specific skb
 147          * (includes data desc and metadata desc)
 148          */
 149         u32 tx_descs;
 150         /* num of buffers used by this skb */
 151         u32 num_of_bufs;
 152
 153         /* Used for detect missing tx packets to limit the number of prints */
 154         u32 print_once;
 155         /* Save the last jiffies to detect missing tx packets
 156          *
 157          * sets to non zero value on ena_start_xmit and set to zero on
 158          * napi and timer_Service_routine.
 159          *
 160          * while this value is not protected by lock,
 161          * a given packet is not expected to be handled by ena_start_xmit
 162          * and by napi/timer_service at the same time.
 163          */
 164         unsigned long last_jiffies;
 165         struct ena_com_buf bufs[ENA_PKT_MAX_BUFS];
 166 } ____cacheline_aligned;
 167
 168 struct ena_rx_buffer {
 169         struct sk_buff *skb;
 170         struct page *page;
 171         u32 page_offset;
 172         struct ena_com_buf ena_buf;
 173 } ____cacheline_aligned;
 174
 175 struct ena_stats_tx {
 176         u64 cnt;
 177         u64 bytes;
 178         u64 queue_stop;
 179         u64 prepare_ctx_err;
 180         u64 queue_wakeup;
 181         u64 dma_mapping_err;
 182         u64 linearize;
 183         u64 linearize_failed;
 184         u64 napi_comp;
 185         u64 tx_poll;
 186         u64 doorbells;
 187         u64 bad_req_id;
 188 };
 189
 190 struct ena_stats_rx {
 191         u64 cnt;
 192         u64 bytes;
 193         u64 refil_partial;
 194         u64 bad_csum;
 195         u64 page_alloc_fail;
 196         u64 skb_alloc_fail;
 197         u64 dma_mapping_err;
 198         u64 bad_desc_num;
 199         u64 rx_copybreak_pkt;
 200         u64 bad_req_id;
 201         u64 empty_rx_ring;
 202 };
 203
 204 struct ena_ring {
 205         union {
 206                 /* Holds the empty requests for TX/RX
 207                  * out of order completions
 208                  */
 209                 u16 *free_tx_ids;
 210                 u16 *free_rx_ids;
 211         };
 212
 213         union {
 214                 struct ena_tx_buffer *tx_buffer_info;
 215                 struct ena_rx_buffer *rx_buffer_info;
 216         };
 217
 218         /* cache ptr to avoid using the adapter */
 219         struct device *dev;
 220         struct pci_dev *pdev;
 221         struct napi_struct *napi;
 222         struct net_device *netdev;
 223         struct ena_com_dev *ena_dev;
 224         struct ena_adapter *adapter;
 225         struct ena_com_io_cq *ena_com_io_cq;
 226         struct ena_com_io_sq *ena_com_io_sq;
 227
 228         u16 next_to_use;
 229         u16 next_to_clean;
 230         u16 rx_copybreak;
 231         u16 qid;
 232         u16 mtu;
 233         u16 sgl_size;
 234
 235         /* The maximum header length the device can handle */
 236         u8 tx_max_header_size;
 237
 238         /* cpu for TPH */
 239         int cpu;
 240          /* number of tx/rx_buffer_info's entries */
 241         int ring_size;
 242
 243         enum ena_admin_placement_policy_type tx_mem_queue_type;
 244
 245         struct ena_com_rx_buf_info ena_bufs[ENA_PKT_MAX_BUFS];
 246         u32  smoothed_interval;
 247         u32  per_napi_packets;
 248         u32  per_napi_bytes;
 249         enum ena_intr_moder_level moder_tbl_idx;
 250         struct u64_stats_sync syncp;
 251         union {
 252                 struct ena_stats_tx tx_stats;
 253                 struct ena_stats_rx rx_stats;
 254         };
 255         int empty_rx_queue;
 256 } ____cacheline_aligned;
 257
 258 struct ena_stats_dev {
 259         u64 tx_timeout;
 260         u64 io_suspend;
 261         u64 io_resume;
 262         u64 wd_expired;
 263         u64 interface_up;
 264         u64 interface_down;
 265         u64 admin_q_pause;
 266         u64 rx_drops;
 267 };
 268
 269 enum ena_flags_t {
 270         ENA_FLAG_DEVICE_RUNNING,
 271         ENA_FLAG_DEV_UP,
 272         ENA_FLAG_LINK_UP,
 273         ENA_FLAG_MSIX_ENABLED,
 274         ENA_FLAG_TRIGGER_RESET
 275 };
 276
 277 /* adapter specific private data structure */
 278 struct ena_adapter {
 279         struct ena_com_dev *ena_dev;
 280         /* OS defined structs */
 281         struct net_device *netdev;
 282         struct pci_dev *pdev;
 283
 284         /* rx packets that shorter that this len will be copied to the skb
 285          * header
 286          */
 287         u32 rx_copybreak;
 288         u32 max_mtu;
 289
 290         int num_queues;
 291
 292         int msix_vecs;
 293
 294         u32 missing_tx_completion_threshold;
 295
 296         u32 tx_usecs, rx_usecs; /* interrupt moderation */
 297         u32 tx_frames, rx_frames; /* interrupt moderation */
 298
 299         u32 tx_ring_size;
 300         u32 rx_ring_size;
 301
 302         u32 msg_enable;
 303
 304         u16 max_tx_sgl_size;
 305         u16 max_rx_sgl_size;
 306
 307         u8 mac_addr[ETH_ALEN];
 308
 309         unsigned long keep_alive_timeout;
 310         unsigned long missing_tx_completion_to;
 311
 312         char name[ENA_NAME_MAX_LEN];
 313
 314         unsigned long flags;
 315         /* TX */
 316         struct ena_ring tx_ring[ENA_MAX_NUM_IO_QUEUES]
 317                 ____cacheline_aligned_in_smp;
 318
 319         /* RX */
 320         struct ena_ring rx_ring[ENA_MAX_NUM_IO_QUEUES]
 321                 ____cacheline_aligned_in_smp;
 322
 323         struct ena_napi ena_napi[ENA_MAX_NUM_IO_QUEUES];
 324
 325         struct ena_irq irq_tbl[ENA_MAX_MSIX_VEC(ENA_MAX_NUM_IO_QUEUES)];
 326
 327         /* timer service */
 328         struct work_struct reset_task;
 329         struct work_struct suspend_io_task;
 330         struct work_struct resume_io_task;
 331         struct timer_list timer_service;
 332
 333         bool wd_state;
 334         unsigned long last_keep_alive_jiffies;
 335
 336         struct u64_stats_sync syncp;
 337         struct ena_stats_dev dev_stats;
 338
 339         /* last queue index that was checked for uncompleted tx packets */
 340         u32 last_monitored_tx_qid;
 341
 342         enum ena_regs_reset_reason_types reset_reason;
 343 };
 344
 345 void ena_set_ethtool_ops(struct net_device *netdev);
 346
 347 void ena_dump_stats_to_dmesg(struct ena_adapter *adapter);
 348
 349 void ena_dump_stats_to_buf(struct ena_adapter *adapter, u8 *buf);
 350
 351 int ena_get_sset_count(struct net_device *netdev, int sset);
 352
 353 #endif /* !(ENA_H) */