cfg80211: fix scan crash on single-band cards
[linux/fpc-iii.git] / arch / blackfin / mach-bf537 / boards / pnav10.c
blob9389f03e3b0a495294753e7e0180a8302598066e
1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
6 * Licensed under the GPL-2 or later.
7 */
9 #include <linux/device.h>
10 #include <linux/etherdevice.h>
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16 #include <linux/irq.h>
17 #include <asm/dma.h>
18 #include <asm/bfin5xx_spi.h>
19 #include <asm/portmux.h>
21 #include <linux/spi/ad7877.h>
24 * Name the Board for the /proc/cpuinfo
26 const char bfin_board_name[] = "ADI PNAV-1.0";
29 * Driver needs to know address, irq and flag pin.
32 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
33 static struct resource bfin_pcmcia_cf_resources[] = {
35 .start = 0x20310000, /* IO PORT */
36 .end = 0x20312000,
37 .flags = IORESOURCE_MEM,
38 }, {
39 .start = 0x20311000, /* Attribute Memory */
40 .end = 0x20311FFF,
41 .flags = IORESOURCE_MEM,
42 }, {
43 .start = IRQ_PF4,
44 .end = IRQ_PF4,
45 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
46 }, {
47 .start = 6, /* Card Detect PF6 */
48 .end = 6,
49 .flags = IORESOURCE_IRQ,
53 static struct platform_device bfin_pcmcia_cf_device = {
54 .name = "bfin_cf_pcmcia",
55 .id = -1,
56 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
57 .resource = bfin_pcmcia_cf_resources,
59 #endif
61 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
62 static struct platform_device rtc_device = {
63 .name = "rtc-bfin",
64 .id = -1,
66 #endif
68 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
69 #include <linux/smc91x.h>
71 static struct smc91x_platdata smc91x_info = {
72 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
73 .leda = RPC_LED_100_10,
74 .ledb = RPC_LED_TX_RX,
77 static struct resource smc91x_resources[] = {
79 .name = "smc91x-regs",
80 .start = 0x20300300,
81 .end = 0x20300300 + 16,
82 .flags = IORESOURCE_MEM,
83 }, {
85 .start = IRQ_PF7,
86 .end = IRQ_PF7,
87 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
90 static struct platform_device smc91x_device = {
91 .name = "smc91x",
92 .id = 0,
93 .num_resources = ARRAY_SIZE(smc91x_resources),
94 .resource = smc91x_resources,
95 .dev = {
96 .platform_data = &smc91x_info,
99 #endif
101 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
102 #include <linux/bfin_mac.h>
103 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
105 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
107 .addr = 1,
108 .irq = IRQ_MAC_PHYINT,
112 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
113 .phydev_number = 1,
114 .phydev_data = bfin_phydev_data,
115 .phy_mode = PHY_INTERFACE_MODE_RMII,
116 .mac_peripherals = bfin_mac_peripherals,
119 static struct platform_device bfin_mii_bus = {
120 .name = "bfin_mii_bus",
121 .dev = {
122 .platform_data = &bfin_mii_bus_data,
126 static struct platform_device bfin_mac_device = {
127 .name = "bfin_mac",
128 .dev = {
129 .platform_data = &bfin_mii_bus,
132 #endif
134 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
135 static struct resource net2272_bfin_resources[] = {
137 .start = 0x20300000,
138 .end = 0x20300000 + 0x100,
139 .flags = IORESOURCE_MEM,
140 }, {
141 .start = IRQ_PF7,
142 .end = IRQ_PF7,
143 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
147 static struct platform_device net2272_bfin_device = {
148 .name = "net2272",
149 .id = -1,
150 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
151 .resource = net2272_bfin_resources,
153 #endif
155 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
156 /* all SPI peripherals info goes here */
158 #if defined(CONFIG_MTD_M25P80) \
159 || defined(CONFIG_MTD_M25P80_MODULE)
160 static struct mtd_partition bfin_spi_flash_partitions[] = {
162 .name = "bootloader(spi)",
163 .size = 0x00020000,
164 .offset = 0,
165 .mask_flags = MTD_CAP_ROM
166 }, {
167 .name = "linux kernel(spi)",
168 .size = 0xe0000,
169 .offset = 0x20000
170 }, {
171 .name = "file system(spi)",
172 .size = 0x700000,
173 .offset = 0x00100000,
177 static struct flash_platform_data bfin_spi_flash_data = {
178 .name = "m25p80",
179 .parts = bfin_spi_flash_partitions,
180 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
181 .type = "m25p64",
184 /* SPI flash chip (m25p64) */
185 static struct bfin5xx_spi_chip spi_flash_chip_info = {
186 .enable_dma = 0, /* use dma transfer with this chip*/
187 .bits_per_word = 8,
189 #endif
191 #if defined(CONFIG_BFIN_SPI_ADC) \
192 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
193 /* SPI ADC chip */
194 static struct bfin5xx_spi_chip spi_adc_chip_info = {
195 .enable_dma = 1, /* use dma transfer with this chip*/
196 .bits_per_word = 16,
198 #endif
200 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
201 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
202 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
203 .enable_dma = 0,
204 .bits_per_word = 16,
206 #endif
208 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
209 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
210 .enable_dma = 0,
211 .bits_per_word = 8,
213 #endif
215 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
216 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
217 .enable_dma = 0,
218 .bits_per_word = 16,
221 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
222 .model = 7877,
223 .vref_delay_usecs = 50, /* internal, no capacitor */
224 .x_plate_ohms = 419,
225 .y_plate_ohms = 486,
226 .pressure_max = 1000,
227 .pressure_min = 0,
228 .stopacq_polarity = 1,
229 .first_conversion_delay = 3,
230 .acquisition_time = 1,
231 .averaging = 1,
232 .pen_down_acc_interval = 1,
234 #endif
236 static struct spi_board_info bfin_spi_board_info[] __initdata = {
237 #if defined(CONFIG_MTD_M25P80) \
238 || defined(CONFIG_MTD_M25P80_MODULE)
240 /* the modalias must be the same as spi device driver name */
241 .modalias = "m25p80", /* Name of spi_driver for this device */
242 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
243 .bus_num = 0, /* Framework bus number */
244 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
245 .platform_data = &bfin_spi_flash_data,
246 .controller_data = &spi_flash_chip_info,
247 .mode = SPI_MODE_3,
249 #endif
251 #if defined(CONFIG_BFIN_SPI_ADC) \
252 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
254 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
255 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
256 .bus_num = 0, /* Framework bus number */
257 .chip_select = 1, /* Framework chip select. */
258 .platform_data = NULL, /* No spi_driver specific config */
259 .controller_data = &spi_adc_chip_info,
261 #endif
263 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
264 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
266 .modalias = "ad183x",
267 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
268 .bus_num = 0,
269 .chip_select = 4,
270 .controller_data = &ad1836_spi_chip_info,
272 #endif
273 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
275 .modalias = "mmc_spi",
276 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
277 .bus_num = 0,
278 .chip_select = 5,
279 .controller_data = &mmc_spi_chip_info,
280 .mode = SPI_MODE_3,
282 #endif
283 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
285 .modalias = "ad7877",
286 .platform_data = &bfin_ad7877_ts_info,
287 .irq = IRQ_PF2,
288 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
289 .bus_num = 0,
290 .chip_select = 5,
291 .controller_data = &spi_ad7877_chip_info,
293 #endif
297 /* SPI (0) */
298 static struct resource bfin_spi0_resource[] = {
299 [0] = {
300 .start = SPI0_REGBASE,
301 .end = SPI0_REGBASE + 0xFF,
302 .flags = IORESOURCE_MEM,
304 [1] = {
305 .start = CH_SPI,
306 .end = CH_SPI,
307 .flags = IORESOURCE_DMA,
309 [2] = {
310 .start = IRQ_SPI,
311 .end = IRQ_SPI,
312 .flags = IORESOURCE_IRQ,
316 /* SPI controller data */
317 static struct bfin5xx_spi_master bfin_spi0_info = {
318 .num_chipselect = 8,
319 .enable_dma = 1, /* master has the ability to do dma transfer */
320 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
323 static struct platform_device bfin_spi0_device = {
324 .name = "bfin-spi",
325 .id = 0, /* Bus number */
326 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
327 .resource = bfin_spi0_resource,
328 .dev = {
329 .platform_data = &bfin_spi0_info, /* Passed to driver */
332 #endif /* spi master and devices */
334 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
335 static struct platform_device bfin_fb_device = {
336 .name = "bf537-lq035",
338 #endif
340 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
341 #ifdef CONFIG_SERIAL_BFIN_UART0
342 static struct resource bfin_uart0_resources[] = {
344 .start = UART0_THR,
345 .end = UART0_GCTL+2,
346 .flags = IORESOURCE_MEM,
349 .start = IRQ_UART0_RX,
350 .end = IRQ_UART0_RX+1,
351 .flags = IORESOURCE_IRQ,
354 .start = IRQ_UART0_ERROR,
355 .end = IRQ_UART0_ERROR,
356 .flags = IORESOURCE_IRQ,
359 .start = CH_UART0_TX,
360 .end = CH_UART0_TX,
361 .flags = IORESOURCE_DMA,
364 .start = CH_UART0_RX,
365 .end = CH_UART0_RX,
366 .flags = IORESOURCE_DMA,
370 static unsigned short bfin_uart0_peripherals[] = {
371 P_UART0_TX, P_UART0_RX, 0
374 static struct platform_device bfin_uart0_device = {
375 .name = "bfin-uart",
376 .id = 0,
377 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
378 .resource = bfin_uart0_resources,
379 .dev = {
380 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
383 #endif
384 #ifdef CONFIG_SERIAL_BFIN_UART1
385 static struct resource bfin_uart1_resources[] = {
387 .start = UART1_THR,
388 .end = UART1_GCTL+2,
389 .flags = IORESOURCE_MEM,
392 .start = IRQ_UART1_RX,
393 .end = IRQ_UART1_RX+1,
394 .flags = IORESOURCE_IRQ,
397 .start = IRQ_UART1_ERROR,
398 .end = IRQ_UART1_ERROR,
399 .flags = IORESOURCE_IRQ,
402 .start = CH_UART1_TX,
403 .end = CH_UART1_TX,
404 .flags = IORESOURCE_DMA,
407 .start = CH_UART1_RX,
408 .end = CH_UART1_RX,
409 .flags = IORESOURCE_DMA,
413 static unsigned short bfin_uart1_peripherals[] = {
414 P_UART1_TX, P_UART1_RX, 0
417 static struct platform_device bfin_uart1_device = {
418 .name = "bfin-uart",
419 .id = 1,
420 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
421 .resource = bfin_uart1_resources,
422 .dev = {
423 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
426 #endif
427 #endif
429 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
430 #ifdef CONFIG_BFIN_SIR0
431 static struct resource bfin_sir0_resources[] = {
433 .start = 0xFFC00400,
434 .end = 0xFFC004FF,
435 .flags = IORESOURCE_MEM,
438 .start = IRQ_UART0_RX,
439 .end = IRQ_UART0_RX+1,
440 .flags = IORESOURCE_IRQ,
443 .start = CH_UART0_RX,
444 .end = CH_UART0_RX+1,
445 .flags = IORESOURCE_DMA,
449 static struct platform_device bfin_sir0_device = {
450 .name = "bfin_sir",
451 .id = 0,
452 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
453 .resource = bfin_sir0_resources,
455 #endif
456 #ifdef CONFIG_BFIN_SIR1
457 static struct resource bfin_sir1_resources[] = {
459 .start = 0xFFC02000,
460 .end = 0xFFC020FF,
461 .flags = IORESOURCE_MEM,
464 .start = IRQ_UART1_RX,
465 .end = IRQ_UART1_RX+1,
466 .flags = IORESOURCE_IRQ,
469 .start = CH_UART1_RX,
470 .end = CH_UART1_RX+1,
471 .flags = IORESOURCE_DMA,
475 static struct platform_device bfin_sir1_device = {
476 .name = "bfin_sir",
477 .id = 1,
478 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
479 .resource = bfin_sir1_resources,
481 #endif
482 #endif
484 static struct platform_device *stamp_devices[] __initdata = {
485 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
486 &bfin_pcmcia_cf_device,
487 #endif
489 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
490 &rtc_device,
491 #endif
493 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
494 &smc91x_device,
495 #endif
497 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
498 &bfin_mii_bus,
499 &bfin_mac_device,
500 #endif
502 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
503 &net2272_bfin_device,
504 #endif
506 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
507 &bfin_spi0_device,
508 #endif
510 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
511 &bfin_fb_device,
512 #endif
514 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
515 #ifdef CONFIG_SERIAL_BFIN_UART0
516 &bfin_uart0_device,
517 #endif
518 #ifdef CONFIG_SERIAL_BFIN_UART1
519 &bfin_uart1_device,
520 #endif
521 #endif
523 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
524 #ifdef CONFIG_BFIN_SIR0
525 &bfin_sir0_device,
526 #endif
527 #ifdef CONFIG_BFIN_SIR1
528 &bfin_sir1_device,
529 #endif
530 #endif
533 static int __init pnav_init(void)
535 printk(KERN_INFO "%s(): registering device resources\n", __func__);
536 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
537 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
538 spi_register_board_info(bfin_spi_board_info,
539 ARRAY_SIZE(bfin_spi_board_info));
540 #endif
541 return 0;
544 arch_initcall(pnav_init);
546 static struct platform_device *stamp_early_devices[] __initdata = {
547 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
548 #ifdef CONFIG_SERIAL_BFIN_UART0
549 &bfin_uart0_device,
550 #endif
551 #ifdef CONFIG_SERIAL_BFIN_UART1
552 &bfin_uart1_device,
553 #endif
554 #endif
557 void __init native_machine_early_platform_add_devices(void)
559 printk(KERN_INFO "register early platform devices\n");
560 early_platform_add_devices(stamp_early_devices,
561 ARRAY_SIZE(stamp_early_devices));
564 void bfin_get_ether_addr(char *addr)
566 random_ether_addr(addr);
567 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
569 EXPORT_SYMBOL(bfin_get_ether_addr);