2 * SMP boot-related support
4 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
6 * Copyright (C) 2001, 2004-2005 Intel Corp
7 * Rohit Seth <rohit.seth@intel.com>
8 * Suresh Siddha <suresh.b.siddha@intel.com>
9 * Gordon Jin <gordon.jin@intel.com>
10 * Ashok Raj <ashok.raj@intel.com>
12 * 01/05/16 Rohit Seth <rohit.seth@intel.com> Moved SMP booting functions from smp.c to here.
13 * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code.
14 * 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence.
15 * smp_boot_cpus()/smp_commence() is replaced by
16 * smp_prepare_cpus()/__cpu_up()/smp_cpus_done().
17 * 04/06/21 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
18 * 04/12/26 Jin Gordon <gordon.jin@intel.com>
19 * 04/12/26 Rohit Seth <rohit.seth@intel.com>
20 * Add multi-threading and multi-core detection
21 * 05/01/30 Suresh Siddha <suresh.b.siddha@intel.com>
22 * Setup cpu_sibling_map and cpu_core_map
25 #include <linux/module.h>
26 #include <linux/acpi.h>
27 #include <linux/bootmem.h>
28 #include <linux/cpu.h>
29 #include <linux/delay.h>
30 #include <linux/init.h>
31 #include <linux/interrupt.h>
32 #include <linux/irq.h>
33 #include <linux/kernel.h>
34 #include <linux/kernel_stat.h>
36 #include <linux/notifier.h>
37 #include <linux/smp.h>
38 #include <linux/spinlock.h>
39 #include <linux/efi.h>
40 #include <linux/percpu.h>
41 #include <linux/bitops.h>
43 #include <linux/atomic.h>
44 #include <asm/cache.h>
45 #include <asm/current.h>
46 #include <asm/delay.h>
49 #include <asm/machvec.h>
52 #include <asm/paravirt.h>
53 #include <asm/pgalloc.h>
54 #include <asm/pgtable.h>
55 #include <asm/processor.h>
56 #include <asm/ptrace.h>
58 #include <asm/tlbflush.h>
59 #include <asm/unistd.h>
60 #include <asm/sn/arch.h>
65 #define Dprintk(x...) printk(x)
70 #ifdef CONFIG_HOTPLUG_CPU
71 #ifdef CONFIG_PERMIT_BSP_REMOVE
72 #define bsp_remove_ok 1
74 #define bsp_remove_ok 0
78 * Global array allocated for NR_CPUS at boot time
80 struct sal_to_os_boot sal_boot_rendez_state
[NR_CPUS
];
83 * start_ap in head.S uses this to store current booting cpu
86 struct sal_to_os_boot
*sal_state_for_booting_cpu
= &sal_boot_rendez_state
[0];
88 #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]);
91 #define set_brendez_area(x)
96 * ITC synchronization related stuff:
99 #define SLAVE (SMP_CACHE_BYTES/8)
101 #define NUM_ROUNDS 64 /* magic value */
102 #define NUM_ITERS 5 /* likewise */
104 static DEFINE_SPINLOCK(itc_sync_lock
);
105 static volatile unsigned long go
[SLAVE
+ 1];
107 #define DEBUG_ITC_SYNC 0
109 extern void start_ap (void);
110 extern unsigned long ia64_iobase
;
112 struct task_struct
*task_for_booting_cpu
;
117 DEFINE_PER_CPU(int, cpu_state
);
119 cpumask_t cpu_core_map
[NR_CPUS
] __cacheline_aligned
;
120 EXPORT_SYMBOL(cpu_core_map
);
121 DEFINE_PER_CPU_SHARED_ALIGNED(cpumask_t
, cpu_sibling_map
);
122 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map
);
124 int smp_num_siblings
= 1;
126 /* which logical CPU number maps to which CPU (physical APIC ID) */
127 volatile int ia64_cpu_to_sapicid
[NR_CPUS
];
128 EXPORT_SYMBOL(ia64_cpu_to_sapicid
);
130 static volatile cpumask_t cpu_callin_map
;
132 struct smp_boot_data smp_boot_data __initdata
;
134 unsigned long ap_wakeup_vector
= -1; /* External Int use to wakeup APs */
136 char __initdata no_int_routing
;
138 unsigned char smp_int_redirect
; /* are INT and IPI redirectable by the chipset? */
140 #ifdef CONFIG_FORCE_CPEI_RETARGET
141 #define CPEI_OVERRIDE_DEFAULT (1)
143 #define CPEI_OVERRIDE_DEFAULT (0)
146 unsigned int force_cpei_retarget
= CPEI_OVERRIDE_DEFAULT
;
149 cmdl_force_cpei(char *str
)
153 get_option (&str
, &value
);
154 force_cpei_retarget
= value
;
159 __setup("force_cpei=", cmdl_force_cpei
);
162 nointroute (char *str
)
165 printk ("no_int_routing on\n");
169 __setup("nointroute", nointroute
);
171 static void fix_b0_for_bsp(void)
173 #ifdef CONFIG_HOTPLUG_CPU
175 static int fix_bsp_b0
= 1;
177 cpuid
= smp_processor_id();
180 * Cache the b0 value on the first AP that comes up
182 if (!(fix_bsp_b0
&& cpuid
))
185 sal_boot_rendez_state
[0].br
[0] = sal_boot_rendez_state
[cpuid
].br
[0];
186 printk ("Fixed BSP b0 value from CPU %d\n", cpuid
);
193 sync_master (void *arg
)
195 unsigned long flags
, i
;
199 local_irq_save(flags
);
201 for (i
= 0; i
< NUM_ROUNDS
*NUM_ITERS
; ++i
) {
205 go
[SLAVE
] = ia64_get_itc();
208 local_irq_restore(flags
);
212 * Return the number of cycles by which our itc differs from the itc on the master
213 * (time-keeper) CPU. A positive number indicates our itc is ahead of the master,
214 * negative that it is behind.
217 get_delta (long *rt
, long *master
)
219 unsigned long best_t0
= 0, best_t1
= ~0UL, best_tm
= 0;
220 unsigned long tcenter
, t0
, t1
, tm
;
223 for (i
= 0; i
< NUM_ITERS
; ++i
) {
226 while (!(tm
= go
[SLAVE
]))
231 if (t1
- t0
< best_t1
- best_t0
)
232 best_t0
= t0
, best_t1
= t1
, best_tm
= tm
;
235 *rt
= best_t1
- best_t0
;
236 *master
= best_tm
- best_t0
;
238 /* average best_t0 and best_t1 without overflow: */
239 tcenter
= (best_t0
/2 + best_t1
/2);
240 if (best_t0
% 2 + best_t1
% 2 == 2)
242 return tcenter
- best_tm
;
246 * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU
247 * (normally the time-keeper CPU). We use a closed loop to eliminate the possibility of
248 * unaccounted-for errors (such as getting a machine check in the middle of a calibration
249 * step). The basic idea is for the slave to ask the master what itc value it has and to
250 * read its own itc before and after the master responds. Each iteration gives us three
264 * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0
265 * and t1. If we achieve this, the clocks are synchronized provided the interconnect
266 * between the slave and the master is symmetric. Even if the interconnect were
267 * asymmetric, we would still know that the synchronization error is smaller than the
268 * roundtrip latency (t0 - t1).
270 * When the interconnect is quiet and symmetric, this lets us synchronize the itc to
271 * within one or two cycles. However, we can only *guarantee* that the synchronization is
272 * accurate to within a round-trip time, which is typically in the range of several
273 * hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually
274 * almost perfectly synchronized, but we shouldn't assume that the accuracy is much better
275 * than half a micro second or so.
278 ia64_sync_itc (unsigned int master
)
280 long i
, delta
, adj
, adjust_latency
= 0, done
= 0;
281 unsigned long flags
, rt
, master_time_stamp
, bound
;
284 long rt
; /* roundtrip time */
285 long master
; /* master's timestamp */
286 long diff
; /* difference between midpoint and master's timestamp */
287 long lat
; /* estimate of itc adjustment latency */
292 * Make sure local timer ticks are disabled while we sync. If
293 * they were enabled, we'd have to worry about nasty issues
294 * like setting the ITC ahead of (or a long time before) the
295 * next scheduled tick.
297 BUG_ON((ia64_get_itv() & (1 << 16)) == 0);
301 if (smp_call_function_single(master
, sync_master
, NULL
, 0) < 0) {
302 printk(KERN_ERR
"sync_itc: failed to get attention of CPU %u!\n", master
);
307 cpu_relax(); /* wait for master to be ready */
309 spin_lock_irqsave(&itc_sync_lock
, flags
);
311 for (i
= 0; i
< NUM_ROUNDS
; ++i
) {
312 delta
= get_delta(&rt
, &master_time_stamp
);
314 done
= 1; /* let's lock on to this... */
320 adjust_latency
+= -delta
;
321 adj
= -delta
+ adjust_latency
/4;
325 ia64_set_itc(ia64_get_itc() + adj
);
329 t
[i
].master
= master_time_stamp
;
331 t
[i
].lat
= adjust_latency
/4;
335 spin_unlock_irqrestore(&itc_sync_lock
, flags
);
338 for (i
= 0; i
< NUM_ROUNDS
; ++i
)
339 printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n",
340 t
[i
].rt
, t
[i
].master
, t
[i
].diff
, t
[i
].lat
);
343 printk(KERN_INFO
"CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, "
344 "maxerr %lu cycles)\n", smp_processor_id(), master
, delta
, rt
);
348 * Ideally sets up per-cpu profiling hooks. Doesn't do much now...
350 static inline void smp_setup_percpu_timer(void)
357 int cpuid
, phys_id
, itc_master
;
358 struct cpuinfo_ia64
*last_cpuinfo
, *this_cpuinfo
;
359 extern void ia64_init_itm(void);
360 extern volatile int time_keeper_id
;
362 #ifdef CONFIG_PERFMON
363 extern void pfm_init_percpu(void);
366 cpuid
= smp_processor_id();
367 phys_id
= hard_smp_processor_id();
368 itc_master
= time_keeper_id
;
370 if (cpu_online(cpuid
)) {
371 printk(KERN_ERR
"huh, phys CPU#0x%x, CPU#0x%x already present??\n",
379 * numa_node_id() works after this.
381 set_numa_node(cpu_to_node_map
[cpuid
]);
382 set_numa_mem(local_memory_node(cpu_to_node_map
[cpuid
]));
384 spin_lock(&vector_lock
);
385 /* Setup the per cpu irq handling data structures */
386 __setup_vector_irq(cpuid
);
387 notify_cpu_starting(cpuid
);
388 set_cpu_online(cpuid
, true);
389 per_cpu(cpu_state
, cpuid
) = CPU_ONLINE
;
390 spin_unlock(&vector_lock
);
392 smp_setup_percpu_timer();
394 ia64_mca_cmc_vector_setup(); /* Setup vector on AP */
396 #ifdef CONFIG_PERFMON
402 if (!(sal_platform_features
& IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT
)) {
404 * Synchronize the ITC with the BP. Need to do this after irqs are
405 * enabled because ia64_sync_itc() calls smp_call_function_single(), which
406 * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls
407 * local_bh_enable(), which bugs out if irqs are not enabled...
409 Dprintk("Going to syncup ITC with ITC Master.\n");
410 ia64_sync_itc(itc_master
);
419 * Delay calibration can be skipped if new processor is identical to the
420 * previous processor.
422 last_cpuinfo
= cpu_data(cpuid
- 1);
423 this_cpuinfo
= local_cpu_data
;
424 if (last_cpuinfo
->itc_freq
!= this_cpuinfo
->itc_freq
||
425 last_cpuinfo
->proc_freq
!= this_cpuinfo
->proc_freq
||
426 last_cpuinfo
->features
!= this_cpuinfo
->features
||
427 last_cpuinfo
->revision
!= this_cpuinfo
->revision
||
428 last_cpuinfo
->family
!= this_cpuinfo
->family
||
429 last_cpuinfo
->archrev
!= this_cpuinfo
->archrev
||
430 last_cpuinfo
->model
!= this_cpuinfo
->model
)
432 local_cpu_data
->loops_per_jiffy
= loops_per_jiffy
;
435 * Allow the master to continue.
437 cpu_set(cpuid
, cpu_callin_map
);
438 Dprintk("Stack on CPU %d at about %p\n",cpuid
, &cpuid
);
443 * Activate a secondary processor. head.S calls this.
446 start_secondary (void *unused
)
448 /* Early console may use I/O ports */
449 ia64_set_kr(IA64_KR_IO_BASE
, __pa(ia64_iobase
));
450 #ifndef CONFIG_PRINTK_TIME
451 Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id());
458 cpu_startup_entry(CPUHP_ONLINE
);
463 do_boot_cpu (int sapicid
, int cpu
, struct task_struct
*idle
)
467 task_for_booting_cpu
= idle
;
468 Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector
, cpu
, sapicid
);
470 set_brendez_area(cpu
);
471 platform_send_ipi(cpu
, ap_wakeup_vector
, IA64_IPI_DM_INT
, 0);
474 * Wait 10s total for the AP to start
476 Dprintk("Waiting on callin_map ...");
477 for (timeout
= 0; timeout
< 100000; timeout
++) {
478 if (cpu_isset(cpu
, cpu_callin_map
))
479 break; /* It has booted */
484 if (!cpu_isset(cpu
, cpu_callin_map
)) {
485 printk(KERN_ERR
"Processor 0x%x/0x%x is stuck.\n", cpu
, sapicid
);
486 ia64_cpu_to_sapicid
[cpu
] = -1;
487 set_cpu_online(cpu
, false); /* was set in smp_callin() */
497 get_option (&str
, &ticks
);
501 __setup("decay=", decay
);
504 * Initialize the logical CPU number to SAPICID mapping
507 smp_build_cpu_map (void)
510 int boot_cpu_id
= hard_smp_processor_id();
512 for (cpu
= 0; cpu
< NR_CPUS
; cpu
++) {
513 ia64_cpu_to_sapicid
[cpu
] = -1;
516 ia64_cpu_to_sapicid
[0] = boot_cpu_id
;
517 init_cpu_present(cpumask_of(0));
518 set_cpu_possible(0, true);
519 for (cpu
= 1, i
= 0; i
< smp_boot_data
.cpu_count
; i
++) {
520 sapicid
= smp_boot_data
.cpu_phys_id
[i
];
521 if (sapicid
== boot_cpu_id
)
523 set_cpu_present(cpu
, true);
524 set_cpu_possible(cpu
, true);
525 ia64_cpu_to_sapicid
[cpu
] = sapicid
;
531 * Cycle through the APs sending Wakeup IPIs to boot each.
534 smp_prepare_cpus (unsigned int max_cpus
)
536 int boot_cpu_id
= hard_smp_processor_id();
539 * Initialize the per-CPU profiling counter/multiplier
542 smp_setup_percpu_timer();
544 cpu_set(0, cpu_callin_map
);
546 local_cpu_data
->loops_per_jiffy
= loops_per_jiffy
;
547 ia64_cpu_to_sapicid
[0] = boot_cpu_id
;
549 printk(KERN_INFO
"Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id
);
551 current_thread_info()->cpu
= 0;
554 * If SMP should be disabled, then really disable it!
557 printk(KERN_INFO
"SMP mode deactivated.\n");
558 init_cpu_online(cpumask_of(0));
559 init_cpu_present(cpumask_of(0));
560 init_cpu_possible(cpumask_of(0));
565 void smp_prepare_boot_cpu(void)
567 set_cpu_online(smp_processor_id(), true);
568 cpu_set(smp_processor_id(), cpu_callin_map
);
569 set_numa_node(cpu_to_node_map
[smp_processor_id()]);
570 per_cpu(cpu_state
, smp_processor_id()) = CPU_ONLINE
;
571 paravirt_post_smp_prepare_boot_cpu();
574 #ifdef CONFIG_HOTPLUG_CPU
576 clear_cpu_sibling_map(int cpu
)
580 for_each_cpu_mask(i
, per_cpu(cpu_sibling_map
, cpu
))
581 cpu_clear(cpu
, per_cpu(cpu_sibling_map
, i
));
582 for_each_cpu_mask(i
, cpu_core_map
[cpu
])
583 cpu_clear(cpu
, cpu_core_map
[i
]);
585 per_cpu(cpu_sibling_map
, cpu
) = cpu_core_map
[cpu
] = CPU_MASK_NONE
;
589 remove_siblinginfo(int cpu
)
593 if (cpu_data(cpu
)->threads_per_core
== 1 &&
594 cpu_data(cpu
)->cores_per_socket
== 1) {
595 cpu_clear(cpu
, cpu_core_map
[cpu
]);
596 cpu_clear(cpu
, per_cpu(cpu_sibling_map
, cpu
));
600 last
= (cpus_weight(cpu_core_map
[cpu
]) == 1 ? 1 : 0);
602 /* remove it from all sibling map's */
603 clear_cpu_sibling_map(cpu
);
606 extern void fixup_irqs(void);
608 int migrate_platform_irqs(unsigned int cpu
)
611 struct irq_data
*data
= NULL
;
612 const struct cpumask
*mask
;
616 * dont permit CPEI target to removed.
618 if (cpe_vector
> 0 && is_cpu_cpei_target(cpu
)) {
619 printk ("CPU (%d) is CPEI Target\n", cpu
);
620 if (can_cpei_retarget()) {
622 * Now re-target the CPEI to a different processor
624 new_cpei_cpu
= cpumask_any(cpu_online_mask
);
625 mask
= cpumask_of(new_cpei_cpu
);
626 set_cpei_target_cpu(new_cpei_cpu
);
627 data
= irq_get_irq_data(ia64_cpe_irq
);
629 * Switch for now, immediately, we need to do fake intr
630 * as other interrupts, but need to study CPEI behaviour with
631 * polling before making changes.
633 if (data
&& data
->chip
) {
634 data
->chip
->irq_disable(data
);
635 data
->chip
->irq_set_affinity(data
, mask
, false);
636 data
->chip
->irq_enable(data
);
637 printk ("Re-targeting CPEI to cpu %d\n", new_cpei_cpu
);
641 printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu
);
648 /* must be called with cpucontrol mutex held */
649 int __cpu_disable(void)
651 int cpu
= smp_processor_id();
654 * dont permit boot processor for now
656 if (cpu
== 0 && !bsp_remove_ok
) {
657 printk ("Your platform does not support removal of BSP\n");
661 if (ia64_platform_is("sn2")) {
662 if (!sn_cpu_disable_allowed(cpu
))
666 set_cpu_online(cpu
, false);
668 if (migrate_platform_irqs(cpu
)) {
669 set_cpu_online(cpu
, true);
673 remove_siblinginfo(cpu
);
675 local_flush_tlb_all();
676 cpu_clear(cpu
, cpu_callin_map
);
680 void __cpu_die(unsigned int cpu
)
684 for (i
= 0; i
< 100; i
++) {
685 /* They ack this in play_dead by setting CPU_DEAD */
686 if (per_cpu(cpu_state
, cpu
) == CPU_DEAD
)
688 printk ("CPU %d is now offline\n", cpu
);
693 printk(KERN_ERR
"CPU %u didn't die...\n", cpu
);
695 #endif /* CONFIG_HOTPLUG_CPU */
698 smp_cpus_done (unsigned int dummy
)
701 unsigned long bogosum
= 0;
704 * Allow the user to impress friends.
707 for_each_online_cpu(cpu
) {
708 bogosum
+= cpu_data(cpu
)->loops_per_jiffy
;
711 printk(KERN_INFO
"Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
712 (int)num_online_cpus(), bogosum
/(500000/HZ
), (bogosum
/(5000/HZ
))%100);
715 static inline void set_cpu_sibling_map(int cpu
)
719 for_each_online_cpu(i
) {
720 if ((cpu_data(cpu
)->socket_id
== cpu_data(i
)->socket_id
)) {
721 cpu_set(i
, cpu_core_map
[cpu
]);
722 cpu_set(cpu
, cpu_core_map
[i
]);
723 if (cpu_data(cpu
)->core_id
== cpu_data(i
)->core_id
) {
724 cpu_set(i
, per_cpu(cpu_sibling_map
, cpu
));
725 cpu_set(cpu
, per_cpu(cpu_sibling_map
, i
));
732 __cpu_up(unsigned int cpu
, struct task_struct
*tidle
)
737 sapicid
= ia64_cpu_to_sapicid
[cpu
];
742 * Already booted cpu? not valid anymore since we dont
743 * do idle loop tightspin anymore.
745 if (cpu_isset(cpu
, cpu_callin_map
))
748 per_cpu(cpu_state
, cpu
) = CPU_UP_PREPARE
;
749 /* Processor goes to start_secondary(), sets online flag */
750 ret
= do_boot_cpu(sapicid
, cpu
, tidle
);
754 if (cpu_data(cpu
)->threads_per_core
== 1 &&
755 cpu_data(cpu
)->cores_per_socket
== 1) {
756 cpu_set(cpu
, per_cpu(cpu_sibling_map
, cpu
));
757 cpu_set(cpu
, cpu_core_map
[cpu
]);
761 set_cpu_sibling_map(cpu
);
767 * Assume that CPUs have been discovered by some platform-dependent interface. For
768 * SoftSDV/Lion, that would be ACPI.
770 * Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP().
773 init_smp_config(void)
781 /* Tell SAL where to drop the APs. */
782 ap_startup
= (struct fptr
*) start_ap
;
783 sal_ret
= ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ
,
784 ia64_tpa(ap_startup
->fp
), ia64_tpa(ap_startup
->gp
), 0, 0, 0, 0);
786 printk(KERN_ERR
"SMP: Can't set SAL AP Boot Rendezvous: %s\n",
787 ia64_sal_strerror(sal_ret
));
791 * identify_siblings(cpu) gets called from identify_cpu. This populates the
792 * information related to logical execution units in per_cpu_data structure.
794 void identify_siblings(struct cpuinfo_ia64
*c
)
798 pal_logical_to_physical_t info
;
800 status
= ia64_pal_logical_to_phys(-1, &info
);
801 if (status
!= PAL_STATUS_SUCCESS
) {
802 if (status
!= PAL_STATUS_UNIMPLEMENTED
) {
804 "ia64_pal_logical_to_phys failed with %ld\n",
809 info
.overview_ppid
= 0;
810 info
.overview_cpp
= 1;
811 info
.overview_tpc
= 1;
814 status
= ia64_sal_physical_id_info(&pltid
);
815 if (status
!= PAL_STATUS_SUCCESS
) {
816 if (status
!= PAL_STATUS_UNIMPLEMENTED
)
818 "ia64_sal_pltid failed with %ld\n",
823 c
->socket_id
= (pltid
<< 8) | info
.overview_ppid
;
825 if (info
.overview_cpp
== 1 && info
.overview_tpc
== 1)
828 c
->cores_per_socket
= info
.overview_cpp
;
829 c
->threads_per_core
= info
.overview_tpc
;
830 c
->num_log
= info
.overview_num_log
;
832 c
->core_id
= info
.log1_cid
;
833 c
->thread_id
= info
.log1_tid
;
837 * returns non zero, if multi-threading is enabled
838 * on at least one physical package. Due to hotplug cpu
839 * and (maxcpus=), all threads may not necessarily be enabled
840 * even though the processor supports multi-threading.
842 int is_multithreading_enabled(void)
846 for_each_present_cpu(i
) {
847 for_each_present_cpu(j
) {
850 if ((cpu_data(j
)->socket_id
== cpu_data(i
)->socket_id
)) {
851 if (cpu_data(j
)->core_id
== cpu_data(i
)->core_id
)
858 EXPORT_SYMBOL_GPL(is_multithreading_enabled
);