2 * Copyright (C) 2017 MediaTek, Inc.
4 * Author: Chen Zhong <chen.zhong@mediatek.com>
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/input.h>
20 #include <linux/interrupt.h>
21 #include <linux/platform_device.h>
22 #include <linux/kernel.h>
24 #include <linux/of_device.h>
25 #include <linux/regmap.h>
26 #include <linux/mfd/mt6323/registers.h>
27 #include <linux/mfd/mt6397/registers.h>
28 #include <linux/mfd/mt6397/core.h>
30 #define MTK_PMIC_PWRKEY_RST_EN_MASK 0x1
31 #define MTK_PMIC_PWRKEY_RST_EN_SHIFT 6
32 #define MTK_PMIC_HOMEKEY_RST_EN_MASK 0x1
33 #define MTK_PMIC_HOMEKEY_RST_EN_SHIFT 5
34 #define MTK_PMIC_RST_DU_MASK 0x3
35 #define MTK_PMIC_RST_DU_SHIFT 8
37 #define MTK_PMIC_PWRKEY_RST \
38 (MTK_PMIC_PWRKEY_RST_EN_MASK << MTK_PMIC_PWRKEY_RST_EN_SHIFT)
39 #define MTK_PMIC_HOMEKEY_RST \
40 (MTK_PMIC_HOMEKEY_RST_EN_MASK << MTK_PMIC_HOMEKEY_RST_EN_SHIFT)
42 #define MTK_PMIC_PWRKEY_INDEX 0
43 #define MTK_PMIC_HOMEKEY_INDEX 1
44 #define MTK_PMIC_MAX_KEY_COUNT 2
46 struct mtk_pmic_keys_regs
{
53 #define MTK_PMIC_KEYS_REGS(_deb_reg, _deb_mask, \
54 _intsel_reg, _intsel_mask) \
56 .deb_reg = _deb_reg, \
57 .deb_mask = _deb_mask, \
58 .intsel_reg = _intsel_reg, \
59 .intsel_mask = _intsel_mask, \
62 struct mtk_pmic_regs
{
63 const struct mtk_pmic_keys_regs keys_regs
[MTK_PMIC_MAX_KEY_COUNT
];
67 static const struct mtk_pmic_regs mt6397_regs
= {
68 .keys_regs
[MTK_PMIC_PWRKEY_INDEX
] =
69 MTK_PMIC_KEYS_REGS(MT6397_CHRSTATUS
,
70 0x8, MT6397_INT_RSV
, 0x10),
71 .keys_regs
[MTK_PMIC_HOMEKEY_INDEX
] =
72 MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2
,
73 0x10, MT6397_INT_RSV
, 0x8),
74 .pmic_rst_reg
= MT6397_TOP_RST_MISC
,
77 static const struct mtk_pmic_regs mt6323_regs
= {
78 .keys_regs
[MTK_PMIC_PWRKEY_INDEX
] =
79 MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS
,
80 0x2, MT6323_INT_MISC_CON
, 0x10),
81 .keys_regs
[MTK_PMIC_HOMEKEY_INDEX
] =
82 MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS
,
83 0x4, MT6323_INT_MISC_CON
, 0x8),
84 .pmic_rst_reg
= MT6323_TOP_RST_MISC
,
87 struct mtk_pmic_keys_info
{
88 struct mtk_pmic_keys
*keys
;
89 const struct mtk_pmic_keys_regs
*regs
;
95 struct mtk_pmic_keys
{
96 struct input_dev
*input_dev
;
98 struct regmap
*regmap
;
99 struct mtk_pmic_keys_info keys
[MTK_PMIC_MAX_KEY_COUNT
];
102 enum mtk_pmic_keys_lp_mode
{
108 static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys
*keys
,
112 u32 long_press_mode
, long_press_debounce
;
114 ret
= of_property_read_u32(keys
->dev
->of_node
,
115 "power-off-time-sec", &long_press_debounce
);
117 long_press_debounce
= 0;
119 regmap_update_bits(keys
->regmap
, pmic_rst_reg
,
120 MTK_PMIC_RST_DU_MASK
<< MTK_PMIC_RST_DU_SHIFT
,
121 long_press_debounce
<< MTK_PMIC_RST_DU_SHIFT
);
123 ret
= of_property_read_u32(keys
->dev
->of_node
,
124 "mediatek,long-press-mode", &long_press_mode
);
126 long_press_mode
= LP_DISABLE
;
128 switch (long_press_mode
) {
130 regmap_update_bits(keys
->regmap
, pmic_rst_reg
,
132 MTK_PMIC_PWRKEY_RST
);
133 regmap_update_bits(keys
->regmap
, pmic_rst_reg
,
134 MTK_PMIC_HOMEKEY_RST
,
138 regmap_update_bits(keys
->regmap
, pmic_rst_reg
,
140 MTK_PMIC_PWRKEY_RST
);
141 regmap_update_bits(keys
->regmap
, pmic_rst_reg
,
142 MTK_PMIC_HOMEKEY_RST
,
143 MTK_PMIC_HOMEKEY_RST
);
146 regmap_update_bits(keys
->regmap
, pmic_rst_reg
,
149 regmap_update_bits(keys
->regmap
, pmic_rst_reg
,
150 MTK_PMIC_HOMEKEY_RST
,
158 static irqreturn_t
mtk_pmic_keys_irq_handler_thread(int irq
, void *data
)
160 struct mtk_pmic_keys_info
*info
= data
;
161 u32 key_deb
, pressed
;
163 regmap_read(info
->keys
->regmap
, info
->regs
->deb_reg
, &key_deb
);
165 key_deb
&= info
->regs
->deb_mask
;
169 input_report_key(info
->keys
->input_dev
, info
->keycode
, pressed
);
170 input_sync(info
->keys
->input_dev
);
172 dev_dbg(info
->keys
->dev
, "(%s) key =%d using PMIC\n",
173 pressed
? "pressed" : "released", info
->keycode
);
178 static int mtk_pmic_key_setup(struct mtk_pmic_keys
*keys
,
179 struct mtk_pmic_keys_info
*info
)
185 ret
= regmap_update_bits(keys
->regmap
, info
->regs
->intsel_reg
,
186 info
->regs
->intsel_mask
,
187 info
->regs
->intsel_mask
);
191 ret
= devm_request_threaded_irq(keys
->dev
, info
->irq
, NULL
,
192 mtk_pmic_keys_irq_handler_thread
,
193 IRQF_ONESHOT
| IRQF_TRIGGER_HIGH
,
194 "mtk-pmic-keys", info
);
196 dev_err(keys
->dev
, "Failed to request IRQ: %d: %d\n",
201 input_set_capability(keys
->input_dev
, EV_KEY
, info
->keycode
);
206 static int __maybe_unused
mtk_pmic_keys_suspend(struct device
*dev
)
208 struct mtk_pmic_keys
*keys
= dev_get_drvdata(dev
);
211 for (index
= 0; index
< MTK_PMIC_MAX_KEY_COUNT
; index
++) {
212 if (keys
->keys
[index
].wakeup
)
213 enable_irq_wake(keys
->keys
[index
].irq
);
219 static int __maybe_unused
mtk_pmic_keys_resume(struct device
*dev
)
221 struct mtk_pmic_keys
*keys
= dev_get_drvdata(dev
);
224 for (index
= 0; index
< MTK_PMIC_MAX_KEY_COUNT
; index
++) {
225 if (keys
->keys
[index
].wakeup
)
226 disable_irq_wake(keys
->keys
[index
].irq
);
232 static SIMPLE_DEV_PM_OPS(mtk_pmic_keys_pm_ops
, mtk_pmic_keys_suspend
,
233 mtk_pmic_keys_resume
);
235 static const struct of_device_id of_mtk_pmic_keys_match_tbl
[] = {
237 .compatible
= "mediatek,mt6397-keys",
238 .data
= &mt6397_regs
,
240 .compatible
= "mediatek,mt6323-keys",
241 .data
= &mt6323_regs
,
246 MODULE_DEVICE_TABLE(of
, of_mtk_pmic_keys_match_tbl
);
248 static int mtk_pmic_keys_probe(struct platform_device
*pdev
)
250 int error
, index
= 0;
251 unsigned int keycount
;
252 struct mt6397_chip
*pmic_chip
= dev_get_drvdata(pdev
->dev
.parent
);
253 struct device_node
*node
= pdev
->dev
.of_node
, *child
;
254 struct mtk_pmic_keys
*keys
;
255 const struct mtk_pmic_regs
*mtk_pmic_regs
;
256 struct input_dev
*input_dev
;
257 const struct of_device_id
*of_id
=
258 of_match_device(of_mtk_pmic_keys_match_tbl
, &pdev
->dev
);
260 keys
= devm_kzalloc(&pdev
->dev
, sizeof(*keys
), GFP_KERNEL
);
264 keys
->dev
= &pdev
->dev
;
265 keys
->regmap
= pmic_chip
->regmap
;
266 mtk_pmic_regs
= of_id
->data
;
268 keys
->input_dev
= input_dev
= devm_input_allocate_device(keys
->dev
);
270 dev_err(keys
->dev
, "input allocate device fail.\n");
274 input_dev
->name
= "mtk-pmic-keys";
275 input_dev
->id
.bustype
= BUS_HOST
;
276 input_dev
->id
.vendor
= 0x0001;
277 input_dev
->id
.product
= 0x0001;
278 input_dev
->id
.version
= 0x0001;
280 keycount
= of_get_available_child_count(node
);
281 if (keycount
> MTK_PMIC_MAX_KEY_COUNT
) {
282 dev_err(keys
->dev
, "too many keys defined (%d)\n", keycount
);
286 for_each_child_of_node(node
, child
) {
287 keys
->keys
[index
].regs
= &mtk_pmic_regs
->keys_regs
[index
];
289 keys
->keys
[index
].irq
= platform_get_irq(pdev
, index
);
290 if (keys
->keys
[index
].irq
< 0)
291 return keys
->keys
[index
].irq
;
293 error
= of_property_read_u32(child
,
294 "linux,keycodes", &keys
->keys
[index
].keycode
);
297 "failed to read key:%d linux,keycode property: %d\n",
302 if (of_property_read_bool(child
, "wakeup-source"))
303 keys
->keys
[index
].wakeup
= true;
305 error
= mtk_pmic_key_setup(keys
, &keys
->keys
[index
]);
312 error
= input_register_device(input_dev
);
315 "register input device failed (%d)\n", error
);
319 mtk_pmic_keys_lp_reset_setup(keys
, mtk_pmic_regs
->pmic_rst_reg
);
321 platform_set_drvdata(pdev
, keys
);
326 static struct platform_driver pmic_keys_pdrv
= {
327 .probe
= mtk_pmic_keys_probe
,
329 .name
= "mtk-pmic-keys",
330 .of_match_table
= of_mtk_pmic_keys_match_tbl
,
331 .pm
= &mtk_pmic_keys_pm_ops
,
335 module_platform_driver(pmic_keys_pdrv
);
337 MODULE_LICENSE("GPL v2");
338 MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>");
339 MODULE_DESCRIPTION("MTK pmic-keys driver v0.1");