2 * Marvell Armada 375 pinctrl driver based on mvebu pinctrl core
4 * Copyright (C) 2012 Marvell
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/err.h>
15 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/clk.h>
20 #include <linux/of_device.h>
21 #include <linux/pinctrl/pinctrl.h>
23 #include "pinctrl-mvebu.h"
25 static struct mvebu_mpp_mode mv88f6720_mpp_modes
[] = {
27 MPP_FUNCTION(0x0, "gpio", NULL
),
28 MPP_FUNCTION(0x1, "dev", "ad2"),
29 MPP_FUNCTION(0x2, "spi0", "cs1"),
30 MPP_FUNCTION(0x3, "spi1", "cs1"),
31 MPP_FUNCTION(0x5, "nand", "io2")),
33 MPP_FUNCTION(0x0, "gpio", NULL
),
34 MPP_FUNCTION(0x1, "dev", "ad3"),
35 MPP_FUNCTION(0x2, "spi0", "mosi"),
36 MPP_FUNCTION(0x3, "spi1", "mosi"),
37 MPP_FUNCTION(0x5, "nand", "io3")),
39 MPP_FUNCTION(0x0, "gpio", NULL
),
40 MPP_FUNCTION(0x1, "dev", "ad4"),
41 MPP_FUNCTION(0x2, "ptp", "evreq"),
42 MPP_FUNCTION(0x3, "led", "c0"),
43 MPP_FUNCTION(0x4, "audio", "sdi"),
44 MPP_FUNCTION(0x5, "nand", "io4"),
45 MPP_FUNCTION(0x6, "spi1", "mosi")),
47 MPP_FUNCTION(0x0, "gpio", NULL
),
48 MPP_FUNCTION(0x1, "dev", "ad5"),
49 MPP_FUNCTION(0x2, "ptp", "trig"),
50 MPP_FUNCTION(0x3, "led", "p3"),
51 MPP_FUNCTION(0x4, "audio", "mclk"),
52 MPP_FUNCTION(0x5, "nand", "io5"),
53 MPP_FUNCTION(0x6, "spi1", "miso")),
55 MPP_FUNCTION(0x0, "gpio", NULL
),
56 MPP_FUNCTION(0x1, "dev", "ad6"),
57 MPP_FUNCTION(0x2, "spi0", "miso"),
58 MPP_FUNCTION(0x3, "spi1", "miso"),
59 MPP_FUNCTION(0x5, "nand", "io6")),
61 MPP_FUNCTION(0x0, "gpio", NULL
),
62 MPP_FUNCTION(0x1, "dev", "ad7"),
63 MPP_FUNCTION(0x2, "spi0", "cs2"),
64 MPP_FUNCTION(0x3, "spi1", "cs2"),
65 MPP_FUNCTION(0x5, "nand", "io7"),
66 MPP_FUNCTION(0x6, "spi1", "miso")),
68 MPP_FUNCTION(0x0, "gpio", NULL
),
69 MPP_FUNCTION(0x1, "dev", "ad0"),
70 MPP_FUNCTION(0x3, "led", "p1"),
71 MPP_FUNCTION(0x4, "audio", "lrclk"),
72 MPP_FUNCTION(0x5, "nand", "io0")),
74 MPP_FUNCTION(0x0, "gpio", NULL
),
75 MPP_FUNCTION(0x1, "dev", "ad1"),
76 MPP_FUNCTION(0x2, "ptp", "clk"),
77 MPP_FUNCTION(0x3, "led", "p2"),
78 MPP_FUNCTION(0x4, "audio", "extclk"),
79 MPP_FUNCTION(0x5, "nand", "io1")),
81 MPP_FUNCTION(0x0, "gpio", NULL
),
82 MPP_FUNCTION(0x1, "dev", "bootcs"),
83 MPP_FUNCTION(0x2, "spi0", "cs0"),
84 MPP_FUNCTION(0x3, "spi1", "cs0"),
85 MPP_FUNCTION(0x5, "nand", "ce")),
87 MPP_FUNCTION(0x0, "gpio", NULL
),
88 MPP_FUNCTION(0x2, "spi0", "sck"),
89 MPP_FUNCTION(0x3, "spi1", "sck"),
90 MPP_FUNCTION(0x5, "nand", "we")),
92 MPP_FUNCTION(0x0, "gpio", NULL
),
93 MPP_FUNCTION(0x2, "dram", "vttctrl"),
94 MPP_FUNCTION(0x3, "led", "c1"),
95 MPP_FUNCTION(0x5, "nand", "re"),
96 MPP_FUNCTION(0x6, "spi1", "sck")),
98 MPP_FUNCTION(0x0, "gpio", NULL
),
99 MPP_FUNCTION(0x1, "dev", "a0"),
100 MPP_FUNCTION(0x3, "led", "c2"),
101 MPP_FUNCTION(0x4, "audio", "sdo"),
102 MPP_FUNCTION(0x5, "nand", "cle")),
104 MPP_FUNCTION(0x0, "gpio", NULL
),
105 MPP_FUNCTION(0x1, "dev", "a1"),
106 MPP_FUNCTION(0x4, "audio", "bclk"),
107 MPP_FUNCTION(0x5, "nand", "ale")),
109 MPP_FUNCTION(0x0, "gpio", NULL
),
110 MPP_FUNCTION(0x1, "dev", "ready"),
111 MPP_FUNCTION(0x2, "pcie0", "rstout"),
112 MPP_FUNCTION(0x3, "pcie1", "rstout"),
113 MPP_FUNCTION(0x5, "nand", "rb"),
114 MPP_FUNCTION(0x6, "spi1", "mosi")),
116 MPP_FUNCTION(0x0, "gpio", NULL
),
117 MPP_FUNCTION(0x2, "i2c0", "sda"),
118 MPP_FUNCTION(0x3, "uart1", "txd")),
120 MPP_FUNCTION(0x0, "gpio", NULL
),
121 MPP_FUNCTION(0x2, "i2c0", "sck"),
122 MPP_FUNCTION(0x3, "uart1", "rxd")),
124 MPP_FUNCTION(0x0, "gpio", NULL
),
125 MPP_FUNCTION(0x2, "uart0", "txd")),
127 MPP_FUNCTION(0x0, "gpio", NULL
),
128 MPP_FUNCTION(0x2, "uart0", "rxd")),
130 MPP_FUNCTION(0x0, "gpio", NULL
),
131 MPP_FUNCTION(0x2, "tdm", "int")),
133 MPP_FUNCTION(0x0, "gpio", NULL
),
134 MPP_FUNCTION(0x2, "tdm", "rst")),
136 MPP_FUNCTION(0x0, "gpio", NULL
),
137 MPP_FUNCTION(0x2, "tdm", "pclk")),
139 MPP_FUNCTION(0x0, "gpio", NULL
),
140 MPP_FUNCTION(0x2, "tdm", "fsync")),
142 MPP_FUNCTION(0x0, "gpio", NULL
),
143 MPP_FUNCTION(0x2, "tdm", "drx")),
145 MPP_FUNCTION(0x0, "gpio", NULL
),
146 MPP_FUNCTION(0x2, "tdm", "dtx")),
148 MPP_FUNCTION(0x0, "gpio", NULL
),
149 MPP_FUNCTION(0x1, "led", "p0"),
150 MPP_FUNCTION(0x2, "ge1", "rxd0"),
151 MPP_FUNCTION(0x3, "sd", "cmd"),
152 MPP_FUNCTION(0x4, "uart0", "rts"),
153 MPP_FUNCTION(0x5, "spi0", "cs0"),
154 MPP_FUNCTION(0x6, "dev", "cs1")),
156 MPP_FUNCTION(0x0, "gpio", NULL
),
157 MPP_FUNCTION(0x1, "led", "p2"),
158 MPP_FUNCTION(0x2, "ge1", "rxd1"),
159 MPP_FUNCTION(0x3, "sd", "d0"),
160 MPP_FUNCTION(0x4, "uart0", "cts"),
161 MPP_FUNCTION(0x5, "spi0", "mosi"),
162 MPP_FUNCTION(0x6, "dev", "cs2")),
164 MPP_FUNCTION(0x0, "gpio", NULL
),
165 MPP_FUNCTION(0x1, "pcie0", "clkreq"),
166 MPP_FUNCTION(0x2, "ge1", "rxd2"),
167 MPP_FUNCTION(0x3, "sd", "d2"),
168 MPP_FUNCTION(0x4, "uart1", "rts"),
169 MPP_FUNCTION(0x5, "spi0", "cs1"),
170 MPP_FUNCTION(0x6, "led", "c1")),
172 MPP_FUNCTION(0x0, "gpio", NULL
),
173 MPP_FUNCTION(0x1, "pcie1", "clkreq"),
174 MPP_FUNCTION(0x2, "ge1", "rxd3"),
175 MPP_FUNCTION(0x3, "sd", "d1"),
176 MPP_FUNCTION(0x4, "uart1", "cts"),
177 MPP_FUNCTION(0x5, "spi0", "miso"),
178 MPP_FUNCTION(0x6, "led", "c2")),
180 MPP_FUNCTION(0x0, "gpio", NULL
),
181 MPP_FUNCTION(0x1, "led", "p3"),
182 MPP_FUNCTION(0x2, "ge1", "txctl"),
183 MPP_FUNCTION(0x3, "sd", "clk"),
184 MPP_FUNCTION(0x5, "dram", "vttctrl")),
186 MPP_FUNCTION(0x0, "gpio", NULL
),
187 MPP_FUNCTION(0x1, "pcie1", "clkreq"),
188 MPP_FUNCTION(0x2, "ge1", "rxclk"),
189 MPP_FUNCTION(0x3, "sd", "d3"),
190 MPP_FUNCTION(0x5, "spi0", "sck"),
191 MPP_FUNCTION(0x6, "pcie0", "rstout")),
193 MPP_FUNCTION(0x0, "gpio", NULL
),
194 MPP_FUNCTION(0x2, "ge1", "txd0"),
195 MPP_FUNCTION(0x3, "spi1", "cs0"),
196 MPP_FUNCTION(0x5, "led", "p3"),
197 MPP_FUNCTION(0x6, "ptp", "evreq")),
199 MPP_FUNCTION(0x0, "gpio", NULL
),
200 MPP_FUNCTION(0x2, "ge1", "txd1"),
201 MPP_FUNCTION(0x3, "spi1", "mosi"),
202 MPP_FUNCTION(0x5, "led", "p0")),
204 MPP_FUNCTION(0x0, "gpio", NULL
),
205 MPP_FUNCTION(0x2, "ge1", "txd2"),
206 MPP_FUNCTION(0x3, "spi1", "sck"),
207 MPP_FUNCTION(0x4, "ptp", "trig"),
208 MPP_FUNCTION(0x5, "led", "c0")),
210 MPP_FUNCTION(0x0, "gpio", NULL
),
211 MPP_FUNCTION(0x2, "ge1", "txd3"),
212 MPP_FUNCTION(0x3, "spi1", "miso"),
213 MPP_FUNCTION(0x5, "led", "p2")),
215 MPP_FUNCTION(0x0, "gpio", NULL
),
216 MPP_FUNCTION(0x2, "ge1", "txclkout"),
217 MPP_FUNCTION(0x3, "spi1", "sck"),
218 MPP_FUNCTION(0x5, "led", "c1")),
220 MPP_FUNCTION(0x0, "gpio", NULL
),
221 MPP_FUNCTION(0x2, "ge1", "rxctl"),
222 MPP_FUNCTION(0x3, "spi1", "cs1"),
223 MPP_FUNCTION(0x4, "spi0", "cs2"),
224 MPP_FUNCTION(0x5, "led", "p1")),
226 MPP_FUNCTION(0x0, "gpio", NULL
),
227 MPP_FUNCTION(0x1, "pcie0", "clkreq"),
228 MPP_FUNCTION(0x5, "led", "c2")),
230 MPP_FUNCTION(0x0, "gpio", NULL
),
231 MPP_FUNCTION(0x1, "pcie0", "clkreq"),
232 MPP_FUNCTION(0x2, "tdm", "int"),
233 MPP_FUNCTION(0x4, "ge", "mdc")),
235 MPP_FUNCTION(0x0, "gpio", NULL
),
236 MPP_FUNCTION(0x1, "pcie1", "clkreq"),
237 MPP_FUNCTION(0x4, "ge", "mdio")),
239 MPP_FUNCTION(0x0, "gpio", NULL
),
240 MPP_FUNCTION(0x4, "ref", "clkout"),
241 MPP_FUNCTION(0x5, "led", "p3")),
243 MPP_FUNCTION(0x0, "gpio", NULL
),
244 MPP_FUNCTION(0x4, "uart1", "txd"),
245 MPP_FUNCTION(0x5, "led", "p0")),
247 MPP_FUNCTION(0x0, "gpio", NULL
),
248 MPP_FUNCTION(0x4, "uart1", "rxd"),
249 MPP_FUNCTION(0x5, "led", "p1")),
251 MPP_FUNCTION(0x0, "gpio", NULL
),
252 MPP_FUNCTION(0x3, "spi1", "cs2"),
253 MPP_FUNCTION(0x4, "led", "c0"),
254 MPP_FUNCTION(0x6, "ptp", "clk")),
256 MPP_FUNCTION(0x0, "gpio", NULL
),
257 MPP_FUNCTION(0x2, "sata0", "prsnt"),
258 MPP_FUNCTION(0x4, "dram", "vttctrl"),
259 MPP_FUNCTION(0x5, "led", "c1")),
261 MPP_FUNCTION(0x0, "gpio", NULL
),
262 MPP_FUNCTION(0x4, "sata0", "prsnt")),
264 MPP_FUNCTION(0x0, "gpio", NULL
),
265 MPP_FUNCTION(0x2, "spi0", "cs2"),
266 MPP_FUNCTION(0x4, "pcie0", "rstout"),
267 MPP_FUNCTION(0x5, "led", "c2"),
268 MPP_FUNCTION(0x6, "spi1", "cs2")),
270 MPP_FUNCTION(0x0, "gpio", NULL
),
271 MPP_FUNCTION(0x1, "led", "p0"),
272 MPP_FUNCTION(0x2, "ge0", "txd0"),
273 MPP_FUNCTION(0x3, "ge1", "txd0"),
274 MPP_FUNCTION(0x6, "dev", "we1")),
276 MPP_FUNCTION(0x0, "gpio", NULL
),
277 MPP_FUNCTION(0x1, "led", "p1"),
278 MPP_FUNCTION(0x2, "ge0", "txd1"),
279 MPP_FUNCTION(0x3, "ge1", "txd1"),
280 MPP_FUNCTION(0x5, "ptp", "trig"),
281 MPP_FUNCTION(0x6, "dev", "ale0")),
283 MPP_FUNCTION(0x0, "gpio", NULL
),
284 MPP_FUNCTION(0x1, "led", "p2"),
285 MPP_FUNCTION(0x2, "ge0", "txd2"),
286 MPP_FUNCTION(0x3, "ge1", "txd2"),
287 MPP_FUNCTION(0x6, "dev", "ale1")),
289 MPP_FUNCTION(0x0, "gpio", NULL
),
290 MPP_FUNCTION(0x1, "led", "p3"),
291 MPP_FUNCTION(0x2, "ge0", "txd3"),
292 MPP_FUNCTION(0x3, "ge1", "txd3"),
293 MPP_FUNCTION(0x6, "dev", "a2")),
295 MPP_FUNCTION(0x0, "gpio", NULL
),
296 MPP_FUNCTION(0x1, "led", "c0"),
297 MPP_FUNCTION(0x2, "ge0", "rxd0"),
298 MPP_FUNCTION(0x3, "ge1", "rxd0"),
299 MPP_FUNCTION(0x5, "ptp", "evreq"),
300 MPP_FUNCTION(0x6, "dev", "ad12")),
302 MPP_FUNCTION(0x0, "gpio", NULL
),
303 MPP_FUNCTION(0x1, "led", "c1"),
304 MPP_FUNCTION(0x2, "ge0", "rxd1"),
305 MPP_FUNCTION(0x3, "ge1", "rxd1"),
306 MPP_FUNCTION(0x6, "dev", "ad8")),
308 MPP_FUNCTION(0x0, "gpio", NULL
),
309 MPP_FUNCTION(0x1, "led", "c2"),
310 MPP_FUNCTION(0x2, "ge0", "rxd2"),
311 MPP_FUNCTION(0x3, "ge1", "rxd2"),
312 MPP_FUNCTION(0x5, "i2c0", "sda"),
313 MPP_FUNCTION(0x6, "dev", "ad9")),
315 MPP_FUNCTION(0x0, "gpio", NULL
),
316 MPP_FUNCTION(0x1, "pcie1", "rstout"),
317 MPP_FUNCTION(0x2, "ge0", "rxd3"),
318 MPP_FUNCTION(0x3, "ge1", "rxd3"),
319 MPP_FUNCTION(0x5, "i2c0", "sck"),
320 MPP_FUNCTION(0x6, "dev", "ad10")),
322 MPP_FUNCTION(0x0, "gpio", NULL
),
323 MPP_FUNCTION(0x1, "pcie0", "rstout"),
324 MPP_FUNCTION(0x2, "ge0", "rxctl"),
325 MPP_FUNCTION(0x3, "ge1", "rxctl"),
326 MPP_FUNCTION(0x6, "dev", "ad11")),
328 MPP_FUNCTION(0x0, "gpio", NULL
),
329 MPP_FUNCTION(0x2, "ge0", "rxclk"),
330 MPP_FUNCTION(0x3, "ge1", "rxclk"),
331 MPP_FUNCTION(0x6, "dev", "cs0")),
333 MPP_FUNCTION(0x0, "gpio", NULL
),
334 MPP_FUNCTION(0x2, "ge0", "txclkout"),
335 MPP_FUNCTION(0x3, "ge1", "txclkout"),
336 MPP_FUNCTION(0x6, "dev", "oe")),
338 MPP_FUNCTION(0x0, "gpio", NULL
),
339 MPP_FUNCTION(0x2, "ge0", "txctl"),
340 MPP_FUNCTION(0x3, "ge1", "txctl"),
341 MPP_FUNCTION(0x6, "dev", "we0")),
343 MPP_FUNCTION(0x0, "gpio", NULL
),
344 MPP_FUNCTION(0x4, "led", "c0")),
346 MPP_FUNCTION(0x0, "gpio", NULL
),
347 MPP_FUNCTION(0x4, "led", "c1")),
349 MPP_FUNCTION(0x0, "gpio", NULL
),
350 MPP_FUNCTION(0x2, "uart1", "txd"),
351 MPP_FUNCTION(0x4, "led", "c2"),
352 MPP_FUNCTION(0x6, "dev", "ad13")),
354 MPP_FUNCTION(0x0, "gpio", NULL
),
355 MPP_FUNCTION(0x1, "i2c1", "sda"),
356 MPP_FUNCTION(0x2, "uart1", "rxd"),
357 MPP_FUNCTION(0x3, "spi1", "cs2"),
358 MPP_FUNCTION(0x4, "led", "p0"),
359 MPP_FUNCTION(0x6, "dev", "ad14")),
361 MPP_FUNCTION(0x0, "gpio", NULL
),
362 MPP_FUNCTION(0x1, "i2c1", "sck"),
363 MPP_FUNCTION(0x4, "led", "p1"),
364 MPP_FUNCTION(0x6, "dev", "ad15")),
366 MPP_FUNCTION(0x0, "gpio", NULL
),
367 MPP_FUNCTION(0x2, "ptp", "trig"),
368 MPP_FUNCTION(0x4, "led", "p2"),
369 MPP_FUNCTION(0x6, "dev", "burst/last")),
371 MPP_FUNCTION(0x0, "gpio", NULL
),
372 MPP_FUNCTION(0x2, "dram", "vttctrl"),
373 MPP_FUNCTION(0x4, "led", "p3")),
375 MPP_FUNCTION(0x0, "gpio", NULL
),
376 MPP_FUNCTION(0x1, "sata1", "prsnt")),
378 MPP_FUNCTION(0x0, "gpio", NULL
),
379 MPP_FUNCTION(0x2, "ptp", "evreq"),
380 MPP_FUNCTION(0x4, "spi1", "cs3"),
381 MPP_FUNCTION(0x5, "pcie0", "rstout"),
382 MPP_FUNCTION(0x6, "dev", "cs3")),
385 static struct mvebu_pinctrl_soc_info armada_375_pinctrl_info
;
387 static const struct of_device_id armada_375_pinctrl_of_match
[] = {
388 { .compatible
= "marvell,mv88f6720-pinctrl" },
392 static const struct mvebu_mpp_ctrl mv88f6720_mpp_controls
[] = {
393 MPP_FUNC_CTRL(0, 69, NULL
, mvebu_mmio_mpp_ctrl
),
396 static struct pinctrl_gpio_range mv88f6720_mpp_gpio_ranges
[] = {
397 MPP_GPIO_RANGE(0, 0, 0, 32),
398 MPP_GPIO_RANGE(1, 32, 32, 32),
399 MPP_GPIO_RANGE(2, 64, 64, 3),
402 static int armada_375_pinctrl_probe(struct platform_device
*pdev
)
404 struct mvebu_pinctrl_soc_info
*soc
= &armada_375_pinctrl_info
;
406 soc
->variant
= 0; /* no variants for Armada 375 */
407 soc
->controls
= mv88f6720_mpp_controls
;
408 soc
->ncontrols
= ARRAY_SIZE(mv88f6720_mpp_controls
);
409 soc
->modes
= mv88f6720_mpp_modes
;
410 soc
->nmodes
= ARRAY_SIZE(mv88f6720_mpp_modes
);
411 soc
->gpioranges
= mv88f6720_mpp_gpio_ranges
;
412 soc
->ngpioranges
= ARRAY_SIZE(mv88f6720_mpp_gpio_ranges
);
414 pdev
->dev
.platform_data
= soc
;
416 return mvebu_pinctrl_simple_mmio_probe(pdev
);
419 static struct platform_driver armada_375_pinctrl_driver
= {
421 .name
= "armada-375-pinctrl",
422 .of_match_table
= of_match_ptr(armada_375_pinctrl_of_match
),
424 .probe
= armada_375_pinctrl_probe
,
426 builtin_platform_driver(armada_375_pinctrl_driver
);