of/platform: Initialise default DMA masks
[linux/fpc-iii.git] / drivers / pinctrl / pinctrl-ocelot.c
blob15bb1cb8729b936eb73f519286f7d5a88f0e0a3f
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Microsemi SoCs pinctrl driver
5 * Author: <alexandre.belloni@free-electrons.com>
6 * License: Dual MIT/GPL
7 * Copyright (c) 2017 Microsemi Corporation
8 */
10 #include <linux/gpio/driver.h>
11 #include <linux/interrupt.h>
12 #include <linux/io.h>
13 #include <linux/of_device.h>
14 #include <linux/of_platform.h>
15 #include <linux/pinctrl/pinctrl.h>
16 #include <linux/pinctrl/pinmux.h>
17 #include <linux/pinctrl/pinconf.h>
18 #include <linux/pinctrl/pinconf-generic.h>
19 #include <linux/platform_device.h>
20 #include <linux/regmap.h>
21 #include <linux/slab.h>
23 #include "core.h"
24 #include "pinconf.h"
25 #include "pinmux.h"
27 #define OCELOT_GPIO_OUT_SET 0x0
28 #define OCELOT_GPIO_OUT_CLR 0x4
29 #define OCELOT_GPIO_OUT 0x8
30 #define OCELOT_GPIO_IN 0xc
31 #define OCELOT_GPIO_OE 0x10
32 #define OCELOT_GPIO_INTR 0x14
33 #define OCELOT_GPIO_INTR_ENA 0x18
34 #define OCELOT_GPIO_INTR_IDENT 0x1c
35 #define OCELOT_GPIO_ALT0 0x20
36 #define OCELOT_GPIO_ALT1 0x24
37 #define OCELOT_GPIO_SD_MAP 0x28
39 #define OCELOT_PINS 22
40 #define OCELOT_FUNC_PER_PIN 4
42 enum {
43 FUNC_NONE,
44 FUNC_GPIO,
45 FUNC_IRQ0_IN,
46 FUNC_IRQ0_OUT,
47 FUNC_IRQ1_IN,
48 FUNC_IRQ1_OUT,
49 FUNC_MIIM1,
50 FUNC_PCI_WAKE,
51 FUNC_PTP0,
52 FUNC_PTP1,
53 FUNC_PTP2,
54 FUNC_PTP3,
55 FUNC_PWM,
56 FUNC_RECO_CLK0,
57 FUNC_RECO_CLK1,
58 FUNC_SFP0,
59 FUNC_SFP1,
60 FUNC_SFP2,
61 FUNC_SFP3,
62 FUNC_SFP4,
63 FUNC_SFP5,
64 FUNC_SG0,
65 FUNC_SI,
66 FUNC_TACHO,
67 FUNC_TWI,
68 FUNC_TWI_SCL_M,
69 FUNC_UART,
70 FUNC_UART2,
71 FUNC_MAX
74 static const char *const ocelot_function_names[] = {
75 [FUNC_NONE] = "none",
76 [FUNC_GPIO] = "gpio",
77 [FUNC_IRQ0_IN] = "irq0_in",
78 [FUNC_IRQ0_OUT] = "irq0_out",
79 [FUNC_IRQ1_IN] = "irq1_in",
80 [FUNC_IRQ1_OUT] = "irq1_out",
81 [FUNC_MIIM1] = "miim1",
82 [FUNC_PCI_WAKE] = "pci_wake",
83 [FUNC_PTP0] = "ptp0",
84 [FUNC_PTP1] = "ptp1",
85 [FUNC_PTP2] = "ptp2",
86 [FUNC_PTP3] = "ptp3",
87 [FUNC_PWM] = "pwm",
88 [FUNC_RECO_CLK0] = "reco_clk0",
89 [FUNC_RECO_CLK1] = "reco_clk1",
90 [FUNC_SFP0] = "sfp0",
91 [FUNC_SFP1] = "sfp1",
92 [FUNC_SFP2] = "sfp2",
93 [FUNC_SFP3] = "sfp3",
94 [FUNC_SFP4] = "sfp4",
95 [FUNC_SFP5] = "sfp5",
96 [FUNC_SG0] = "sg0",
97 [FUNC_SI] = "si",
98 [FUNC_TACHO] = "tacho",
99 [FUNC_TWI] = "twi",
100 [FUNC_TWI_SCL_M] = "twi_scl_m",
101 [FUNC_UART] = "uart",
102 [FUNC_UART2] = "uart2",
105 struct ocelot_pmx_func {
106 const char **groups;
107 unsigned int ngroups;
110 struct ocelot_pin_caps {
111 unsigned int pin;
112 unsigned char functions[OCELOT_FUNC_PER_PIN];
115 struct ocelot_pinctrl {
116 struct device *dev;
117 struct pinctrl_dev *pctl;
118 struct gpio_chip gpio_chip;
119 struct regmap *map;
120 struct ocelot_pmx_func func[FUNC_MAX];
123 #define OCELOT_P(p, f0, f1, f2) \
124 static struct ocelot_pin_caps ocelot_pin_##p = { \
125 .pin = p, \
126 .functions = { \
127 FUNC_GPIO, FUNC_##f0, FUNC_##f1, FUNC_##f2, \
128 }, \
131 OCELOT_P(0, SG0, NONE, NONE);
132 OCELOT_P(1, SG0, NONE, NONE);
133 OCELOT_P(2, SG0, NONE, NONE);
134 OCELOT_P(3, SG0, NONE, NONE);
135 OCELOT_P(4, IRQ0_IN, IRQ0_OUT, TWI);
136 OCELOT_P(5, IRQ1_IN, IRQ1_OUT, PCI_WAKE);
137 OCELOT_P(6, UART, TWI_SCL_M, NONE);
138 OCELOT_P(7, UART, TWI_SCL_M, NONE);
139 OCELOT_P(8, SI, TWI_SCL_M, IRQ0_OUT);
140 OCELOT_P(9, SI, TWI_SCL_M, IRQ1_OUT);
141 OCELOT_P(10, PTP2, TWI_SCL_M, SFP0);
142 OCELOT_P(11, PTP3, TWI_SCL_M, SFP1);
143 OCELOT_P(12, UART2, TWI_SCL_M, SFP2);
144 OCELOT_P(13, UART2, TWI_SCL_M, SFP3);
145 OCELOT_P(14, MIIM1, TWI_SCL_M, SFP4);
146 OCELOT_P(15, MIIM1, TWI_SCL_M, SFP5);
147 OCELOT_P(16, TWI, NONE, SI);
148 OCELOT_P(17, TWI, TWI_SCL_M, SI);
149 OCELOT_P(18, PTP0, TWI_SCL_M, NONE);
150 OCELOT_P(19, PTP1, TWI_SCL_M, NONE);
151 OCELOT_P(20, RECO_CLK0, TACHO, NONE);
152 OCELOT_P(21, RECO_CLK1, PWM, NONE);
154 #define OCELOT_PIN(n) { \
155 .number = n, \
156 .name = "GPIO_"#n, \
157 .drv_data = &ocelot_pin_##n \
160 static const struct pinctrl_pin_desc ocelot_pins[] = {
161 OCELOT_PIN(0),
162 OCELOT_PIN(1),
163 OCELOT_PIN(2),
164 OCELOT_PIN(3),
165 OCELOT_PIN(4),
166 OCELOT_PIN(5),
167 OCELOT_PIN(6),
168 OCELOT_PIN(7),
169 OCELOT_PIN(8),
170 OCELOT_PIN(9),
171 OCELOT_PIN(10),
172 OCELOT_PIN(11),
173 OCELOT_PIN(12),
174 OCELOT_PIN(13),
175 OCELOT_PIN(14),
176 OCELOT_PIN(15),
177 OCELOT_PIN(16),
178 OCELOT_PIN(17),
179 OCELOT_PIN(18),
180 OCELOT_PIN(19),
181 OCELOT_PIN(20),
182 OCELOT_PIN(21),
185 static int ocelot_get_functions_count(struct pinctrl_dev *pctldev)
187 return ARRAY_SIZE(ocelot_function_names);
190 static const char *ocelot_get_function_name(struct pinctrl_dev *pctldev,
191 unsigned int function)
193 return ocelot_function_names[function];
196 static int ocelot_get_function_groups(struct pinctrl_dev *pctldev,
197 unsigned int function,
198 const char *const **groups,
199 unsigned *const num_groups)
201 struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
203 *groups = info->func[function].groups;
204 *num_groups = info->func[function].ngroups;
206 return 0;
209 static int ocelot_pin_function_idx(unsigned int pin, unsigned int function)
211 struct ocelot_pin_caps *p = ocelot_pins[pin].drv_data;
212 int i;
214 for (i = 0; i < OCELOT_FUNC_PER_PIN; i++) {
215 if (function == p->functions[i])
216 return i;
219 return -1;
222 static int ocelot_pinmux_set_mux(struct pinctrl_dev *pctldev,
223 unsigned int selector, unsigned int group)
225 struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
226 struct ocelot_pin_caps *pin = ocelot_pins[group].drv_data;
227 int f;
229 f = ocelot_pin_function_idx(group, selector);
230 if (f < 0)
231 return -EINVAL;
234 * f is encoded on two bits.
235 * bit 0 of f goes in BIT(pin) of ALT0, bit 1 of f goes in BIT(pin) of
236 * ALT1
237 * This is racy because both registers can't be updated at the same time
238 * but it doesn't matter much for now.
240 regmap_update_bits(info->map, OCELOT_GPIO_ALT0, BIT(pin->pin),
241 f << pin->pin);
242 regmap_update_bits(info->map, OCELOT_GPIO_ALT1, BIT(pin->pin),
243 f << (pin->pin - 1));
245 return 0;
248 static int ocelot_gpio_set_direction(struct pinctrl_dev *pctldev,
249 struct pinctrl_gpio_range *range,
250 unsigned int pin, bool input)
252 struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
254 regmap_update_bits(info->map, OCELOT_GPIO_OE, BIT(pin),
255 input ? 0 : BIT(pin));
257 return 0;
260 static int ocelot_gpio_request_enable(struct pinctrl_dev *pctldev,
261 struct pinctrl_gpio_range *range,
262 unsigned int offset)
264 struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
266 regmap_update_bits(info->map, OCELOT_GPIO_ALT0, BIT(offset), 0);
267 regmap_update_bits(info->map, OCELOT_GPIO_ALT1, BIT(offset), 0);
269 return 0;
272 static const struct pinmux_ops ocelot_pmx_ops = {
273 .get_functions_count = ocelot_get_functions_count,
274 .get_function_name = ocelot_get_function_name,
275 .get_function_groups = ocelot_get_function_groups,
276 .set_mux = ocelot_pinmux_set_mux,
277 .gpio_set_direction = ocelot_gpio_set_direction,
278 .gpio_request_enable = ocelot_gpio_request_enable,
281 static int ocelot_pctl_get_groups_count(struct pinctrl_dev *pctldev)
283 return ARRAY_SIZE(ocelot_pins);
286 static const char *ocelot_pctl_get_group_name(struct pinctrl_dev *pctldev,
287 unsigned int group)
289 return ocelot_pins[group].name;
292 static int ocelot_pctl_get_group_pins(struct pinctrl_dev *pctldev,
293 unsigned int group,
294 const unsigned int **pins,
295 unsigned int *num_pins)
297 *pins = &ocelot_pins[group].number;
298 *num_pins = 1;
300 return 0;
303 static const struct pinctrl_ops ocelot_pctl_ops = {
304 .get_groups_count = ocelot_pctl_get_groups_count,
305 .get_group_name = ocelot_pctl_get_group_name,
306 .get_group_pins = ocelot_pctl_get_group_pins,
307 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
308 .dt_free_map = pinconf_generic_dt_free_map,
311 static struct pinctrl_desc ocelot_desc = {
312 .name = "ocelot-pinctrl",
313 .pins = ocelot_pins,
314 .npins = ARRAY_SIZE(ocelot_pins),
315 .pctlops = &ocelot_pctl_ops,
316 .pmxops = &ocelot_pmx_ops,
317 .owner = THIS_MODULE,
320 static int ocelot_create_group_func_map(struct device *dev,
321 struct ocelot_pinctrl *info)
323 u16 pins[ARRAY_SIZE(ocelot_pins)];
324 int f, npins, i;
326 for (f = 0; f < FUNC_MAX; f++) {
327 for (npins = 0, i = 0; i < ARRAY_SIZE(ocelot_pins); i++) {
328 if (ocelot_pin_function_idx(i, f) >= 0)
329 pins[npins++] = i;
332 info->func[f].ngroups = npins;
333 info->func[f].groups = devm_kcalloc(dev,
334 npins,
335 sizeof(char *),
336 GFP_KERNEL);
337 if (!info->func[f].groups)
338 return -ENOMEM;
340 for (i = 0; i < npins; i++)
341 info->func[f].groups[i] = ocelot_pins[pins[i]].name;
344 return 0;
347 static int ocelot_pinctrl_register(struct platform_device *pdev,
348 struct ocelot_pinctrl *info)
350 int ret;
352 ret = ocelot_create_group_func_map(&pdev->dev, info);
353 if (ret) {
354 dev_err(&pdev->dev, "Unable to create group func map.\n");
355 return ret;
358 info->pctl = devm_pinctrl_register(&pdev->dev, &ocelot_desc, info);
359 if (IS_ERR(info->pctl)) {
360 dev_err(&pdev->dev, "Failed to register pinctrl\n");
361 return PTR_ERR(info->pctl);
364 return 0;
367 static int ocelot_gpio_get(struct gpio_chip *chip, unsigned int offset)
369 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
370 unsigned int val;
372 regmap_read(info->map, OCELOT_GPIO_IN, &val);
374 return !!(val & BIT(offset));
377 static void ocelot_gpio_set(struct gpio_chip *chip, unsigned int offset,
378 int value)
380 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
382 if (value)
383 regmap_write(info->map, OCELOT_GPIO_OUT_SET, BIT(offset));
384 else
385 regmap_write(info->map, OCELOT_GPIO_OUT_CLR, BIT(offset));
388 static int ocelot_gpio_get_direction(struct gpio_chip *chip,
389 unsigned int offset)
391 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
392 unsigned int val;
394 regmap_read(info->map, OCELOT_GPIO_OE, &val);
396 return !(val & BIT(offset));
399 static int ocelot_gpio_direction_input(struct gpio_chip *chip,
400 unsigned int offset)
402 return pinctrl_gpio_direction_input(chip->base + offset);
405 static int ocelot_gpio_direction_output(struct gpio_chip *chip,
406 unsigned int offset, int value)
408 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
409 unsigned int pin = BIT(offset);
411 if (value)
412 regmap_write(info->map, OCELOT_GPIO_OUT_SET, pin);
413 else
414 regmap_write(info->map, OCELOT_GPIO_OUT_CLR, pin);
416 return pinctrl_gpio_direction_output(chip->base + offset);
419 static const struct gpio_chip ocelot_gpiolib_chip = {
420 .request = gpiochip_generic_request,
421 .free = gpiochip_generic_free,
422 .set = ocelot_gpio_set,
423 .get = ocelot_gpio_get,
424 .get_direction = ocelot_gpio_get_direction,
425 .direction_input = ocelot_gpio_direction_input,
426 .direction_output = ocelot_gpio_direction_output,
427 .owner = THIS_MODULE,
430 static int ocelot_gpiochip_register(struct platform_device *pdev,
431 struct ocelot_pinctrl *info)
433 struct gpio_chip *gc;
434 int ret;
436 info->gpio_chip = ocelot_gpiolib_chip;
438 gc = &info->gpio_chip;
439 gc->ngpio = OCELOT_PINS;
440 gc->parent = &pdev->dev;
441 gc->base = 0;
442 gc->of_node = info->dev->of_node;
443 gc->label = "ocelot-gpio";
445 ret = devm_gpiochip_add_data(&pdev->dev, gc, info);
446 if (ret)
447 return ret;
449 /* TODO: this can be used as an irqchip but no board is using that */
451 return 0;
454 static const struct regmap_config ocelot_pinctrl_regmap_config = {
455 .reg_bits = 32,
456 .val_bits = 32,
457 .reg_stride = 4,
458 .max_register = 0x64,
461 static const struct of_device_id ocelot_pinctrl_of_match[] = {
462 { .compatible = "mscc,ocelot-pinctrl" },
466 static int ocelot_pinctrl_probe(struct platform_device *pdev)
468 struct device *dev = &pdev->dev;
469 struct ocelot_pinctrl *info;
470 void __iomem *base;
471 int ret;
473 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
474 if (!info)
475 return -ENOMEM;
477 base = devm_ioremap_resource(dev,
478 platform_get_resource(pdev, IORESOURCE_MEM, 0));
479 if (IS_ERR(base)) {
480 dev_err(dev, "Failed to ioremap registers\n");
481 return PTR_ERR(base);
484 info->map = devm_regmap_init_mmio(dev, base,
485 &ocelot_pinctrl_regmap_config);
486 if (IS_ERR(info->map)) {
487 dev_err(dev, "Failed to create regmap\n");
488 return PTR_ERR(info->map);
490 dev_set_drvdata(dev, info->map);
491 info->dev = dev;
493 ret = ocelot_pinctrl_register(pdev, info);
494 if (ret)
495 return ret;
497 ret = ocelot_gpiochip_register(pdev, info);
498 if (ret)
499 return ret;
501 return 0;
504 static struct platform_driver ocelot_pinctrl_driver = {
505 .driver = {
506 .name = "pinctrl-ocelot",
507 .of_match_table = of_match_ptr(ocelot_pinctrl_of_match),
508 .suppress_bind_attrs = true,
510 .probe = ocelot_pinctrl_probe,
512 builtin_platform_driver(ocelot_pinctrl_driver);