of/platform: Initialise default DMA masks
[linux/fpc-iii.git] / drivers / platform / chrome / cros_ec_lpc_reg.c
blobdcc7a3e30604bb60ffc3a550efa7877e01998921
1 /*
2 * cros_ec_lpc_reg - LPC access to the Chrome OS Embedded Controller
4 * Copyright (C) 2016 Google, Inc
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * This driver uses the Chrome OS EC byte-level message-based protocol for
16 * communicating the keyboard state (which keys are pressed) from a keyboard EC
17 * to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
18 * but everything else (including deghosting) is done here. The main
19 * motivation for this is to keep the EC firmware as simple as possible, since
20 * it cannot be easily upgraded and EC flash/IRAM space is relatively
21 * expensive.
24 #include <linux/io.h>
25 #include <linux/mfd/cros_ec.h>
26 #include <linux/mfd/cros_ec_commands.h>
27 #include <linux/mfd/cros_ec_lpc_mec.h>
29 static u8 lpc_read_bytes(unsigned int offset, unsigned int length, u8 *dest)
31 int i;
32 int sum = 0;
34 for (i = 0; i < length; ++i) {
35 dest[i] = inb(offset + i);
36 sum += dest[i];
39 /* Return checksum of all bytes read */
40 return sum;
43 static u8 lpc_write_bytes(unsigned int offset, unsigned int length, u8 *msg)
45 int i;
46 int sum = 0;
48 for (i = 0; i < length; ++i) {
49 outb(msg[i], offset + i);
50 sum += msg[i];
53 /* Return checksum of all bytes written */
54 return sum;
57 #ifdef CONFIG_CROS_EC_LPC_MEC
59 u8 cros_ec_lpc_read_bytes(unsigned int offset, unsigned int length, u8 *dest)
61 if (length == 0)
62 return 0;
64 /* Access desired range through EMI interface */
65 if (offset >= MEC_EMI_RANGE_START && offset <= MEC_EMI_RANGE_END) {
66 /* Ensure we don't straddle EMI region */
67 if (WARN_ON(offset + length - 1 > MEC_EMI_RANGE_END))
68 return 0;
70 return cros_ec_lpc_io_bytes_mec(MEC_IO_READ, offset, length,
71 dest);
74 if (WARN_ON(offset + length > MEC_EMI_RANGE_START &&
75 offset < MEC_EMI_RANGE_START))
76 return 0;
78 return lpc_read_bytes(offset, length, dest);
81 u8 cros_ec_lpc_write_bytes(unsigned int offset, unsigned int length, u8 *msg)
83 if (length == 0)
84 return 0;
86 /* Access desired range through EMI interface */
87 if (offset >= MEC_EMI_RANGE_START && offset <= MEC_EMI_RANGE_END) {
88 /* Ensure we don't straddle EMI region */
89 if (WARN_ON(offset + length - 1 > MEC_EMI_RANGE_END))
90 return 0;
92 return cros_ec_lpc_io_bytes_mec(MEC_IO_WRITE, offset, length,
93 msg);
96 if (WARN_ON(offset + length > MEC_EMI_RANGE_START &&
97 offset < MEC_EMI_RANGE_START))
98 return 0;
100 return lpc_write_bytes(offset, length, msg);
103 void cros_ec_lpc_reg_init(void)
105 cros_ec_lpc_mec_init();
108 void cros_ec_lpc_reg_destroy(void)
110 cros_ec_lpc_mec_destroy();
113 #else /* CONFIG_CROS_EC_LPC_MEC */
115 u8 cros_ec_lpc_read_bytes(unsigned int offset, unsigned int length, u8 *dest)
117 return lpc_read_bytes(offset, length, dest);
120 u8 cros_ec_lpc_write_bytes(unsigned int offset, unsigned int length, u8 *msg)
122 return lpc_write_bytes(offset, length, msg);
125 void cros_ec_lpc_reg_init(void)
129 void cros_ec_lpc_reg_destroy(void)
133 #endif /* CONFIG_CROS_EC_LPC_MEC */