2 * Based on Ocelot Linux port, which is
3 * Copyright 2001 MontaVista Software Inc.
4 * Author: jsun@mvista.com or jsun@junsun.net
6 * Copyright 2003 ICT CAS
7 * Author: Michael Guo <guoyi@ict.ac.cn>
9 * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
10 * Author: Fuxin Zhang, zhangfx@lemote.com
12 * Copyright (C) 2009 Lemote Inc.
13 * Author: Wu Zhangjin, wuzhangjin@gmail.com
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
20 #include <linux/module.h>
21 #include <asm/bootinfo.h>
23 #include <boot_param.h>
24 #include <workarounds.h>
27 EXPORT_SYMBOL(cpu_clock_freq
);
28 struct efi_memory_map_loongson
*loongson_memmap
;
29 struct loongson_system_configuration loongson_sysconf
;
31 u64 loongson_chipcfg
[MAX_PACKAGES
] = {0xffffffffbfc00180};
32 u64 loongson_chiptemp
[MAX_PACKAGES
];
33 u64 loongson_freqctrl
[MAX_PACKAGES
];
35 unsigned long long smp_group
[4];
37 #define parse_even_earlier(res, option, p) \
39 unsigned int tmp __maybe_unused; \
41 if (strncmp(option, (char *)p, strlen(option)) == 0) \
42 tmp = kstrtou32((char *)p + strlen(option"="), 10, &res); \
45 void __init
prom_init_env(void)
47 /* pmon passes arguments in 32bit pointers */
48 unsigned int processor_id
;
50 #ifndef CONFIG_LEFI_FIRMWARE_INTERFACE
54 /* firmware arguments are initialized in head.S */
55 _prom_envp
= (int *)fw_arg2
;
57 l
= (long)*_prom_envp
;
59 parse_even_earlier(cpu_clock_freq
, "cpuclock", l
);
60 parse_even_earlier(memsize
, "memsize", l
);
61 parse_even_earlier(highmemsize
, "highmemsize", l
);
63 l
= (long)*_prom_envp
;
68 loongson_sysconf
.nr_uarts
= 1;
70 pr_info("memsize=%u, highmemsize=%u\n", memsize
, highmemsize
);
72 struct boot_params
*boot_p
;
73 struct loongson_params
*loongson_p
;
74 struct system_loongson
*esys
;
75 struct efi_cpuinfo_loongson
*ecpu
;
76 struct irq_source_routing_table
*eirq_source
;
78 /* firmware arguments are initialized in head.S */
79 boot_p
= (struct boot_params
*)fw_arg2
;
80 loongson_p
= &(boot_p
->efi
.smbios
.lp
);
82 esys
= (struct system_loongson
*)
83 ((u64
)loongson_p
+ loongson_p
->system_offset
);
84 ecpu
= (struct efi_cpuinfo_loongson
*)
85 ((u64
)loongson_p
+ loongson_p
->cpu_offset
);
86 eirq_source
= (struct irq_source_routing_table
*)
87 ((u64
)loongson_p
+ loongson_p
->irq_offset
);
88 loongson_memmap
= (struct efi_memory_map_loongson
*)
89 ((u64
)loongson_p
+ loongson_p
->memory_offset
);
91 cpu_clock_freq
= ecpu
->cpu_clock_freq
;
92 loongson_sysconf
.cputype
= ecpu
->cputype
;
93 if (ecpu
->cputype
== Loongson_3A
) {
94 loongson_sysconf
.cores_per_node
= 4;
95 loongson_sysconf
.cores_per_package
= 4;
96 smp_group
[0] = 0x900000003ff01000;
97 smp_group
[1] = 0x900010003ff01000;
98 smp_group
[2] = 0x900020003ff01000;
99 smp_group
[3] = 0x900030003ff01000;
100 loongson_chipcfg
[0] = 0x900000001fe00180;
101 loongson_chipcfg
[1] = 0x900010001fe00180;
102 loongson_chipcfg
[2] = 0x900020001fe00180;
103 loongson_chipcfg
[3] = 0x900030001fe00180;
104 loongson_chiptemp
[0] = 0x900000001fe0019c;
105 loongson_chiptemp
[1] = 0x900010001fe0019c;
106 loongson_chiptemp
[2] = 0x900020001fe0019c;
107 loongson_chiptemp
[3] = 0x900030001fe0019c;
108 loongson_sysconf
.ht_control_base
= 0x90000EFDFB000000;
109 loongson_sysconf
.workarounds
= WORKAROUND_CPUFREQ
;
110 } else if (ecpu
->cputype
== Loongson_3B
) {
111 loongson_sysconf
.cores_per_node
= 4; /* One chip has 2 nodes */
112 loongson_sysconf
.cores_per_package
= 8;
113 smp_group
[0] = 0x900000003ff01000;
114 smp_group
[1] = 0x900010003ff05000;
115 smp_group
[2] = 0x900020003ff09000;
116 smp_group
[3] = 0x900030003ff0d000;
117 loongson_chipcfg
[0] = 0x900000001fe00180;
118 loongson_chipcfg
[1] = 0x900020001fe00180;
119 loongson_chipcfg
[2] = 0x900040001fe00180;
120 loongson_chipcfg
[3] = 0x900060001fe00180;
121 loongson_chiptemp
[0] = 0x900000001fe0019c;
122 loongson_chiptemp
[1] = 0x900020001fe0019c;
123 loongson_chiptemp
[2] = 0x900040001fe0019c;
124 loongson_chiptemp
[3] = 0x900060001fe0019c;
125 loongson_freqctrl
[0] = 0x900000001fe001d0;
126 loongson_freqctrl
[1] = 0x900020001fe001d0;
127 loongson_freqctrl
[2] = 0x900040001fe001d0;
128 loongson_freqctrl
[3] = 0x900060001fe001d0;
129 loongson_sysconf
.ht_control_base
= 0x90001EFDFB000000;
130 loongson_sysconf
.workarounds
= WORKAROUND_CPUHOTPLUG
;
132 loongson_sysconf
.cores_per_node
= 1;
133 loongson_sysconf
.cores_per_package
= 1;
134 loongson_chipcfg
[0] = 0x900000001fe00180;
137 loongson_sysconf
.nr_cpus
= ecpu
->nr_cpus
;
138 loongson_sysconf
.boot_cpu_id
= ecpu
->cpu_startup_core_id
;
139 loongson_sysconf
.reserved_cpus_mask
= ecpu
->reserved_cores_mask
;
140 if (ecpu
->nr_cpus
> NR_CPUS
|| ecpu
->nr_cpus
== 0)
141 loongson_sysconf
.nr_cpus
= NR_CPUS
;
142 loongson_sysconf
.nr_nodes
= (loongson_sysconf
.nr_cpus
+
143 loongson_sysconf
.cores_per_node
- 1) /
144 loongson_sysconf
.cores_per_node
;
146 loongson_sysconf
.pci_mem_start_addr
= eirq_source
->pci_mem_start_addr
;
147 loongson_sysconf
.pci_mem_end_addr
= eirq_source
->pci_mem_end_addr
;
148 loongson_sysconf
.pci_io_base
= eirq_source
->pci_io_start_addr
;
149 loongson_sysconf
.dma_mask_bits
= eirq_source
->dma_mask_bits
;
150 if (loongson_sysconf
.dma_mask_bits
< 32 ||
151 loongson_sysconf
.dma_mask_bits
> 64)
152 loongson_sysconf
.dma_mask_bits
= 32;
154 loongson_sysconf
.restart_addr
= boot_p
->reset_system
.ResetWarm
;
155 loongson_sysconf
.poweroff_addr
= boot_p
->reset_system
.Shutdown
;
156 loongson_sysconf
.suspend_addr
= boot_p
->reset_system
.DoSuspend
;
158 loongson_sysconf
.vgabios_addr
= boot_p
->efi
.smbios
.vga_bios
;
159 pr_debug("Shutdown Addr: %llx, Restart Addr: %llx, VBIOS Addr: %llx\n",
160 loongson_sysconf
.poweroff_addr
, loongson_sysconf
.restart_addr
,
161 loongson_sysconf
.vgabios_addr
);
163 memset(loongson_sysconf
.ecname
, 0, 32);
165 memcpy(loongson_sysconf
.ecname
, esys
->ec_name
, 32);
166 loongson_sysconf
.workarounds
|= esys
->workarounds
;
168 loongson_sysconf
.nr_uarts
= esys
->nr_uarts
;
169 if (esys
->nr_uarts
< 1 || esys
->nr_uarts
> MAX_UARTS
)
170 loongson_sysconf
.nr_uarts
= 1;
171 memcpy(loongson_sysconf
.uarts
, esys
->uarts
,
172 sizeof(struct uart_device
) * loongson_sysconf
.nr_uarts
);
174 loongson_sysconf
.nr_sensors
= esys
->nr_sensors
;
175 if (loongson_sysconf
.nr_sensors
> MAX_SENSORS
)
176 loongson_sysconf
.nr_sensors
= 0;
177 if (loongson_sysconf
.nr_sensors
)
178 memcpy(loongson_sysconf
.sensors
, esys
->sensors
,
179 sizeof(struct sensor_device
) * loongson_sysconf
.nr_sensors
);
181 if (cpu_clock_freq
== 0) {
182 processor_id
= (¤t_cpu_data
)->processor_id
;
183 switch (processor_id
& PRID_REV_MASK
) {
184 case PRID_REV_LOONGSON2E
:
185 cpu_clock_freq
= 533080000;
187 case PRID_REV_LOONGSON2F
:
188 cpu_clock_freq
= 797000000;
190 case PRID_REV_LOONGSON3A
:
191 cpu_clock_freq
= 900000000;
193 case PRID_REV_LOONGSON3B_R1
:
194 case PRID_REV_LOONGSON3B_R2
:
195 cpu_clock_freq
= 1000000000;
198 cpu_clock_freq
= 100000000;
202 pr_info("CpuClock = %u\n", cpu_clock_freq
);