1 #ifndef _ASM_X86_MPSPEC_H
2 #define _ASM_X86_MPSPEC_H
5 #include <asm/mpspec_def.h>
6 #include <asm/x86_init.h>
7 #include <asm/apicdef.h>
9 extern int apic_version
[];
15 * Summit or generic (i.e. installer) kernels need lots of bus entries.
16 * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets.
18 #if CONFIG_BASE_SMALL == 0
19 # define MAX_MP_BUSSES 260
21 # define MAX_MP_BUSSES 32
24 #define MAX_IRQ_SOURCES 256
26 extern unsigned int def_to_bigsmp
;
28 #else /* CONFIG_X86_64: */
30 #define MAX_MP_BUSSES 256
31 /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */
32 #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
34 #endif /* CONFIG_X86_64 */
37 extern int mp_bus_id_to_type
[MAX_MP_BUSSES
];
40 extern DECLARE_BITMAP(mp_bus_not_pci
, MAX_MP_BUSSES
);
42 extern unsigned int boot_cpu_physical_apicid
;
43 extern unsigned long mp_lapic_addr
;
45 #ifdef CONFIG_X86_LOCAL_APIC
46 extern int smp_found_config
;
48 # define smp_found_config 0
51 static inline void get_smp_config(void)
53 x86_init
.mpparse
.get_smp_config(0);
56 static inline void early_get_smp_config(void)
58 x86_init
.mpparse
.get_smp_config(1);
61 static inline void find_smp_config(void)
63 x86_init
.mpparse
.find_smp_config();
66 #ifdef CONFIG_X86_MPPARSE
67 extern void early_reserve_e820_mpc_new(void);
68 extern int enable_update_mptable
;
69 extern int default_mpc_apic_id(struct mpc_cpu
*m
);
70 extern void default_smp_read_mpc_oem(struct mpc_table
*mpc
);
71 # ifdef CONFIG_X86_IO_APIC
72 extern void default_mpc_oem_bus_info(struct mpc_bus
*m
, char *str
);
74 # define default_mpc_oem_bus_info NULL
76 extern void default_find_smp_config(void);
77 extern void default_get_smp_config(unsigned int early
);
79 static inline void early_reserve_e820_mpc_new(void) { }
80 #define enable_update_mptable 0
81 #define default_mpc_apic_id NULL
82 #define default_smp_read_mpc_oem NULL
83 #define default_mpc_oem_bus_info NULL
84 #define default_find_smp_config x86_init_noop
85 #define default_get_smp_config x86_init_uint_noop
88 int generic_processor_info(int apicid
, int version
);
90 #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_LOCAL_APIC)
93 unsigned long mask
[PHYSID_ARRAY_SIZE
];
96 typedef struct physid_mask physid_mask_t
;
98 #define physid_set(physid, map) set_bit(physid, (map).mask)
99 #define physid_clear(physid, map) clear_bit(physid, (map).mask)
100 #define physid_isset(physid, map) test_bit(physid, (map).mask)
101 #define physid_test_and_set(physid, map) \
102 test_and_set_bit(physid, (map).mask)
104 #define physids_and(dst, src1, src2) \
105 bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC)
107 #define physids_or(dst, src1, src2) \
108 bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC)
110 #define physids_clear(map) \
111 bitmap_zero((map).mask, MAX_LOCAL_APIC)
113 #define physids_complement(dst, src) \
114 bitmap_complement((dst).mask, (src).mask, MAX_LOCAL_APIC)
116 #define physids_empty(map) \
117 bitmap_empty((map).mask, MAX_LOCAL_APIC)
119 #define physids_equal(map1, map2) \
120 bitmap_equal((map1).mask, (map2).mask, MAX_LOCAL_APIC)
122 #define physids_weight(map) \
123 bitmap_weight((map).mask, MAX_LOCAL_APIC)
125 #define physids_shift_right(d, s, n) \
126 bitmap_shift_right((d).mask, (s).mask, n, MAX_LOCAL_APIC)
128 #define physids_shift_left(d, s, n) \
129 bitmap_shift_left((d).mask, (s).mask, n, MAX_LOCAL_APIC)
131 static inline unsigned long physids_coerce(physid_mask_t
*map
)
136 static inline void physids_promote(unsigned long physids
, physid_mask_t
*map
)
139 map
->mask
[0] = physids
;
142 static inline void physid_set_mask_of_physid(int physid
, physid_mask_t
*map
)
145 physid_set(physid
, *map
);
148 #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
149 #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
151 extern physid_mask_t phys_cpu_present_map
;
153 #endif /* _ASM_X86_MPSPEC_H */