thermal: fix Mediatek thermal controller build
[linux/fpc-iii.git] / arch / x86 / include / asm / tsc.h
blob174c4212780afde12200fd23a1dbc17a08f40309
1 /*
2 * x86 TSC related functions
3 */
4 #ifndef _ASM_X86_TSC_H
5 #define _ASM_X86_TSC_H
7 #include <asm/processor.h>
9 #define NS_SCALE 10 /* 2^10, carefully chosen */
10 #define US_SCALE 32 /* 2^32, arbitralrily chosen */
13 * Standard way to access the cycle counter.
15 typedef unsigned long long cycles_t;
17 extern unsigned int cpu_khz;
18 extern unsigned int tsc_khz;
20 extern void disable_TSC(void);
22 static inline cycles_t get_cycles(void)
24 #ifndef CONFIG_X86_TSC
25 if (!cpu_has_tsc)
26 return 0;
27 #endif
29 return rdtsc();
32 extern struct system_counterval_t convert_art_to_tsc(cycle_t art);
34 extern void tsc_init(void);
35 extern void mark_tsc_unstable(char *reason);
36 extern int unsynchronized_tsc(void);
37 extern int check_tsc_unstable(void);
38 extern int check_tsc_disabled(void);
39 extern unsigned long native_calibrate_tsc(void);
40 extern unsigned long long native_sched_clock_from_tsc(u64 tsc);
42 extern int tsc_clocksource_reliable;
45 * Boot-time check whether the TSCs are synchronized across
46 * all CPUs/cores:
48 extern void check_tsc_sync_source(int cpu);
49 extern void check_tsc_sync_target(void);
51 extern int notsc_setup(char *);
52 extern void tsc_save_sched_clock_state(void);
53 extern void tsc_restore_sched_clock_state(void);
55 /* MSR based TSC calibration for Intel Atom SoC platforms */
56 unsigned long try_msr_calibrate_tsc(void);
58 #endif /* _ASM_X86_TSC_H */