thermal: fix Mediatek thermal controller build
[linux/fpc-iii.git] / arch / x86 / mm / init.c
blob9d56f271d519592a5fbf316237f73b57b0fc49c4
1 #include <linux/gfp.h>
2 #include <linux/initrd.h>
3 #include <linux/ioport.h>
4 #include <linux/swap.h>
5 #include <linux/memblock.h>
6 #include <linux/bootmem.h> /* for max_low_pfn */
8 #include <asm/cacheflush.h>
9 #include <asm/e820.h>
10 #include <asm/init.h>
11 #include <asm/page.h>
12 #include <asm/page_types.h>
13 #include <asm/sections.h>
14 #include <asm/setup.h>
15 #include <asm/tlbflush.h>
16 #include <asm/tlb.h>
17 #include <asm/proto.h>
18 #include <asm/dma.h> /* for MAX_DMA_PFN */
19 #include <asm/microcode.h>
22 * We need to define the tracepoints somewhere, and tlb.c
23 * is only compied when SMP=y.
25 #define CREATE_TRACE_POINTS
26 #include <trace/events/tlb.h>
28 #include "mm_internal.h"
31 * Tables translating between page_cache_type_t and pte encoding.
33 * The default values are defined statically as minimal supported mode;
34 * WC and WT fall back to UC-. pat_init() updates these values to support
35 * more cache modes, WC and WT, when it is safe to do so. See pat_init()
36 * for the details. Note, __early_ioremap() used during early boot-time
37 * takes pgprot_t (pte encoding) and does not use these tables.
39 * Index into __cachemode2pte_tbl[] is the cachemode.
41 * Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
42 * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
44 uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = {
45 [_PAGE_CACHE_MODE_WB ] = 0 | 0 ,
46 [_PAGE_CACHE_MODE_WC ] = 0 | _PAGE_PCD,
47 [_PAGE_CACHE_MODE_UC_MINUS] = 0 | _PAGE_PCD,
48 [_PAGE_CACHE_MODE_UC ] = _PAGE_PWT | _PAGE_PCD,
49 [_PAGE_CACHE_MODE_WT ] = 0 | _PAGE_PCD,
50 [_PAGE_CACHE_MODE_WP ] = 0 | _PAGE_PCD,
52 EXPORT_SYMBOL(__cachemode2pte_tbl);
54 uint8_t __pte2cachemode_tbl[8] = {
55 [__pte2cm_idx( 0 | 0 | 0 )] = _PAGE_CACHE_MODE_WB,
56 [__pte2cm_idx(_PAGE_PWT | 0 | 0 )] = _PAGE_CACHE_MODE_UC_MINUS,
57 [__pte2cm_idx( 0 | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC_MINUS,
58 [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC,
59 [__pte2cm_idx( 0 | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
60 [__pte2cm_idx(_PAGE_PWT | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
61 [__pte2cm_idx(0 | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
62 [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,
64 EXPORT_SYMBOL(__pte2cachemode_tbl);
66 static unsigned long __initdata pgt_buf_start;
67 static unsigned long __initdata pgt_buf_end;
68 static unsigned long __initdata pgt_buf_top;
70 static unsigned long min_pfn_mapped;
72 static bool __initdata can_use_brk_pgt = true;
75 * Pages returned are already directly mapped.
77 * Changing that is likely to break Xen, see commit:
79 * 279b706 x86,xen: introduce x86_init.mapping.pagetable_reserve
81 * for detailed information.
83 __ref void *alloc_low_pages(unsigned int num)
85 unsigned long pfn;
86 int i;
88 if (after_bootmem) {
89 unsigned int order;
91 order = get_order((unsigned long)num << PAGE_SHIFT);
92 return (void *)__get_free_pages(GFP_ATOMIC | __GFP_NOTRACK |
93 __GFP_ZERO, order);
96 if ((pgt_buf_end + num) > pgt_buf_top || !can_use_brk_pgt) {
97 unsigned long ret;
98 if (min_pfn_mapped >= max_pfn_mapped)
99 panic("alloc_low_pages: ran out of memory");
100 ret = memblock_find_in_range(min_pfn_mapped << PAGE_SHIFT,
101 max_pfn_mapped << PAGE_SHIFT,
102 PAGE_SIZE * num , PAGE_SIZE);
103 if (!ret)
104 panic("alloc_low_pages: can not alloc memory");
105 memblock_reserve(ret, PAGE_SIZE * num);
106 pfn = ret >> PAGE_SHIFT;
107 } else {
108 pfn = pgt_buf_end;
109 pgt_buf_end += num;
110 printk(KERN_DEBUG "BRK [%#010lx, %#010lx] PGTABLE\n",
111 pfn << PAGE_SHIFT, (pgt_buf_end << PAGE_SHIFT) - 1);
114 for (i = 0; i < num; i++) {
115 void *adr;
117 adr = __va((pfn + i) << PAGE_SHIFT);
118 clear_page(adr);
121 return __va(pfn << PAGE_SHIFT);
124 /* need 3 4k for initial PMD_SIZE, 3 4k for 0-ISA_END_ADDRESS */
125 #define INIT_PGT_BUF_SIZE (6 * PAGE_SIZE)
126 RESERVE_BRK(early_pgt_alloc, INIT_PGT_BUF_SIZE);
127 void __init early_alloc_pgt_buf(void)
129 unsigned long tables = INIT_PGT_BUF_SIZE;
130 phys_addr_t base;
132 base = __pa(extend_brk(tables, PAGE_SIZE));
134 pgt_buf_start = base >> PAGE_SHIFT;
135 pgt_buf_end = pgt_buf_start;
136 pgt_buf_top = pgt_buf_start + (tables >> PAGE_SHIFT);
139 int after_bootmem;
141 early_param_on_off("gbpages", "nogbpages", direct_gbpages, CONFIG_X86_DIRECT_GBPAGES);
143 struct map_range {
144 unsigned long start;
145 unsigned long end;
146 unsigned page_size_mask;
149 static int page_size_mask;
151 static void __init probe_page_size_mask(void)
153 #if !defined(CONFIG_KMEMCHECK)
155 * For CONFIG_KMEMCHECK or pagealloc debugging, identity mapping will
156 * use small pages.
157 * This will simplify cpa(), which otherwise needs to support splitting
158 * large pages into small in interrupt context, etc.
160 if (cpu_has_pse && !debug_pagealloc_enabled())
161 page_size_mask |= 1 << PG_LEVEL_2M;
162 #endif
164 /* Enable PSE if available */
165 if (cpu_has_pse)
166 cr4_set_bits_and_update_boot(X86_CR4_PSE);
168 /* Enable PGE if available */
169 if (cpu_has_pge) {
170 cr4_set_bits_and_update_boot(X86_CR4_PGE);
171 __supported_pte_mask |= _PAGE_GLOBAL;
172 } else
173 __supported_pte_mask &= ~_PAGE_GLOBAL;
175 /* Enable 1 GB linear kernel mappings if available: */
176 if (direct_gbpages && cpu_has_gbpages) {
177 printk(KERN_INFO "Using GB pages for direct mapping\n");
178 page_size_mask |= 1 << PG_LEVEL_1G;
179 } else {
180 direct_gbpages = 0;
184 #ifdef CONFIG_X86_32
185 #define NR_RANGE_MR 3
186 #else /* CONFIG_X86_64 */
187 #define NR_RANGE_MR 5
188 #endif
190 static int __meminit save_mr(struct map_range *mr, int nr_range,
191 unsigned long start_pfn, unsigned long end_pfn,
192 unsigned long page_size_mask)
194 if (start_pfn < end_pfn) {
195 if (nr_range >= NR_RANGE_MR)
196 panic("run out of range for init_memory_mapping\n");
197 mr[nr_range].start = start_pfn<<PAGE_SHIFT;
198 mr[nr_range].end = end_pfn<<PAGE_SHIFT;
199 mr[nr_range].page_size_mask = page_size_mask;
200 nr_range++;
203 return nr_range;
207 * adjust the page_size_mask for small range to go with
208 * big page size instead small one if nearby are ram too.
210 static void __init_refok adjust_range_page_size_mask(struct map_range *mr,
211 int nr_range)
213 int i;
215 for (i = 0; i < nr_range; i++) {
216 if ((page_size_mask & (1<<PG_LEVEL_2M)) &&
217 !(mr[i].page_size_mask & (1<<PG_LEVEL_2M))) {
218 unsigned long start = round_down(mr[i].start, PMD_SIZE);
219 unsigned long end = round_up(mr[i].end, PMD_SIZE);
221 #ifdef CONFIG_X86_32
222 if ((end >> PAGE_SHIFT) > max_low_pfn)
223 continue;
224 #endif
226 if (memblock_is_region_memory(start, end - start))
227 mr[i].page_size_mask |= 1<<PG_LEVEL_2M;
229 if ((page_size_mask & (1<<PG_LEVEL_1G)) &&
230 !(mr[i].page_size_mask & (1<<PG_LEVEL_1G))) {
231 unsigned long start = round_down(mr[i].start, PUD_SIZE);
232 unsigned long end = round_up(mr[i].end, PUD_SIZE);
234 if (memblock_is_region_memory(start, end - start))
235 mr[i].page_size_mask |= 1<<PG_LEVEL_1G;
240 static const char *page_size_string(struct map_range *mr)
242 static const char str_1g[] = "1G";
243 static const char str_2m[] = "2M";
244 static const char str_4m[] = "4M";
245 static const char str_4k[] = "4k";
247 if (mr->page_size_mask & (1<<PG_LEVEL_1G))
248 return str_1g;
250 * 32-bit without PAE has a 4M large page size.
251 * PG_LEVEL_2M is misnamed, but we can at least
252 * print out the right size in the string.
254 if (IS_ENABLED(CONFIG_X86_32) &&
255 !IS_ENABLED(CONFIG_X86_PAE) &&
256 mr->page_size_mask & (1<<PG_LEVEL_2M))
257 return str_4m;
259 if (mr->page_size_mask & (1<<PG_LEVEL_2M))
260 return str_2m;
262 return str_4k;
265 static int __meminit split_mem_range(struct map_range *mr, int nr_range,
266 unsigned long start,
267 unsigned long end)
269 unsigned long start_pfn, end_pfn, limit_pfn;
270 unsigned long pfn;
271 int i;
273 limit_pfn = PFN_DOWN(end);
275 /* head if not big page alignment ? */
276 pfn = start_pfn = PFN_DOWN(start);
277 #ifdef CONFIG_X86_32
279 * Don't use a large page for the first 2/4MB of memory
280 * because there are often fixed size MTRRs in there
281 * and overlapping MTRRs into large pages can cause
282 * slowdowns.
284 if (pfn == 0)
285 end_pfn = PFN_DOWN(PMD_SIZE);
286 else
287 end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
288 #else /* CONFIG_X86_64 */
289 end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
290 #endif
291 if (end_pfn > limit_pfn)
292 end_pfn = limit_pfn;
293 if (start_pfn < end_pfn) {
294 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
295 pfn = end_pfn;
298 /* big page (2M) range */
299 start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
300 #ifdef CONFIG_X86_32
301 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
302 #else /* CONFIG_X86_64 */
303 end_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
304 if (end_pfn > round_down(limit_pfn, PFN_DOWN(PMD_SIZE)))
305 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
306 #endif
308 if (start_pfn < end_pfn) {
309 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
310 page_size_mask & (1<<PG_LEVEL_2M));
311 pfn = end_pfn;
314 #ifdef CONFIG_X86_64
315 /* big page (1G) range */
316 start_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
317 end_pfn = round_down(limit_pfn, PFN_DOWN(PUD_SIZE));
318 if (start_pfn < end_pfn) {
319 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
320 page_size_mask &
321 ((1<<PG_LEVEL_2M)|(1<<PG_LEVEL_1G)));
322 pfn = end_pfn;
325 /* tail is not big page (1G) alignment */
326 start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
327 end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
328 if (start_pfn < end_pfn) {
329 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
330 page_size_mask & (1<<PG_LEVEL_2M));
331 pfn = end_pfn;
333 #endif
335 /* tail is not big page (2M) alignment */
336 start_pfn = pfn;
337 end_pfn = limit_pfn;
338 nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
340 if (!after_bootmem)
341 adjust_range_page_size_mask(mr, nr_range);
343 /* try to merge same page size and continuous */
344 for (i = 0; nr_range > 1 && i < nr_range - 1; i++) {
345 unsigned long old_start;
346 if (mr[i].end != mr[i+1].start ||
347 mr[i].page_size_mask != mr[i+1].page_size_mask)
348 continue;
349 /* move it */
350 old_start = mr[i].start;
351 memmove(&mr[i], &mr[i+1],
352 (nr_range - 1 - i) * sizeof(struct map_range));
353 mr[i--].start = old_start;
354 nr_range--;
357 for (i = 0; i < nr_range; i++)
358 pr_debug(" [mem %#010lx-%#010lx] page %s\n",
359 mr[i].start, mr[i].end - 1,
360 page_size_string(&mr[i]));
362 return nr_range;
365 struct range pfn_mapped[E820_X_MAX];
366 int nr_pfn_mapped;
368 static void add_pfn_range_mapped(unsigned long start_pfn, unsigned long end_pfn)
370 nr_pfn_mapped = add_range_with_merge(pfn_mapped, E820_X_MAX,
371 nr_pfn_mapped, start_pfn, end_pfn);
372 nr_pfn_mapped = clean_sort_range(pfn_mapped, E820_X_MAX);
374 max_pfn_mapped = max(max_pfn_mapped, end_pfn);
376 if (start_pfn < (1UL<<(32-PAGE_SHIFT)))
377 max_low_pfn_mapped = max(max_low_pfn_mapped,
378 min(end_pfn, 1UL<<(32-PAGE_SHIFT)));
381 bool pfn_range_is_mapped(unsigned long start_pfn, unsigned long end_pfn)
383 int i;
385 for (i = 0; i < nr_pfn_mapped; i++)
386 if ((start_pfn >= pfn_mapped[i].start) &&
387 (end_pfn <= pfn_mapped[i].end))
388 return true;
390 return false;
394 * Setup the direct mapping of the physical memory at PAGE_OFFSET.
395 * This runs before bootmem is initialized and gets pages directly from
396 * the physical memory. To access them they are temporarily mapped.
398 unsigned long __init_refok init_memory_mapping(unsigned long start,
399 unsigned long end)
401 struct map_range mr[NR_RANGE_MR];
402 unsigned long ret = 0;
403 int nr_range, i;
405 pr_debug("init_memory_mapping: [mem %#010lx-%#010lx]\n",
406 start, end - 1);
408 memset(mr, 0, sizeof(mr));
409 nr_range = split_mem_range(mr, 0, start, end);
411 for (i = 0; i < nr_range; i++)
412 ret = kernel_physical_mapping_init(mr[i].start, mr[i].end,
413 mr[i].page_size_mask);
415 add_pfn_range_mapped(start >> PAGE_SHIFT, ret >> PAGE_SHIFT);
417 return ret >> PAGE_SHIFT;
421 * We need to iterate through the E820 memory map and create direct mappings
422 * for only E820_RAM and E820_KERN_RESERVED regions. We cannot simply
423 * create direct mappings for all pfns from [0 to max_low_pfn) and
424 * [4GB to max_pfn) because of possible memory holes in high addresses
425 * that cannot be marked as UC by fixed/variable range MTRRs.
426 * Depending on the alignment of E820 ranges, this may possibly result
427 * in using smaller size (i.e. 4K instead of 2M or 1G) page tables.
429 * init_mem_mapping() calls init_range_memory_mapping() with big range.
430 * That range would have hole in the middle or ends, and only ram parts
431 * will be mapped in init_range_memory_mapping().
433 static unsigned long __init init_range_memory_mapping(
434 unsigned long r_start,
435 unsigned long r_end)
437 unsigned long start_pfn, end_pfn;
438 unsigned long mapped_ram_size = 0;
439 int i;
441 for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) {
442 u64 start = clamp_val(PFN_PHYS(start_pfn), r_start, r_end);
443 u64 end = clamp_val(PFN_PHYS(end_pfn), r_start, r_end);
444 if (start >= end)
445 continue;
448 * if it is overlapping with brk pgt, we need to
449 * alloc pgt buf from memblock instead.
451 can_use_brk_pgt = max(start, (u64)pgt_buf_end<<PAGE_SHIFT) >=
452 min(end, (u64)pgt_buf_top<<PAGE_SHIFT);
453 init_memory_mapping(start, end);
454 mapped_ram_size += end - start;
455 can_use_brk_pgt = true;
458 return mapped_ram_size;
461 static unsigned long __init get_new_step_size(unsigned long step_size)
464 * Initial mapped size is PMD_SIZE (2M).
465 * We can not set step_size to be PUD_SIZE (1G) yet.
466 * In worse case, when we cross the 1G boundary, and
467 * PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k)
468 * to map 1G range with PTE. Hence we use one less than the
469 * difference of page table level shifts.
471 * Don't need to worry about overflow in the top-down case, on 32bit,
472 * when step_size is 0, round_down() returns 0 for start, and that
473 * turns it into 0x100000000ULL.
474 * In the bottom-up case, round_up(x, 0) returns 0 though too, which
475 * needs to be taken into consideration by the code below.
477 return step_size << (PMD_SHIFT - PAGE_SHIFT - 1);
481 * memory_map_top_down - Map [map_start, map_end) top down
482 * @map_start: start address of the target memory range
483 * @map_end: end address of the target memory range
485 * This function will setup direct mapping for memory range
486 * [map_start, map_end) in top-down. That said, the page tables
487 * will be allocated at the end of the memory, and we map the
488 * memory in top-down.
490 static void __init memory_map_top_down(unsigned long map_start,
491 unsigned long map_end)
493 unsigned long real_end, start, last_start;
494 unsigned long step_size;
495 unsigned long addr;
496 unsigned long mapped_ram_size = 0;
498 /* xen has big range in reserved near end of ram, skip it at first.*/
499 addr = memblock_find_in_range(map_start, map_end, PMD_SIZE, PMD_SIZE);
500 real_end = addr + PMD_SIZE;
502 /* step_size need to be small so pgt_buf from BRK could cover it */
503 step_size = PMD_SIZE;
504 max_pfn_mapped = 0; /* will get exact value next */
505 min_pfn_mapped = real_end >> PAGE_SHIFT;
506 last_start = start = real_end;
509 * We start from the top (end of memory) and go to the bottom.
510 * The memblock_find_in_range() gets us a block of RAM from the
511 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
512 * for page table.
514 while (last_start > map_start) {
515 if (last_start > step_size) {
516 start = round_down(last_start - 1, step_size);
517 if (start < map_start)
518 start = map_start;
519 } else
520 start = map_start;
521 mapped_ram_size += init_range_memory_mapping(start,
522 last_start);
523 last_start = start;
524 min_pfn_mapped = last_start >> PAGE_SHIFT;
525 if (mapped_ram_size >= step_size)
526 step_size = get_new_step_size(step_size);
529 if (real_end < map_end)
530 init_range_memory_mapping(real_end, map_end);
534 * memory_map_bottom_up - Map [map_start, map_end) bottom up
535 * @map_start: start address of the target memory range
536 * @map_end: end address of the target memory range
538 * This function will setup direct mapping for memory range
539 * [map_start, map_end) in bottom-up. Since we have limited the
540 * bottom-up allocation above the kernel, the page tables will
541 * be allocated just above the kernel and we map the memory
542 * in [map_start, map_end) in bottom-up.
544 static void __init memory_map_bottom_up(unsigned long map_start,
545 unsigned long map_end)
547 unsigned long next, start;
548 unsigned long mapped_ram_size = 0;
549 /* step_size need to be small so pgt_buf from BRK could cover it */
550 unsigned long step_size = PMD_SIZE;
552 start = map_start;
553 min_pfn_mapped = start >> PAGE_SHIFT;
556 * We start from the bottom (@map_start) and go to the top (@map_end).
557 * The memblock_find_in_range() gets us a block of RAM from the
558 * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
559 * for page table.
561 while (start < map_end) {
562 if (step_size && map_end - start > step_size) {
563 next = round_up(start + 1, step_size);
564 if (next > map_end)
565 next = map_end;
566 } else {
567 next = map_end;
570 mapped_ram_size += init_range_memory_mapping(start, next);
571 start = next;
573 if (mapped_ram_size >= step_size)
574 step_size = get_new_step_size(step_size);
578 void __init init_mem_mapping(void)
580 unsigned long end;
582 probe_page_size_mask();
584 #ifdef CONFIG_X86_64
585 end = max_pfn << PAGE_SHIFT;
586 #else
587 end = max_low_pfn << PAGE_SHIFT;
588 #endif
590 /* the ISA range is always mapped regardless of memory holes */
591 init_memory_mapping(0, ISA_END_ADDRESS);
594 * If the allocation is in bottom-up direction, we setup direct mapping
595 * in bottom-up, otherwise we setup direct mapping in top-down.
597 if (memblock_bottom_up()) {
598 unsigned long kernel_end = __pa_symbol(_end);
601 * we need two separate calls here. This is because we want to
602 * allocate page tables above the kernel. So we first map
603 * [kernel_end, end) to make memory above the kernel be mapped
604 * as soon as possible. And then use page tables allocated above
605 * the kernel to map [ISA_END_ADDRESS, kernel_end).
607 memory_map_bottom_up(kernel_end, end);
608 memory_map_bottom_up(ISA_END_ADDRESS, kernel_end);
609 } else {
610 memory_map_top_down(ISA_END_ADDRESS, end);
613 #ifdef CONFIG_X86_64
614 if (max_pfn > max_low_pfn) {
615 /* can we preseve max_low_pfn ?*/
616 max_low_pfn = max_pfn;
618 #else
619 early_ioremap_page_table_range_init();
620 #endif
622 load_cr3(swapper_pg_dir);
623 __flush_tlb_all();
625 early_memtest(0, max_pfn_mapped << PAGE_SHIFT);
629 * devmem_is_allowed() checks to see if /dev/mem access to a certain address
630 * is valid. The argument is a physical page number.
633 * On x86, access has to be given to the first megabyte of ram because that area
634 * contains BIOS code and data regions used by X and dosemu and similar apps.
635 * Access has to be given to non-kernel-ram areas as well, these contain the PCI
636 * mmio resources as well as potential bios/acpi data regions.
638 int devmem_is_allowed(unsigned long pagenr)
640 if (pagenr < 256)
641 return 1;
642 if (iomem_is_exclusive(pagenr << PAGE_SHIFT))
643 return 0;
644 if (!page_is_ram(pagenr))
645 return 1;
646 return 0;
649 void free_init_pages(char *what, unsigned long begin, unsigned long end)
651 unsigned long begin_aligned, end_aligned;
653 /* Make sure boundaries are page aligned */
654 begin_aligned = PAGE_ALIGN(begin);
655 end_aligned = end & PAGE_MASK;
657 if (WARN_ON(begin_aligned != begin || end_aligned != end)) {
658 begin = begin_aligned;
659 end = end_aligned;
662 if (begin >= end)
663 return;
666 * If debugging page accesses then do not free this memory but
667 * mark them not present - any buggy init-section access will
668 * create a kernel page fault:
670 if (debug_pagealloc_enabled()) {
671 pr_info("debug: unmapping init [mem %#010lx-%#010lx]\n",
672 begin, end - 1);
673 set_memory_np(begin, (end - begin) >> PAGE_SHIFT);
674 } else {
676 * We just marked the kernel text read only above, now that
677 * we are going to free part of that, we need to make that
678 * writeable and non-executable first.
680 set_memory_nx(begin, (end - begin) >> PAGE_SHIFT);
681 set_memory_rw(begin, (end - begin) >> PAGE_SHIFT);
683 free_reserved_area((void *)begin, (void *)end,
684 POISON_FREE_INITMEM, what);
688 void free_initmem(void)
690 free_init_pages("unused kernel",
691 (unsigned long)(&__init_begin),
692 (unsigned long)(&__init_end));
695 #ifdef CONFIG_BLK_DEV_INITRD
696 void __init free_initrd_mem(unsigned long start, unsigned long end)
699 * Remember, initrd memory may contain microcode or other useful things.
700 * Before we lose initrd mem, we need to find a place to hold them
701 * now that normal virtual memory is enabled.
703 save_microcode_in_initrd();
706 * end could be not aligned, and We can not align that,
707 * decompresser could be confused by aligned initrd_end
708 * We already reserve the end partial page before in
709 * - i386_start_kernel()
710 * - x86_64_start_kernel()
711 * - relocate_initrd()
712 * So here We can do PAGE_ALIGN() safely to get partial page to be freed
714 free_init_pages("initrd", start, PAGE_ALIGN(end));
716 #endif
718 void __init zone_sizes_init(void)
720 unsigned long max_zone_pfns[MAX_NR_ZONES];
722 memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
724 #ifdef CONFIG_ZONE_DMA
725 max_zone_pfns[ZONE_DMA] = min(MAX_DMA_PFN, max_low_pfn);
726 #endif
727 #ifdef CONFIG_ZONE_DMA32
728 max_zone_pfns[ZONE_DMA32] = min(MAX_DMA32_PFN, max_low_pfn);
729 #endif
730 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
731 #ifdef CONFIG_HIGHMEM
732 max_zone_pfns[ZONE_HIGHMEM] = max_pfn;
733 #endif
735 free_area_init_nodes(max_zone_pfns);
738 DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = {
739 #ifdef CONFIG_SMP
740 .active_mm = &init_mm,
741 .state = 0,
742 #endif
743 .cr4 = ~0UL, /* fail hard if we screw up cr4 shadow initialization */
745 EXPORT_SYMBOL_GPL(cpu_tlbstate);
747 void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache)
749 /* entry 0 MUST be WB (hardwired to speed up translations) */
750 BUG_ON(!entry && cache != _PAGE_CACHE_MODE_WB);
752 __cachemode2pte_tbl[cache] = __cm_idx2pte(entry);
753 __pte2cachemode_tbl[entry] = cache;