2 * This file contains assembly-language implementations
3 * of IP-style 1's complement checksum routines.
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
12 * Severely hacked about by Paul Mackerras (paulus@cs.anu.edu.au).
15 #include <linux/sys.h>
16 #include <asm/processor.h>
17 #include <asm/errno.h>
18 #include <asm/ppc_asm.h>
19 #include <asm/export.h>
22 * Computes the checksum of a memory block at buff, length len,
23 * and adds in "sum" (32-bit).
25 * __csum_partial(r3=buff, r4=len, r5=sum)
27 _GLOBAL(__csum_partial)
28 addic r0,r5,0 /* clear carry */
30 srdi. r6,r4,3 /* less than 8 bytes? */
34 * If only halfword aligned, align to a double word. Since odd
35 * aligned addresses should be rare and they would require more
36 * work to calculate the correct checksum, we ignore that case
37 * and take the potential slowdown of unaligned loads.
39 rldicl. r6,r3,64-1,64-2 /* r6 = (r3 >> 1) & 0x3 */
47 lhz r6,0(r3) /* align to doubleword */
55 * We unroll the loop such that each iteration is 64 bytes with an
56 * entry and exit limb of 64 bytes, meaning a minimum size of
60 beq .Lcsum_tail_doublewords /* len < 128 */
66 stdu r1,-STACKFRAMESIZE(r1)
67 std r14,STK_REG(R14)(r1)
68 std r15,STK_REG(R15)(r1)
69 std r16,STK_REG(R16)(r1)
78 * On POWER6 and POWER7 back to back adde instructions take 2 cycles
79 * because of the XER dependency. This means the fastest this loop can
80 * go is 16 cycles per iteration. The scheduling of the loop below has
81 * been shown to hit this on both POWER6 and POWER7.
128 ld r14,STK_REG(R14)(r1)
129 ld r15,STK_REG(R15)(r1)
130 ld r16,STK_REG(R16)(r1)
131 addi r1,r1,STACKFRAMESIZE
135 .Lcsum_tail_doublewords: /* Up to 127 bytes to go */
148 .Lcsum_tail_word: /* Up to 7 bytes to go */
150 beq .Lcsum_tail_halfword
157 .Lcsum_tail_halfword: /* Up to 3 bytes to go */
166 .Lcsum_tail_byte: /* Up to 1 byte to go */
171 #ifdef __BIG_ENDIAN__
172 sldi r9,r6,8 /* Pad the byte out to 16 bits */
179 addze r0,r0 /* add in final carry */
180 rldicl r4,r0,32,0 /* fold two 32 bit halves together */
184 EXPORT_SYMBOL(__csum_partial)
189 EX_TABLE(100b,.Lsrc_error_nr)
194 EX_TABLE(150b,.Lsrc_error)
199 EX_TABLE(200b,.Ldest_error_nr)
204 EX_TABLE(250b,.Ldest_error)
208 * Computes the checksum of a memory block at src, length len,
209 * and adds in "sum" (32-bit), while copying the block to dst.
210 * If an access exception occurs on src or dst, it stores -EFAULT
211 * to *src_err or *dst_err respectively. The caller must take any action
212 * required in this case (zeroing memory, recalculating partial checksum etc).
214 * csum_partial_copy_generic(r3=src, r4=dst, r5=len, r6=sum, r7=src_err, r8=dst_err)
216 _GLOBAL(csum_partial_copy_generic)
217 addic r0,r6,0 /* clear carry */
219 srdi. r6,r5,3 /* less than 8 bytes? */
223 * If only halfword aligned, align to a double word. Since odd
224 * aligned addresses should be rare and they would require more
225 * work to calculate the correct checksum, we ignore that case
226 * and take the potential slowdown of unaligned loads.
228 * If the source and destination are relatively unaligned we only
229 * align the source. This keeps things simple.
231 rldicl. r6,r3,64-1,64-2 /* r6 = (r3 >> 1) & 0x3 */
239 srcnr; lhz r6,0(r3) /* align to doubleword */
249 * We unroll the loop such that each iteration is 64 bytes with an
250 * entry and exit limb of 64 bytes, meaning a minimum size of
254 beq .Lcopy_tail_doublewords /* len < 128 */
260 stdu r1,-STACKFRAMESIZE(r1)
261 std r14,STK_REG(R14)(r1)
262 std r15,STK_REG(R15)(r1)
263 std r16,STK_REG(R16)(r1)
268 source; ld r10,16(r3)
269 source; ld r11,24(r3)
272 * On POWER6 and POWER7 back to back adde instructions take 2 cycles
273 * because of the XER dependency. This means the fastest this loop can
274 * go is 16 cycles per iteration. The scheduling of the loop below has
275 * been shown to hit this on both POWER6 and POWER7.
280 source; ld r12,32(r3)
281 source; ld r14,40(r3)
284 source; ld r15,48(r3)
285 source; ld r16,56(r3)
310 source; ld r10,16(r3)
311 source; ld r11,24(r3)
316 source; ld r12,32(r3)
317 source; ld r14,40(r3)
320 source; ld r15,48(r3)
321 source; ld r16,56(r3)
344 ld r14,STK_REG(R14)(r1)
345 ld r15,STK_REG(R15)(r1)
346 ld r16,STK_REG(R16)(r1)
347 addi r1,r1,STACKFRAMESIZE
351 .Lcopy_tail_doublewords: /* Up to 127 bytes to go */
366 .Lcopy_tail_word: /* Up to 7 bytes to go */
368 beq .Lcopy_tail_halfword
377 .Lcopy_tail_halfword: /* Up to 3 bytes to go */
388 .Lcopy_tail_byte: /* Up to 1 byte to go */
393 #ifdef __BIG_ENDIAN__
394 sldi r9,r6,8 /* Pad the byte out to 16 bits */
402 addze r0,r0 /* add in final carry */
403 rldicl r4,r0,32,0 /* fold two 32 bit halves together */
409 ld r14,STK_REG(R14)(r1)
410 ld r15,STK_REG(R15)(r1)
411 ld r16,STK_REG(R16)(r1)
412 addi r1,r1,STACKFRAMESIZE
421 ld r14,STK_REG(R14)(r1)
422 ld r15,STK_REG(R15)(r1)
423 ld r16,STK_REG(R16)(r1)
424 addi r1,r1,STACKFRAMESIZE
431 EXPORT_SYMBOL(csum_partial_copy_generic)