ARM: mm: Recreate kernel mappings in early_paging_init()
[linux/fpc-iii.git] / drivers / net / can / bfin_can.c
bloba2700d25ff0ed87fb800d4c157aeef911234d26e
1 /*
2 * Blackfin On-Chip CAN Driver
4 * Copyright 2004-2009 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
9 */
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/bitops.h>
15 #include <linux/interrupt.h>
16 #include <linux/errno.h>
17 #include <linux/netdevice.h>
18 #include <linux/skbuff.h>
19 #include <linux/platform_device.h>
21 #include <linux/can/dev.h>
22 #include <linux/can/error.h>
24 #include <asm/bfin_can.h>
25 #include <asm/portmux.h>
27 #define DRV_NAME "bfin_can"
28 #define BFIN_CAN_TIMEOUT 100
29 #define TX_ECHO_SKB_MAX 1
32 * bfin can private data
34 struct bfin_can_priv {
35 struct can_priv can; /* must be the first member */
36 struct net_device *dev;
37 void __iomem *membase;
38 int rx_irq;
39 int tx_irq;
40 int err_irq;
41 unsigned short *pin_list;
45 * bfin can timing parameters
47 static const struct can_bittiming_const bfin_can_bittiming_const = {
48 .name = DRV_NAME,
49 .tseg1_min = 1,
50 .tseg1_max = 16,
51 .tseg2_min = 1,
52 .tseg2_max = 8,
53 .sjw_max = 4,
55 * Although the BRP field can be set to any value, it is recommended
56 * that the value be greater than or equal to 4, as restrictions
57 * apply to the bit timing configuration when BRP is less than 4.
59 .brp_min = 4,
60 .brp_max = 1024,
61 .brp_inc = 1,
64 static int bfin_can_set_bittiming(struct net_device *dev)
66 struct bfin_can_priv *priv = netdev_priv(dev);
67 struct bfin_can_regs __iomem *reg = priv->membase;
68 struct can_bittiming *bt = &priv->can.bittiming;
69 u16 clk, timing;
71 clk = bt->brp - 1;
72 timing = ((bt->sjw - 1) << 8) | (bt->prop_seg + bt->phase_seg1 - 1) |
73 ((bt->phase_seg2 - 1) << 4);
76 * If the SAM bit is set, the input signal is oversampled three times
77 * at the SCLK rate.
79 if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
80 timing |= SAM;
82 bfin_write(&reg->clock, clk);
83 bfin_write(&reg->timing, timing);
85 netdev_info(dev, "setting CLOCK=0x%04x TIMING=0x%04x\n", clk, timing);
87 return 0;
90 static void bfin_can_set_reset_mode(struct net_device *dev)
92 struct bfin_can_priv *priv = netdev_priv(dev);
93 struct bfin_can_regs __iomem *reg = priv->membase;
94 int timeout = BFIN_CAN_TIMEOUT;
95 int i;
97 /* disable interrupts */
98 bfin_write(&reg->mbim1, 0);
99 bfin_write(&reg->mbim2, 0);
100 bfin_write(&reg->gim, 0);
102 /* reset can and enter configuration mode */
103 bfin_write(&reg->control, SRS | CCR);
104 SSYNC();
105 bfin_write(&reg->control, CCR);
106 SSYNC();
107 while (!(bfin_read(&reg->control) & CCA)) {
108 udelay(10);
109 if (--timeout == 0) {
110 netdev_err(dev, "fail to enter configuration mode\n");
111 BUG();
116 * All mailbox configurations are marked as inactive
117 * by writing to CAN Mailbox Configuration Registers 1 and 2
118 * For all bits: 0 - Mailbox disabled, 1 - Mailbox enabled
120 bfin_write(&reg->mc1, 0);
121 bfin_write(&reg->mc2, 0);
123 /* Set Mailbox Direction */
124 bfin_write(&reg->md1, 0xFFFF); /* mailbox 1-16 are RX */
125 bfin_write(&reg->md2, 0); /* mailbox 17-32 are TX */
127 /* RECEIVE_STD_CHL */
128 for (i = 0; i < 2; i++) {
129 bfin_write(&reg->chl[RECEIVE_STD_CHL + i].id0, 0);
130 bfin_write(&reg->chl[RECEIVE_STD_CHL + i].id1, AME);
131 bfin_write(&reg->chl[RECEIVE_STD_CHL + i].dlc, 0);
132 bfin_write(&reg->msk[RECEIVE_STD_CHL + i].amh, 0x1FFF);
133 bfin_write(&reg->msk[RECEIVE_STD_CHL + i].aml, 0xFFFF);
136 /* RECEIVE_EXT_CHL */
137 for (i = 0; i < 2; i++) {
138 bfin_write(&reg->chl[RECEIVE_EXT_CHL + i].id0, 0);
139 bfin_write(&reg->chl[RECEIVE_EXT_CHL + i].id1, AME | IDE);
140 bfin_write(&reg->chl[RECEIVE_EXT_CHL + i].dlc, 0);
141 bfin_write(&reg->msk[RECEIVE_EXT_CHL + i].amh, 0x1FFF);
142 bfin_write(&reg->msk[RECEIVE_EXT_CHL + i].aml, 0xFFFF);
145 bfin_write(&reg->mc2, BIT(TRANSMIT_CHL - 16));
146 bfin_write(&reg->mc1, BIT(RECEIVE_STD_CHL) + BIT(RECEIVE_EXT_CHL));
147 SSYNC();
149 priv->can.state = CAN_STATE_STOPPED;
152 static void bfin_can_set_normal_mode(struct net_device *dev)
154 struct bfin_can_priv *priv = netdev_priv(dev);
155 struct bfin_can_regs __iomem *reg = priv->membase;
156 int timeout = BFIN_CAN_TIMEOUT;
159 * leave configuration mode
161 bfin_write(&reg->control, bfin_read(&reg->control) & ~CCR);
163 while (bfin_read(&reg->status) & CCA) {
164 udelay(10);
165 if (--timeout == 0) {
166 netdev_err(dev, "fail to leave configuration mode\n");
167 BUG();
172 * clear _All_ tx and rx interrupts
174 bfin_write(&reg->mbtif1, 0xFFFF);
175 bfin_write(&reg->mbtif2, 0xFFFF);
176 bfin_write(&reg->mbrif1, 0xFFFF);
177 bfin_write(&reg->mbrif2, 0xFFFF);
180 * clear global interrupt status register
182 bfin_write(&reg->gis, 0x7FF); /* overwrites with '1' */
185 * Initialize Interrupts
186 * - set bits in the mailbox interrupt mask register
187 * - global interrupt mask
189 bfin_write(&reg->mbim1, BIT(RECEIVE_STD_CHL) + BIT(RECEIVE_EXT_CHL));
190 bfin_write(&reg->mbim2, BIT(TRANSMIT_CHL - 16));
192 bfin_write(&reg->gim, EPIM | BOIM | RMLIM);
193 SSYNC();
196 static void bfin_can_start(struct net_device *dev)
198 struct bfin_can_priv *priv = netdev_priv(dev);
200 /* enter reset mode */
201 if (priv->can.state != CAN_STATE_STOPPED)
202 bfin_can_set_reset_mode(dev);
204 /* leave reset mode */
205 bfin_can_set_normal_mode(dev);
208 static int bfin_can_set_mode(struct net_device *dev, enum can_mode mode)
210 switch (mode) {
211 case CAN_MODE_START:
212 bfin_can_start(dev);
213 if (netif_queue_stopped(dev))
214 netif_wake_queue(dev);
215 break;
217 default:
218 return -EOPNOTSUPP;
221 return 0;
224 static int bfin_can_get_berr_counter(const struct net_device *dev,
225 struct can_berr_counter *bec)
227 struct bfin_can_priv *priv = netdev_priv(dev);
228 struct bfin_can_regs __iomem *reg = priv->membase;
230 u16 cec = bfin_read(&reg->cec);
232 bec->txerr = cec >> 8;
233 bec->rxerr = cec;
235 return 0;
238 static int bfin_can_start_xmit(struct sk_buff *skb, struct net_device *dev)
240 struct bfin_can_priv *priv = netdev_priv(dev);
241 struct bfin_can_regs __iomem *reg = priv->membase;
242 struct can_frame *cf = (struct can_frame *)skb->data;
243 u8 dlc = cf->can_dlc;
244 canid_t id = cf->can_id;
245 u8 *data = cf->data;
246 u16 val;
247 int i;
249 if (can_dropped_invalid_skb(dev, skb))
250 return NETDEV_TX_OK;
252 netif_stop_queue(dev);
254 /* fill id */
255 if (id & CAN_EFF_FLAG) {
256 bfin_write(&reg->chl[TRANSMIT_CHL].id0, id);
257 val = ((id & 0x1FFF0000) >> 16) | IDE;
258 } else
259 val = (id << 2);
260 if (id & CAN_RTR_FLAG)
261 val |= RTR;
262 bfin_write(&reg->chl[TRANSMIT_CHL].id1, val | AME);
264 /* fill payload */
265 for (i = 0; i < 8; i += 2) {
266 val = ((7 - i) < dlc ? (data[7 - i]) : 0) +
267 ((6 - i) < dlc ? (data[6 - i] << 8) : 0);
268 bfin_write(&reg->chl[TRANSMIT_CHL].data[i], val);
271 /* fill data length code */
272 bfin_write(&reg->chl[TRANSMIT_CHL].dlc, dlc);
274 can_put_echo_skb(skb, dev, 0);
276 /* set transmit request */
277 bfin_write(&reg->trs2, BIT(TRANSMIT_CHL - 16));
279 return 0;
282 static void bfin_can_rx(struct net_device *dev, u16 isrc)
284 struct bfin_can_priv *priv = netdev_priv(dev);
285 struct net_device_stats *stats = &dev->stats;
286 struct bfin_can_regs __iomem *reg = priv->membase;
287 struct can_frame *cf;
288 struct sk_buff *skb;
289 int obj;
290 int i;
291 u16 val;
293 skb = alloc_can_skb(dev, &cf);
294 if (skb == NULL)
295 return;
297 /* get id */
298 if (isrc & BIT(RECEIVE_EXT_CHL)) {
299 /* extended frame format (EFF) */
300 cf->can_id = ((bfin_read(&reg->chl[RECEIVE_EXT_CHL].id1)
301 & 0x1FFF) << 16)
302 + bfin_read(&reg->chl[RECEIVE_EXT_CHL].id0);
303 cf->can_id |= CAN_EFF_FLAG;
304 obj = RECEIVE_EXT_CHL;
305 } else {
306 /* standard frame format (SFF) */
307 cf->can_id = (bfin_read(&reg->chl[RECEIVE_STD_CHL].id1)
308 & 0x1ffc) >> 2;
309 obj = RECEIVE_STD_CHL;
311 if (bfin_read(&reg->chl[obj].id1) & RTR)
312 cf->can_id |= CAN_RTR_FLAG;
314 /* get data length code */
315 cf->can_dlc = get_can_dlc(bfin_read(&reg->chl[obj].dlc) & 0xF);
317 /* get payload */
318 for (i = 0; i < 8; i += 2) {
319 val = bfin_read(&reg->chl[obj].data[i]);
320 cf->data[7 - i] = (7 - i) < cf->can_dlc ? val : 0;
321 cf->data[6 - i] = (6 - i) < cf->can_dlc ? (val >> 8) : 0;
324 netif_rx(skb);
326 stats->rx_packets++;
327 stats->rx_bytes += cf->can_dlc;
330 static int bfin_can_err(struct net_device *dev, u16 isrc, u16 status)
332 struct bfin_can_priv *priv = netdev_priv(dev);
333 struct bfin_can_regs __iomem *reg = priv->membase;
334 struct net_device_stats *stats = &dev->stats;
335 struct can_frame *cf;
336 struct sk_buff *skb;
337 enum can_state state = priv->can.state;
339 skb = alloc_can_err_skb(dev, &cf);
340 if (skb == NULL)
341 return -ENOMEM;
343 if (isrc & RMLIS) {
344 /* data overrun interrupt */
345 netdev_dbg(dev, "data overrun interrupt\n");
346 cf->can_id |= CAN_ERR_CRTL;
347 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
348 stats->rx_over_errors++;
349 stats->rx_errors++;
352 if (isrc & BOIS) {
353 netdev_dbg(dev, "bus-off mode interrupt\n");
354 state = CAN_STATE_BUS_OFF;
355 cf->can_id |= CAN_ERR_BUSOFF;
356 can_bus_off(dev);
359 if (isrc & EPIS) {
360 /* error passive interrupt */
361 netdev_dbg(dev, "error passive interrupt\n");
362 state = CAN_STATE_ERROR_PASSIVE;
365 if ((isrc & EWTIS) || (isrc & EWRIS)) {
366 netdev_dbg(dev, "Error Warning Transmit/Receive Interrupt\n");
367 state = CAN_STATE_ERROR_WARNING;
370 if (state != priv->can.state && (state == CAN_STATE_ERROR_WARNING ||
371 state == CAN_STATE_ERROR_PASSIVE)) {
372 u16 cec = bfin_read(&reg->cec);
373 u8 rxerr = cec;
374 u8 txerr = cec >> 8;
376 cf->can_id |= CAN_ERR_CRTL;
377 if (state == CAN_STATE_ERROR_WARNING) {
378 priv->can.can_stats.error_warning++;
379 cf->data[1] = (txerr > rxerr) ?
380 CAN_ERR_CRTL_TX_WARNING :
381 CAN_ERR_CRTL_RX_WARNING;
382 } else {
383 priv->can.can_stats.error_passive++;
384 cf->data[1] = (txerr > rxerr) ?
385 CAN_ERR_CRTL_TX_PASSIVE :
386 CAN_ERR_CRTL_RX_PASSIVE;
390 if (status) {
391 priv->can.can_stats.bus_error++;
393 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
395 if (status & BEF)
396 cf->data[2] |= CAN_ERR_PROT_BIT;
397 else if (status & FER)
398 cf->data[2] |= CAN_ERR_PROT_FORM;
399 else if (status & SER)
400 cf->data[2] |= CAN_ERR_PROT_STUFF;
401 else
402 cf->data[2] |= CAN_ERR_PROT_UNSPEC;
405 priv->can.state = state;
407 netif_rx(skb);
409 stats->rx_packets++;
410 stats->rx_bytes += cf->can_dlc;
412 return 0;
415 static irqreturn_t bfin_can_interrupt(int irq, void *dev_id)
417 struct net_device *dev = dev_id;
418 struct bfin_can_priv *priv = netdev_priv(dev);
419 struct bfin_can_regs __iomem *reg = priv->membase;
420 struct net_device_stats *stats = &dev->stats;
421 u16 status, isrc;
423 if ((irq == priv->tx_irq) && bfin_read(&reg->mbtif2)) {
424 /* transmission complete interrupt */
425 bfin_write(&reg->mbtif2, 0xFFFF);
426 stats->tx_packets++;
427 stats->tx_bytes += bfin_read(&reg->chl[TRANSMIT_CHL].dlc);
428 can_get_echo_skb(dev, 0);
429 netif_wake_queue(dev);
430 } else if ((irq == priv->rx_irq) && bfin_read(&reg->mbrif1)) {
431 /* receive interrupt */
432 isrc = bfin_read(&reg->mbrif1);
433 bfin_write(&reg->mbrif1, 0xFFFF);
434 bfin_can_rx(dev, isrc);
435 } else if ((irq == priv->err_irq) && bfin_read(&reg->gis)) {
436 /* error interrupt */
437 isrc = bfin_read(&reg->gis);
438 status = bfin_read(&reg->esr);
439 bfin_write(&reg->gis, 0x7FF);
440 bfin_can_err(dev, isrc, status);
441 } else {
442 return IRQ_NONE;
445 return IRQ_HANDLED;
448 static int bfin_can_open(struct net_device *dev)
450 struct bfin_can_priv *priv = netdev_priv(dev);
451 int err;
453 /* set chip into reset mode */
454 bfin_can_set_reset_mode(dev);
456 /* common open */
457 err = open_candev(dev);
458 if (err)
459 goto exit_open;
461 /* register interrupt handler */
462 err = request_irq(priv->rx_irq, &bfin_can_interrupt, 0,
463 "bfin-can-rx", dev);
464 if (err)
465 goto exit_rx_irq;
466 err = request_irq(priv->tx_irq, &bfin_can_interrupt, 0,
467 "bfin-can-tx", dev);
468 if (err)
469 goto exit_tx_irq;
470 err = request_irq(priv->err_irq, &bfin_can_interrupt, 0,
471 "bfin-can-err", dev);
472 if (err)
473 goto exit_err_irq;
475 bfin_can_start(dev);
477 netif_start_queue(dev);
479 return 0;
481 exit_err_irq:
482 free_irq(priv->tx_irq, dev);
483 exit_tx_irq:
484 free_irq(priv->rx_irq, dev);
485 exit_rx_irq:
486 close_candev(dev);
487 exit_open:
488 return err;
491 static int bfin_can_close(struct net_device *dev)
493 struct bfin_can_priv *priv = netdev_priv(dev);
495 netif_stop_queue(dev);
496 bfin_can_set_reset_mode(dev);
498 close_candev(dev);
500 free_irq(priv->rx_irq, dev);
501 free_irq(priv->tx_irq, dev);
502 free_irq(priv->err_irq, dev);
504 return 0;
507 static struct net_device *alloc_bfin_candev(void)
509 struct net_device *dev;
510 struct bfin_can_priv *priv;
512 dev = alloc_candev(sizeof(*priv), TX_ECHO_SKB_MAX);
513 if (!dev)
514 return NULL;
516 priv = netdev_priv(dev);
518 priv->dev = dev;
519 priv->can.bittiming_const = &bfin_can_bittiming_const;
520 priv->can.do_set_bittiming = bfin_can_set_bittiming;
521 priv->can.do_set_mode = bfin_can_set_mode;
522 priv->can.do_get_berr_counter = bfin_can_get_berr_counter;
523 priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES;
525 return dev;
528 static const struct net_device_ops bfin_can_netdev_ops = {
529 .ndo_open = bfin_can_open,
530 .ndo_stop = bfin_can_close,
531 .ndo_start_xmit = bfin_can_start_xmit,
534 static int bfin_can_probe(struct platform_device *pdev)
536 int err;
537 struct net_device *dev;
538 struct bfin_can_priv *priv;
539 struct resource *res_mem, *rx_irq, *tx_irq, *err_irq;
540 unsigned short *pdata;
542 pdata = pdev->dev.platform_data;
543 if (!pdata) {
544 dev_err(&pdev->dev, "No platform data provided!\n");
545 err = -EINVAL;
546 goto exit;
549 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
550 rx_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
551 tx_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
552 err_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 2);
553 if (!res_mem || !rx_irq || !tx_irq || !err_irq) {
554 err = -EINVAL;
555 goto exit;
558 if (!request_mem_region(res_mem->start, resource_size(res_mem),
559 dev_name(&pdev->dev))) {
560 err = -EBUSY;
561 goto exit;
564 /* request peripheral pins */
565 err = peripheral_request_list(pdata, dev_name(&pdev->dev));
566 if (err)
567 goto exit_mem_release;
569 dev = alloc_bfin_candev();
570 if (!dev) {
571 err = -ENOMEM;
572 goto exit_peri_pin_free;
575 priv = netdev_priv(dev);
576 priv->membase = (void __iomem *)res_mem->start;
577 priv->rx_irq = rx_irq->start;
578 priv->tx_irq = tx_irq->start;
579 priv->err_irq = err_irq->start;
580 priv->pin_list = pdata;
581 priv->can.clock.freq = get_sclk();
583 platform_set_drvdata(pdev, dev);
584 SET_NETDEV_DEV(dev, &pdev->dev);
586 dev->flags |= IFF_ECHO; /* we support local echo */
587 dev->netdev_ops = &bfin_can_netdev_ops;
589 bfin_can_set_reset_mode(dev);
591 err = register_candev(dev);
592 if (err) {
593 dev_err(&pdev->dev, "registering failed (err=%d)\n", err);
594 goto exit_candev_free;
597 dev_info(&pdev->dev,
598 "%s device registered"
599 "(&reg_base=%p, rx_irq=%d, tx_irq=%d, err_irq=%d, sclk=%d)\n",
600 DRV_NAME, priv->membase, priv->rx_irq,
601 priv->tx_irq, priv->err_irq, priv->can.clock.freq);
602 return 0;
604 exit_candev_free:
605 free_candev(dev);
606 exit_peri_pin_free:
607 peripheral_free_list(pdata);
608 exit_mem_release:
609 release_mem_region(res_mem->start, resource_size(res_mem));
610 exit:
611 return err;
614 static int bfin_can_remove(struct platform_device *pdev)
616 struct net_device *dev = platform_get_drvdata(pdev);
617 struct bfin_can_priv *priv = netdev_priv(dev);
618 struct resource *res;
620 bfin_can_set_reset_mode(dev);
622 unregister_candev(dev);
624 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
625 release_mem_region(res->start, resource_size(res));
627 peripheral_free_list(priv->pin_list);
629 free_candev(dev);
630 return 0;
633 #ifdef CONFIG_PM
634 static int bfin_can_suspend(struct platform_device *pdev, pm_message_t mesg)
636 struct net_device *dev = platform_get_drvdata(pdev);
637 struct bfin_can_priv *priv = netdev_priv(dev);
638 struct bfin_can_regs __iomem *reg = priv->membase;
639 int timeout = BFIN_CAN_TIMEOUT;
641 if (netif_running(dev)) {
642 /* enter sleep mode */
643 bfin_write(&reg->control, bfin_read(&reg->control) | SMR);
644 SSYNC();
645 while (!(bfin_read(&reg->intr) & SMACK)) {
646 udelay(10);
647 if (--timeout == 0) {
648 netdev_err(dev, "fail to enter sleep mode\n");
649 BUG();
654 return 0;
657 static int bfin_can_resume(struct platform_device *pdev)
659 struct net_device *dev = platform_get_drvdata(pdev);
660 struct bfin_can_priv *priv = netdev_priv(dev);
661 struct bfin_can_regs __iomem *reg = priv->membase;
663 if (netif_running(dev)) {
664 /* leave sleep mode */
665 bfin_write(&reg->intr, 0);
666 SSYNC();
669 return 0;
671 #else
672 #define bfin_can_suspend NULL
673 #define bfin_can_resume NULL
674 #endif /* CONFIG_PM */
676 static struct platform_driver bfin_can_driver = {
677 .probe = bfin_can_probe,
678 .remove = bfin_can_remove,
679 .suspend = bfin_can_suspend,
680 .resume = bfin_can_resume,
681 .driver = {
682 .name = DRV_NAME,
683 .owner = THIS_MODULE,
687 module_platform_driver(bfin_can_driver);
689 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
690 MODULE_LICENSE("GPL");
691 MODULE_DESCRIPTION("Blackfin on-chip CAN netdevice driver");
692 MODULE_ALIAS("platform:" DRV_NAME);