ARM: mm: Recreate kernel mappings in early_paging_init()
[linux/fpc-iii.git] / drivers / net / wireless / ath / ath9k / calib.c
blob5e8219a91e252b3d4a9ac2f5fda599caf4ae9ae8
1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include "hw.h"
18 #include "hw-ops.h"
19 #include <linux/export.h>
21 /* Common calibration code */
24 static int16_t ath9k_hw_get_nf_hist_mid(int16_t *nfCalBuffer)
26 int16_t nfval;
27 int16_t sort[ATH9K_NF_CAL_HIST_MAX];
28 int i, j;
30 for (i = 0; i < ATH9K_NF_CAL_HIST_MAX; i++)
31 sort[i] = nfCalBuffer[i];
33 for (i = 0; i < ATH9K_NF_CAL_HIST_MAX - 1; i++) {
34 for (j = 1; j < ATH9K_NF_CAL_HIST_MAX - i; j++) {
35 if (sort[j] > sort[j - 1]) {
36 nfval = sort[j];
37 sort[j] = sort[j - 1];
38 sort[j - 1] = nfval;
42 nfval = sort[(ATH9K_NF_CAL_HIST_MAX - 1) >> 1];
44 return nfval;
47 static struct ath_nf_limits *ath9k_hw_get_nf_limits(struct ath_hw *ah,
48 struct ath9k_channel *chan)
50 struct ath_nf_limits *limit;
52 if (!chan || IS_CHAN_2GHZ(chan))
53 limit = &ah->nf_2g;
54 else
55 limit = &ah->nf_5g;
57 return limit;
60 static s16 ath9k_hw_get_default_nf(struct ath_hw *ah,
61 struct ath9k_channel *chan)
63 return ath9k_hw_get_nf_limits(ah, chan)->nominal;
66 s16 ath9k_hw_getchan_noise(struct ath_hw *ah, struct ath9k_channel *chan)
68 s8 noise = ATH_DEFAULT_NOISE_FLOOR;
70 if (chan && chan->noisefloor) {
71 s8 delta = chan->noisefloor -
72 ATH9K_NF_CAL_NOISE_THRESH -
73 ath9k_hw_get_default_nf(ah, chan);
74 if (delta > 0)
75 noise += delta;
77 return noise;
79 EXPORT_SYMBOL(ath9k_hw_getchan_noise);
81 static void ath9k_hw_update_nfcal_hist_buffer(struct ath_hw *ah,
82 struct ath9k_hw_cal_data *cal,
83 int16_t *nfarray)
85 struct ath_common *common = ath9k_hw_common(ah);
86 struct ath_nf_limits *limit;
87 struct ath9k_nfcal_hist *h;
88 bool high_nf_mid = false;
89 u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
90 int i;
92 h = cal->nfCalHist;
93 limit = ath9k_hw_get_nf_limits(ah, ah->curchan);
95 for (i = 0; i < NUM_NF_READINGS; i++) {
96 if (!(chainmask & (1 << i)) ||
97 ((i >= AR5416_MAX_CHAINS) && !IS_CHAN_HT40(ah->curchan)))
98 continue;
100 h[i].nfCalBuffer[h[i].currIndex] = nfarray[i];
102 if (++h[i].currIndex >= ATH9K_NF_CAL_HIST_MAX)
103 h[i].currIndex = 0;
105 if (h[i].invalidNFcount > 0) {
106 h[i].invalidNFcount--;
107 h[i].privNF = nfarray[i];
108 } else {
109 h[i].privNF =
110 ath9k_hw_get_nf_hist_mid(h[i].nfCalBuffer);
113 if (!h[i].privNF)
114 continue;
116 if (h[i].privNF > limit->max) {
117 high_nf_mid = true;
119 ath_dbg(common, CALIBRATE,
120 "NFmid[%d] (%d) > MAX (%d), %s\n",
121 i, h[i].privNF, limit->max,
122 (cal->nfcal_interference ?
123 "not corrected (due to interference)" :
124 "correcting to MAX"));
127 * Normally we limit the average noise floor by the
128 * hardware specific maximum here. However if we have
129 * encountered stuck beacons because of interference,
130 * we bypass this limit here in order to better deal
131 * with our environment.
133 if (!cal->nfcal_interference)
134 h[i].privNF = limit->max;
139 * If the noise floor seems normal for all chains, assume that
140 * there is no significant interference in the environment anymore.
141 * Re-enable the enforcement of the NF maximum again.
143 if (!high_nf_mid)
144 cal->nfcal_interference = false;
147 static bool ath9k_hw_get_nf_thresh(struct ath_hw *ah,
148 enum ieee80211_band band,
149 int16_t *nft)
151 switch (band) {
152 case IEEE80211_BAND_5GHZ:
153 *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_5);
154 break;
155 case IEEE80211_BAND_2GHZ:
156 *nft = (int8_t)ah->eep_ops->get_eeprom(ah, EEP_NFTHRESH_2);
157 break;
158 default:
159 BUG_ON(1);
160 return false;
163 return true;
166 void ath9k_hw_reset_calibration(struct ath_hw *ah,
167 struct ath9k_cal_list *currCal)
169 int i;
171 ath9k_hw_setup_calibration(ah, currCal);
173 currCal->calState = CAL_RUNNING;
175 for (i = 0; i < AR5416_MAX_CHAINS; i++) {
176 ah->meas0.sign[i] = 0;
177 ah->meas1.sign[i] = 0;
178 ah->meas2.sign[i] = 0;
179 ah->meas3.sign[i] = 0;
182 ah->cal_samples = 0;
185 /* This is done for the currently configured channel */
186 bool ath9k_hw_reset_calvalid(struct ath_hw *ah)
188 struct ath_common *common = ath9k_hw_common(ah);
189 struct ieee80211_conf *conf = &common->hw->conf;
190 struct ath9k_cal_list *currCal = ah->cal_list_curr;
192 if (!ah->caldata)
193 return true;
195 if (!AR_SREV_9100(ah) && !AR_SREV_9160_10_OR_LATER(ah))
196 return true;
198 if (currCal == NULL)
199 return true;
201 if (currCal->calState != CAL_DONE) {
202 ath_dbg(common, CALIBRATE, "Calibration state incorrect, %d\n",
203 currCal->calState);
204 return true;
207 if (!(ah->supp_cals & currCal->calData->calType))
208 return true;
210 ath_dbg(common, CALIBRATE, "Resetting Cal %d state for channel %u\n",
211 currCal->calData->calType, conf->chandef.chan->center_freq);
213 ah->caldata->CalValid &= ~currCal->calData->calType;
214 currCal->calState = CAL_WAITING;
216 return false;
218 EXPORT_SYMBOL(ath9k_hw_reset_calvalid);
220 void ath9k_hw_start_nfcal(struct ath_hw *ah, bool update)
222 if (ah->caldata)
223 ah->caldata->nfcal_pending = true;
225 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
226 AR_PHY_AGC_CONTROL_ENABLE_NF);
228 if (update)
229 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
230 AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
231 else
232 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
233 AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
235 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
238 void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
240 struct ath9k_nfcal_hist *h = NULL;
241 unsigned i, j;
242 int32_t val;
243 u8 chainmask = (ah->rxchainmask << 3) | ah->rxchainmask;
244 struct ath_common *common = ath9k_hw_common(ah);
245 struct ieee80211_conf *conf = &common->hw->conf;
246 s16 default_nf = ath9k_hw_get_default_nf(ah, chan);
248 if (ah->caldata)
249 h = ah->caldata->nfCalHist;
251 for (i = 0; i < NUM_NF_READINGS; i++) {
252 if (chainmask & (1 << i)) {
253 s16 nfval;
255 if ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf))
256 continue;
258 if (h)
259 nfval = h[i].privNF;
260 else
261 nfval = default_nf;
263 val = REG_READ(ah, ah->nf_regs[i]);
264 val &= 0xFFFFFE00;
265 val |= (((u32) nfval << 1) & 0x1ff);
266 REG_WRITE(ah, ah->nf_regs[i], val);
271 * Load software filtered NF value into baseband internal minCCApwr
272 * variable.
274 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
275 AR_PHY_AGC_CONTROL_ENABLE_NF);
276 REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
277 AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
278 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
281 * Wait for load to complete, should be fast, a few 10s of us.
282 * The max delay was changed from an original 250us to 10000us
283 * since 250us often results in NF load timeout and causes deaf
284 * condition during stress testing 12/12/2009
286 for (j = 0; j < 10000; j++) {
287 if ((REG_READ(ah, AR_PHY_AGC_CONTROL) &
288 AR_PHY_AGC_CONTROL_NF) == 0)
289 break;
290 udelay(10);
294 * We timed out waiting for the noisefloor to load, probably due to an
295 * in-progress rx. Simply return here and allow the load plenty of time
296 * to complete before the next calibration interval. We need to avoid
297 * trying to load -50 (which happens below) while the previous load is
298 * still in progress as this can cause rx deafness. Instead by returning
299 * here, the baseband nf cal will just be capped by our present
300 * noisefloor until the next calibration timer.
302 if (j == 10000) {
303 ath_dbg(common, ANY,
304 "Timeout while waiting for nf to load: AR_PHY_AGC_CONTROL=0x%x\n",
305 REG_READ(ah, AR_PHY_AGC_CONTROL));
306 return;
310 * Restore maxCCAPower register parameter again so that we're not capped
311 * by the median we just loaded. This will be initial (and max) value
312 * of next noise floor calibration the baseband does.
314 ENABLE_REGWRITE_BUFFER(ah);
315 for (i = 0; i < NUM_NF_READINGS; i++) {
316 if (chainmask & (1 << i)) {
317 if ((i >= AR5416_MAX_CHAINS) && !conf_is_ht40(conf))
318 continue;
320 val = REG_READ(ah, ah->nf_regs[i]);
321 val &= 0xFFFFFE00;
322 val |= (((u32) (-50) << 1) & 0x1ff);
323 REG_WRITE(ah, ah->nf_regs[i], val);
326 REGWRITE_BUFFER_FLUSH(ah);
330 static void ath9k_hw_nf_sanitize(struct ath_hw *ah, s16 *nf)
332 struct ath_common *common = ath9k_hw_common(ah);
333 struct ath_nf_limits *limit;
334 int i;
336 if (IS_CHAN_2GHZ(ah->curchan))
337 limit = &ah->nf_2g;
338 else
339 limit = &ah->nf_5g;
341 for (i = 0; i < NUM_NF_READINGS; i++) {
342 if (!nf[i])
343 continue;
345 ath_dbg(common, CALIBRATE,
346 "NF calibrated [%s] [chain %d] is %d\n",
347 (i >= 3 ? "ext" : "ctl"), i % 3, nf[i]);
349 if (nf[i] > limit->max) {
350 ath_dbg(common, CALIBRATE,
351 "NF[%d] (%d) > MAX (%d), correcting to MAX\n",
352 i, nf[i], limit->max);
353 nf[i] = limit->max;
354 } else if (nf[i] < limit->min) {
355 ath_dbg(common, CALIBRATE,
356 "NF[%d] (%d) < MIN (%d), correcting to NOM\n",
357 i, nf[i], limit->min);
358 nf[i] = limit->nominal;
363 bool ath9k_hw_getnf(struct ath_hw *ah, struct ath9k_channel *chan)
365 struct ath_common *common = ath9k_hw_common(ah);
366 int16_t nf, nfThresh;
367 int16_t nfarray[NUM_NF_READINGS] = { 0 };
368 struct ath9k_nfcal_hist *h;
369 struct ieee80211_channel *c = chan->chan;
370 struct ath9k_hw_cal_data *caldata = ah->caldata;
372 if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) {
373 ath_dbg(common, CALIBRATE,
374 "NF did not complete in calibration window\n");
375 return false;
378 ath9k_hw_do_getnf(ah, nfarray);
379 ath9k_hw_nf_sanitize(ah, nfarray);
380 nf = nfarray[0];
381 if (ath9k_hw_get_nf_thresh(ah, c->band, &nfThresh)
382 && nf > nfThresh) {
383 ath_dbg(common, CALIBRATE,
384 "noise floor failed detected; detected %d, threshold %d\n",
385 nf, nfThresh);
388 if (!caldata) {
389 chan->noisefloor = nf;
390 return false;
393 h = caldata->nfCalHist;
394 caldata->nfcal_pending = false;
395 ath9k_hw_update_nfcal_hist_buffer(ah, caldata, nfarray);
396 chan->noisefloor = h[0].privNF;
397 ah->noise = ath9k_hw_getchan_noise(ah, chan);
398 return true;
400 EXPORT_SYMBOL(ath9k_hw_getnf);
402 void ath9k_init_nfcal_hist_buffer(struct ath_hw *ah,
403 struct ath9k_channel *chan)
405 struct ath9k_nfcal_hist *h;
406 s16 default_nf;
407 int i, j;
409 ah->caldata->channel = chan->channel;
410 ah->caldata->channelFlags = chan->channelFlags;
411 ah->caldata->chanmode = chan->chanmode;
412 h = ah->caldata->nfCalHist;
413 default_nf = ath9k_hw_get_default_nf(ah, chan);
414 for (i = 0; i < NUM_NF_READINGS; i++) {
415 h[i].currIndex = 0;
416 h[i].privNF = default_nf;
417 h[i].invalidNFcount = AR_PHY_CCA_FILTERWINDOW_LENGTH;
418 for (j = 0; j < ATH9K_NF_CAL_HIST_MAX; j++) {
419 h[i].nfCalBuffer[j] = default_nf;
425 void ath9k_hw_bstuck_nfcal(struct ath_hw *ah)
427 struct ath9k_hw_cal_data *caldata = ah->caldata;
429 if (unlikely(!caldata))
430 return;
433 * If beacons are stuck, the most likely cause is interference.
434 * Triggering a noise floor calibration at this point helps the
435 * hardware adapt to a noisy environment much faster.
436 * To ensure that we recover from stuck beacons quickly, let
437 * the baseband update the internal NF value itself, similar to
438 * what is being done after a full reset.
440 if (!caldata->nfcal_pending)
441 ath9k_hw_start_nfcal(ah, true);
442 else if (!(REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF))
443 ath9k_hw_getnf(ah, ah->curchan);
445 caldata->nfcal_interference = true;
447 EXPORT_SYMBOL(ath9k_hw_bstuck_nfcal);