drivers/net/wireless/ath/ath9k/debug.h

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef DEBUG_H
  18 #define DEBUG_H
  19
  20 #include "hw.h"
  21 #include "rc.h"
  22 #include "dfs_debug.h"
  23
  24 struct ath_txq;
  25 struct ath_buf;
  26 struct fft_sample_tlv;
  27
  28 #ifdef CONFIG_ATH9K_DEBUGFS
  29 #define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++
  30 #define RESET_STAT_INC(sc, type) sc->debug.stats.reset[type]++
  31 #define ANT_STAT_INC(i, c) sc->debug.stats.ant_stats[i].c++
  32 #define ANT_LNA_INC(i, c) sc->debug.stats.ant_stats[i].lna_recv_cnt[c]++;
  33 #else
  34 #define TX_STAT_INC(q, c) do { } while (0)
  35 #define RESET_STAT_INC(sc, type) do { } while (0)
  36 #define ANT_STAT_INC(i, c) do { } while (0)
  37 #define ANT_LNA_INC(i, c) do { } while (0)
  38 #endif
  39
  40 enum ath_reset_type {
  41         RESET_TYPE_BB_HANG,
  42         RESET_TYPE_BB_WATCHDOG,
  43         RESET_TYPE_FATAL_INT,
  44         RESET_TYPE_TX_ERROR,
  45         RESET_TYPE_TX_HANG,
  46         RESET_TYPE_PLL_HANG,
  47         RESET_TYPE_MAC_HANG,
  48         RESET_TYPE_BEACON_STUCK,
  49         RESET_TYPE_MCI,
  50         __RESET_TYPE_MAX
  51 };
  52
  53 #ifdef CONFIG_ATH9K_DEBUGFS
  54
  55 /**
  56  * struct ath_interrupt_stats - Contains statistics about interrupts
  57  * @total: Total no. of interrupts generated so far
  58  * @rxok: RX with no errors
  59  * @rxlp: RX with low priority RX
  60  * @rxhp: RX with high priority, uapsd only
  61  * @rxeol: RX with no more RXDESC available
  62  * @rxorn: RX FIFO overrun
  63  * @txok: TX completed at the requested rate
  64  * @txurn: TX FIFO underrun
  65  * @mib: MIB regs reaching its threshold
  66  * @rxphyerr: RX with phy errors
  67  * @rx_keycache_miss: RX with key cache misses
  68  * @swba: Software Beacon Alert
  69  * @bmiss: Beacon Miss
  70  * @bnr: Beacon Not Ready
  71  * @cst: Carrier Sense TImeout
  72  * @gtt: Global TX Timeout
  73  * @tim: RX beacon TIM occurrence
  74  * @cabend: RX End of CAB traffic
  75  * @dtimsync: DTIM sync lossage
  76  * @dtim: RX Beacon with DTIM
  77  * @bb_watchdog: Baseband watchdog
  78  * @tsfoor: TSF out of range, indicates that the corrected TSF received
  79  * from a beacon differs from the PCU's internal TSF by more than a
  80  * (programmable) threshold
  81  * @local_timeout: Internal bus timeout.
  82  * @mci: MCI interrupt, specific to MCI based BTCOEX chipsets
  83  * @gen_timer: Generic hardware timer interrupt
  84  */
  85 struct ath_interrupt_stats {
  86         u32 total;
  87         u32 rxok;
  88         u32 rxlp;
  89         u32 rxhp;
  90         u32 rxeol;
  91         u32 rxorn;
  92         u32 txok;
  93         u32 txeol;
  94         u32 txurn;
  95         u32 mib;
  96         u32 rxphyerr;
  97         u32 rx_keycache_miss;
  98         u32 swba;
  99         u32 bmiss;
 100         u32 bnr;
 101         u32 cst;
 102         u32 gtt;
 103         u32 tim;
 104         u32 cabend;
 105         u32 dtimsync;
 106         u32 dtim;
 107         u32 bb_watchdog;
 108         u32 tsfoor;
 109         u32 mci;
 110         u32 gen_timer;
 111
 112         /* Sync-cause stats */
 113         u32 sync_cause_all;
 114         u32 sync_rtc_irq;
 115         u32 sync_mac_irq;
 116         u32 eeprom_illegal_access;
 117         u32 apb_timeout;
 118         u32 pci_mode_conflict;
 119         u32 host1_fatal;
 120         u32 host1_perr;
 121         u32 trcv_fifo_perr;
 122         u32 radm_cpl_ep;
 123         u32 radm_cpl_dllp_abort;
 124         u32 radm_cpl_tlp_abort;
 125         u32 radm_cpl_ecrc_err;
 126         u32 radm_cpl_timeout;
 127         u32 local_timeout;
 128         u32 pm_access;
 129         u32 mac_awake;
 130         u32 mac_asleep;
 131         u32 mac_sleep_access;
 132 };
 133
 134
 135 /**
 136  * struct ath_tx_stats - Statistics about TX
 137  * @tx_pkts_all:  No. of total frames transmitted, including ones that
 138         may have had errors.
 139  * @tx_bytes_all:  No. of total bytes transmitted, including ones that
 140         may have had errors.
 141  * @queued: Total MPDUs (non-aggr) queued
 142  * @completed: Total MPDUs (non-aggr) completed
 143  * @a_aggr: Total no. of aggregates queued
 144  * @a_queued_hw: Total AMPDUs queued to hardware
 145  * @a_queued_sw: Total AMPDUs queued to software queues
 146  * @a_completed: Total AMPDUs completed
 147  * @a_retries: No. of AMPDUs retried (SW)
 148  * @a_xretries: No. of AMPDUs dropped due to xretries
 149  * @txerr_filtered: No. of frames with TXERR_FILT flag set.
 150  * @fifo_underrun: FIFO underrun occurrences
 151         Valid only for:
 152                 - non-aggregate condition.
 153                 - first packet of aggregate.
 154  * @xtxop: No. of frames filtered because of TXOP limit
 155  * @timer_exp: Transmit timer expiry
 156  * @desc_cfg_err: Descriptor configuration errors
 157  * @data_urn: TX data underrun errors
 158  * @delim_urn: TX delimiter underrun errors
 159  * @puttxbuf: Number of times hardware was given txbuf to write.
 160  * @txstart:  Number of times hardware was told to start tx.
 161  * @txprocdesc:  Number of times tx descriptor was processed
 162  * @txfailed:  Out-of-memory or other errors in xmit path.
 163  */
 164 struct ath_tx_stats {
 165         u32 tx_pkts_all;
 166         u32 tx_bytes_all;
 167         u32 queued;
 168         u32 completed;
 169         u32 xretries;
 170         u32 a_aggr;
 171         u32 a_queued_hw;
 172         u32 a_queued_sw;
 173         u32 a_completed;
 174         u32 a_retries;
 175         u32 a_xretries;
 176         u32 txerr_filtered;
 177         u32 fifo_underrun;
 178         u32 xtxop;
 179         u32 timer_exp;
 180         u32 desc_cfg_err;
 181         u32 data_underrun;
 182         u32 delim_underrun;
 183         u32 puttxbuf;
 184         u32 txstart;
 185         u32 txprocdesc;
 186         u32 txfailed;
 187 };
 188
 189 /*
 190  * Various utility macros to print TX/Queue counters.
 191  */
 192 #define PR_QNUM(_n) sc->tx.txq_map[_n]->axq_qnum
 193 #define TXSTATS sc->debug.stats.txstats
 194 #define PR(str, elem)                                                   \
 195         do {                                                            \
 196                 len += snprintf(buf + len, size - len,                  \
 197                                 "%s%13u%11u%10u%10u\n", str,            \
 198                                 TXSTATS[PR_QNUM(IEEE80211_AC_BE)].elem, \
 199                                 TXSTATS[PR_QNUM(IEEE80211_AC_BK)].elem, \
 200                                 TXSTATS[PR_QNUM(IEEE80211_AC_VI)].elem, \
 201                                 TXSTATS[PR_QNUM(IEEE80211_AC_VO)].elem); \
 202         } while(0)
 203
 204 #define RX_STAT_INC(c) (sc->debug.stats.rxstats.c++)
 205
 206 /**
 207  * struct ath_rx_stats - RX Statistics
 208  * @rx_pkts_all:  No. of total frames received, including ones that
 209         may have had errors.
 210  * @rx_bytes_all:  No. of total bytes received, including ones that
 211         may have had errors.
 212  * @crc_err: No. of frames with incorrect CRC value
 213  * @decrypt_crc_err: No. of frames whose CRC check failed after
 214         decryption process completed
 215  * @phy_err: No. of frames whose reception failed because the PHY
 216         encountered an error
 217  * @mic_err: No. of frames with incorrect TKIP MIC verification failure
 218  * @pre_delim_crc_err: Pre-Frame delimiter CRC error detections
 219  * @post_delim_crc_err: Post-Frame delimiter CRC error detections
 220  * @decrypt_busy_err: Decryption interruptions counter
 221  * @phy_err_stats: Individual PHY error statistics
 222  * @rx_len_err:  No. of frames discarded due to bad length.
 223  * @rx_oom_err:  No. of frames dropped due to OOM issues.
 224  * @rx_rate_err:  No. of frames dropped due to rate errors.
 225  * @rx_too_many_frags_err:  Frames dropped due to too-many-frags received.
 226  * @rx_beacons:  No. of beacons received.
 227  * @rx_frags:  No. of rx-fragements received.
 228  * @rx_spectral: No of spectral packets received.
 229  */
 230 struct ath_rx_stats {
 231         u32 rx_pkts_all;
 232         u32 rx_bytes_all;
 233         u32 crc_err;
 234         u32 decrypt_crc_err;
 235         u32 phy_err;
 236         u32 mic_err;
 237         u32 pre_delim_crc_err;
 238         u32 post_delim_crc_err;
 239         u32 decrypt_busy_err;
 240         u32 phy_err_stats[ATH9K_PHYERR_MAX];
 241         u32 rx_len_err;
 242         u32 rx_oom_err;
 243         u32 rx_rate_err;
 244         u32 rx_too_many_frags_err;
 245         u32 rx_beacons;
 246         u32 rx_frags;
 247         u32 rx_spectral;
 248 };
 249
 250 #define ANT_MAIN 0
 251 #define ANT_ALT  1
 252
 253 struct ath_antenna_stats {
 254         u32 recv_cnt;
 255         u32 rssi_avg;
 256         u32 lna_recv_cnt[4];
 257         u32 lna_attempt_cnt[4];
 258 };
 259
 260 struct ath_stats {
 261         struct ath_interrupt_stats istats;
 262         struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES];
 263         struct ath_rx_stats rxstats;
 264         struct ath_dfs_stats dfs_stats;
 265         struct ath_antenna_stats ant_stats[2];
 266         u32 reset[__RESET_TYPE_MAX];
 267 };
 268
 269 struct ath9k_debug {
 270         struct dentry *debugfs_phy;
 271         u32 regidx;
 272         struct ath_stats stats;
 273 };
 274
 275 int ath9k_init_debug(struct ath_hw *ah);
 276 void ath9k_deinit_debug(struct ath_softc *sc);
 277
 278 void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status);
 279 void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
 280                        struct ath_tx_status *ts, struct ath_txq *txq,
 281                        unsigned int flags);
 282 void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs);
 283 int ath9k_get_et_sset_count(struct ieee80211_hw *hw,
 284                             struct ieee80211_vif *vif, int sset);
 285 void ath9k_get_et_stats(struct ieee80211_hw *hw,
 286                         struct ieee80211_vif *vif,
 287                         struct ethtool_stats *stats, u64 *data);
 288 void ath9k_get_et_strings(struct ieee80211_hw *hw,
 289                           struct ieee80211_vif *vif,
 290                           u32 sset, u8 *data);
 291 void ath9k_sta_add_debugfs(struct ieee80211_hw *hw,
 292                            struct ieee80211_vif *vif,
 293                            struct ieee80211_sta *sta,
 294                            struct dentry *dir);
 295 void ath_debug_send_fft_sample(struct ath_softc *sc,
 296                                struct fft_sample_tlv *fft_sample);
 297 void ath9k_debug_stat_ant(struct ath_softc *sc,
 298                           struct ath_hw_antcomb_conf *div_ant_conf,
 299                           int main_rssi_avg, int alt_rssi_avg);
 300 #else
 301
 302 #define RX_STAT_INC(c) /* NOP */
 303
 304 static inline int ath9k_init_debug(struct ath_hw *ah)
 305 {
 306         return 0;
 307 }
 308
 309 static inline void ath9k_deinit_debug(struct ath_softc *sc)
 310 {
 311 }
 312 static inline void ath_debug_stat_interrupt(struct ath_softc *sc,
 313                                             enum ath9k_int status)
 314 {
 315 }
 316 static inline void ath_debug_stat_tx(struct ath_softc *sc,
 317                                      struct ath_buf *bf,
 318                                      struct ath_tx_status *ts,
 319                                      struct ath_txq *txq,
 320                                      unsigned int flags)
 321 {
 322 }
 323 static inline void ath_debug_stat_rx(struct ath_softc *sc,
 324                                      struct ath_rx_status *rs)
 325 {
 326 }
 327 static inline void ath9k_debug_stat_ant(struct ath_softc *sc,
 328                                         struct ath_hw_antcomb_conf *div_ant_conf,
 329                                         int main_rssi_avg, int alt_rssi_avg)
 330 {
 331
 332 }
 333
 334 #endif /* CONFIG_ATH9K_DEBUGFS */
 335
 336 #endif /* DEBUG_H */