ARM: mm: Recreate kernel mappings in early_paging_init()
[linux/fpc-iii.git] / drivers / net / wireless / ath / ath9k / dfs.c
blob7187d3671512eae62e3e1da59bb1aea9866a7be8
1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 * Copyright (c) 2011 Neratec Solutions AG
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 #include "hw.h"
19 #include "hw-ops.h"
20 #include "ath9k.h"
21 #include "dfs.h"
22 #include "dfs_debug.h"
24 /* internal struct to pass radar data */
25 struct ath_radar_data {
26 u8 pulse_bw_info;
27 u8 rssi;
28 u8 ext_rssi;
29 u8 pulse_length_ext;
30 u8 pulse_length_pri;
33 /* convert pulse duration to usecs, considering clock mode */
34 static u32 dur_to_usecs(struct ath_hw *ah, u32 dur)
36 const u32 AR93X_NSECS_PER_DUR = 800;
37 const u32 AR93X_NSECS_PER_DUR_FAST = (8000 / 11);
38 u32 nsecs;
40 if (IS_CHAN_A_FAST_CLOCK(ah, ah->curchan))
41 nsecs = dur * AR93X_NSECS_PER_DUR_FAST;
42 else
43 nsecs = dur * AR93X_NSECS_PER_DUR;
45 return (nsecs + 500) / 1000;
48 #define PRI_CH_RADAR_FOUND 0x01
49 #define EXT_CH_RADAR_FOUND 0x02
50 static bool
51 ath9k_postprocess_radar_event(struct ath_softc *sc,
52 struct ath_radar_data *ard,
53 struct pulse_event *pe)
55 u8 rssi;
56 u16 dur;
59 * Only the last 2 bits of the BW info are relevant, they indicate
60 * which channel the radar was detected in.
62 ard->pulse_bw_info &= 0x03;
64 switch (ard->pulse_bw_info) {
65 case PRI_CH_RADAR_FOUND:
66 /* radar in ctrl channel */
67 dur = ard->pulse_length_pri;
68 DFS_STAT_INC(sc, pri_phy_errors);
70 * cannot use ctrl channel RSSI
71 * if extension channel is stronger
73 rssi = (ard->ext_rssi >= (ard->rssi + 3)) ? 0 : ard->rssi;
74 break;
75 case EXT_CH_RADAR_FOUND:
76 /* radar in extension channel */
77 dur = ard->pulse_length_ext;
78 DFS_STAT_INC(sc, ext_phy_errors);
80 * cannot use extension channel RSSI
81 * if control channel is stronger
83 rssi = (ard->rssi >= (ard->ext_rssi + 12)) ? 0 : ard->ext_rssi;
84 break;
85 case (PRI_CH_RADAR_FOUND | EXT_CH_RADAR_FOUND):
87 * Conducted testing, when pulse is on DC, both pri and ext
88 * durations are reported to be same
90 * Radiated testing, when pulse is on DC, different pri and
91 * ext durations are reported, so take the larger of the two
93 if (ard->pulse_length_ext >= ard->pulse_length_pri)
94 dur = ard->pulse_length_ext;
95 else
96 dur = ard->pulse_length_pri;
97 DFS_STAT_INC(sc, dc_phy_errors);
99 /* when both are present use stronger one */
100 rssi = (ard->rssi < ard->ext_rssi) ? ard->ext_rssi : ard->rssi;
101 break;
102 default:
104 * Bogus bandwidth info was received in descriptor,
105 * so ignore this PHY error
107 DFS_STAT_INC(sc, bwinfo_discards);
108 return false;
111 if (rssi == 0) {
112 DFS_STAT_INC(sc, rssi_discards);
113 return false;
117 * TODO: check chirping pulses
118 * checks for chirping are dependent on the DFS regulatory domain
119 * used, which is yet TBD
122 /* convert duration to usecs */
123 pe->width = dur_to_usecs(sc->sc_ah, dur);
124 pe->rssi = rssi;
126 DFS_STAT_INC(sc, pulses_detected);
127 return true;
129 #undef PRI_CH_RADAR_FOUND
130 #undef EXT_CH_RADAR_FOUND
133 * DFS: check PHY-error for radar pulse and feed the detector
135 void ath9k_dfs_process_phyerr(struct ath_softc *sc, void *data,
136 struct ath_rx_status *rs, u64 mactime)
138 struct ath_radar_data ard;
139 u16 datalen;
140 char *vdata_end;
141 struct pulse_event pe;
142 struct ath_hw *ah = sc->sc_ah;
143 struct ath_common *common = ath9k_hw_common(ah);
145 DFS_STAT_INC(sc, pulses_total);
146 if ((rs->rs_phyerr != ATH9K_PHYERR_RADAR) &&
147 (rs->rs_phyerr != ATH9K_PHYERR_FALSE_RADAR_EXT)) {
148 ath_dbg(common, DFS,
149 "Error: rs_phyer=0x%x not a radar error\n",
150 rs->rs_phyerr);
151 DFS_STAT_INC(sc, pulses_no_dfs);
152 return;
155 datalen = rs->rs_datalen;
156 if (datalen == 0) {
157 DFS_STAT_INC(sc, datalen_discards);
158 return;
161 ard.rssi = rs->rs_rssi_ctl0;
162 ard.ext_rssi = rs->rs_rssi_ext0;
165 * hardware stores this as 8 bit signed value.
166 * we will cap it at 0 if it is a negative number
168 if (ard.rssi & 0x80)
169 ard.rssi = 0;
170 if (ard.ext_rssi & 0x80)
171 ard.ext_rssi = 0;
173 vdata_end = (char *)data + datalen;
174 ard.pulse_bw_info = vdata_end[-1];
175 ard.pulse_length_ext = vdata_end[-2];
176 ard.pulse_length_pri = vdata_end[-3];
177 pe.freq = ah->curchan->channel;
178 pe.ts = mactime;
179 if (ath9k_postprocess_radar_event(sc, &ard, &pe)) {
180 struct dfs_pattern_detector *pd = sc->dfs_detector;
181 static u64 last_ts;
182 ath_dbg(common, DFS,
183 "ath9k_dfs_process_phyerr: channel=%d, ts=%llu, "
184 "width=%d, rssi=%d, delta_ts=%llu\n",
185 pe.freq, pe.ts, pe.width, pe.rssi, pe.ts-last_ts);
186 last_ts = pe.ts;
187 DFS_STAT_INC(sc, pulses_processed);
188 if (pd != NULL && pd->add_pulse(pd, &pe)) {
189 DFS_STAT_INC(sc, radar_detected);
190 ieee80211_radar_detected(sc->hw);