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ARM: mm: Recreate kernel mappings in early_paging_init()
[linux/fpc-iii.git] / drivers / net / wireless / ath / ath9k / main.c
blobe4f65900132dedf40a68e2299b2a6177e8dfaf89
1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
19 #include "ath9k.h"
20 #include "btcoex.h"
21
22 static void ath9k_set_assoc_state(struct ath_softc *sc,
23 struct ieee80211_vif *vif);
24
25 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
26 {
27 /*
28 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
29 * 0 for no restriction
30 * 1 for 1/4 us
31 * 2 for 1/2 us
32 * 3 for 1 us
33 * 4 for 2 us
34 * 5 for 4 us
35 * 6 for 8 us
36 * 7 for 16 us
37 */
38 switch (mpdudensity) {
39 case 0:
40 return 0;
41 case 1:
42 case 2:
43 case 3:
44 /* Our lower layer calculations limit our precision to
45 1 microsecond */
46 return 1;
47 case 4:
48 return 2;
49 case 5:
50 return 4;
51 case 6:
52 return 8;
53 case 7:
54 return 16;
55 default:
56 return 0;
57 }
58 }
59
60 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
61 {
62 bool pending = false;
63
64 spin_lock_bh(&txq->axq_lock);
65
66 if (txq->axq_depth || !list_empty(&txq->axq_acq))
67 pending = true;
68
69 spin_unlock_bh(&txq->axq_lock);
70 return pending;
71 }
72
73 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
74 {
75 unsigned long flags;
76 bool ret;
77
78 spin_lock_irqsave(&sc->sc_pm_lock, flags);
79 ret = ath9k_hw_setpower(sc->sc_ah, mode);
80 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
81
82 return ret;
83 }
84
85 void ath9k_ps_wakeup(struct ath_softc *sc)
86 {
87 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
88 unsigned long flags;
89 enum ath9k_power_mode power_mode;
90
91 spin_lock_irqsave(&sc->sc_pm_lock, flags);
92 if (++sc->ps_usecount != 1)
93 goto unlock;
94
95 power_mode = sc->sc_ah->power_mode;
96 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
97
98 /*
99 * While the hardware is asleep, the cycle counters contain no
100 * useful data. Better clear them now so that they don't mess up
101 * survey data results.
102 */
103 if (power_mode != ATH9K_PM_AWAKE) {
104 spin_lock(&common->cc_lock);
105 ath_hw_cycle_counters_update(common);
106 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
107 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
108 spin_unlock(&common->cc_lock);
109 }
110
111 unlock:
112 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
113 }
114
115 void ath9k_ps_restore(struct ath_softc *sc)
116 {
117 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
118 enum ath9k_power_mode mode;
119 unsigned long flags;
120 bool reset;
121
122 spin_lock_irqsave(&sc->sc_pm_lock, flags);
123 if (--sc->ps_usecount != 0)
124 goto unlock;
125
126 if (sc->ps_idle) {
127 ath9k_hw_setrxabort(sc->sc_ah, 1);
128 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
129 mode = ATH9K_PM_FULL_SLEEP;
130 } else if (sc->ps_enabled &&
131 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
132 PS_WAIT_FOR_CAB |
133 PS_WAIT_FOR_PSPOLL_DATA |
134 PS_WAIT_FOR_TX_ACK |
135 PS_WAIT_FOR_ANI))) {
136 mode = ATH9K_PM_NETWORK_SLEEP;
137 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
138 ath9k_btcoex_stop_gen_timer(sc);
139 } else {
140 goto unlock;
141 }
142
143 spin_lock(&common->cc_lock);
144 ath_hw_cycle_counters_update(common);
145 spin_unlock(&common->cc_lock);
146
147 ath9k_hw_setpower(sc->sc_ah, mode);
148
149 unlock:
150 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
151 }
152
153 static void __ath_cancel_work(struct ath_softc *sc)
154 {
155 cancel_work_sync(&sc->paprd_work);
156 cancel_work_sync(&sc->hw_check_work);
157 cancel_delayed_work_sync(&sc->tx_complete_work);
158 cancel_delayed_work_sync(&sc->hw_pll_work);
159
160 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
161 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
162 cancel_work_sync(&sc->mci_work);
163 #endif
164 }
165
166 static void ath_cancel_work(struct ath_softc *sc)
167 {
168 __ath_cancel_work(sc);
169 cancel_work_sync(&sc->hw_reset_work);
170 }
171
172 static void ath_restart_work(struct ath_softc *sc)
173 {
174 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
175
176 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
177 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
178 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
179
180 ath_start_rx_poll(sc, 3);
181 ath_start_ani(sc);
182 }
183
184 static bool ath_prepare_reset(struct ath_softc *sc)
185 {
186 struct ath_hw *ah = sc->sc_ah;
187 bool ret = true;
188
189 ieee80211_stop_queues(sc->hw);
190
191 sc->hw_busy_count = 0;
192 ath_stop_ani(sc);
193 del_timer_sync(&sc->rx_poll_timer);
194
195 ath9k_hw_disable_interrupts(ah);
196
197 if (!ath_drain_all_txq(sc))
198 ret = false;
199
200 if (!ath_stoprecv(sc))
201 ret = false;
202
203 return ret;
204 }
205
206 static bool ath_complete_reset(struct ath_softc *sc, bool start)
207 {
208 struct ath_hw *ah = sc->sc_ah;
209 struct ath_common *common = ath9k_hw_common(ah);
210 unsigned long flags;
211
212 if (ath_startrecv(sc) != 0) {
213 ath_err(common, "Unable to restart recv logic\n");
214 return false;
215 }
216
217 ath9k_cmn_update_txpow(ah, sc->curtxpow,
218 sc->config.txpowlimit, &sc->curtxpow);
219
220 clear_bit(SC_OP_HW_RESET, &sc->sc_flags);
221 ath9k_hw_set_interrupts(ah);
222 ath9k_hw_enable_interrupts(ah);
223
224 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && start) {
225 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags))
226 goto work;
227
228 if (ah->opmode == NL80211_IFTYPE_STATION &&
229 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
230 spin_lock_irqsave(&sc->sc_pm_lock, flags);
231 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
232 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
233 } else {
234 ath9k_set_beacon(sc);
235 }
236 work:
237 ath_restart_work(sc);
238 }
239
240 ieee80211_wake_queues(sc->hw);
241
242 return true;
243 }
244
245 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
246 {
247 struct ath_hw *ah = sc->sc_ah;
248 struct ath_common *common = ath9k_hw_common(ah);
249 struct ath9k_hw_cal_data *caldata = NULL;
250 bool fastcc = true;
251 int r;
252
253 __ath_cancel_work(sc);
254
255 tasklet_disable(&sc->intr_tq);
256 spin_lock_bh(&sc->sc_pcu_lock);
257
258 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) {
259 fastcc = false;
260 caldata = &sc->caldata;
261 }
262
263 if (!hchan) {
264 fastcc = false;
265 hchan = ah->curchan;
266 }
267
268 if (!ath_prepare_reset(sc))
269 fastcc = false;
270
271 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
272 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
273
274 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
275 if (r) {
276 ath_err(common,
277 "Unable to reset channel, reset status %d\n", r);
278
279 ath9k_hw_enable_interrupts(ah);
280 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
281
282 goto out;
283 }
284
285 if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
286 (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
287 ath9k_mci_set_txpower(sc, true, false);
288
289 if (!ath_complete_reset(sc, true))
290 r = -EIO;
291
292 out:
293 spin_unlock_bh(&sc->sc_pcu_lock);
294 tasklet_enable(&sc->intr_tq);
295
296 return r;
297 }
298
299
300 /*
301 * Set/change channels. If the channel is really being changed, it's done
302 * by reseting the chip. To accomplish this we must first cleanup any pending
303 * DMA, then restart stuff.
304 */
305 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
306 struct ath9k_channel *hchan)
307 {
308 int r;
309
310 if (test_bit(SC_OP_INVALID, &sc->sc_flags))
311 return -EIO;
312
313 r = ath_reset_internal(sc, hchan);
314
315 return r;
316 }
317
318 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
319 struct ieee80211_vif *vif)
320 {
321 struct ath_node *an;
322 an = (struct ath_node *)sta->drv_priv;
323
324 an->sc = sc;
325 an->sta = sta;
326 an->vif = vif;
327
328 ath_tx_node_init(sc, an);
329
330 if (sta->ht_cap.ht_supported) {
331 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
332 sta->ht_cap.ampdu_factor);
333 an->mpdudensity = ath9k_parse_mpdudensity(sta->ht_cap.ampdu_density);
334 }
335 }
336
337 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
338 {
339 struct ath_node *an = (struct ath_node *)sta->drv_priv;
340 ath_tx_node_cleanup(sc, an);
341 }
342
343 void ath9k_tasklet(unsigned long data)
344 {
345 struct ath_softc *sc = (struct ath_softc *)data;
346 struct ath_hw *ah = sc->sc_ah;
347 struct ath_common *common = ath9k_hw_common(ah);
348 enum ath_reset_type type;
349 unsigned long flags;
350 u32 status = sc->intrstatus;
351 u32 rxmask;
352
353 ath9k_ps_wakeup(sc);
354 spin_lock(&sc->sc_pcu_lock);
355
356 if ((status & ATH9K_INT_FATAL) ||
357 (status & ATH9K_INT_BB_WATCHDOG)) {
358
359 if (status & ATH9K_INT_FATAL)
360 type = RESET_TYPE_FATAL_INT;
361 else
362 type = RESET_TYPE_BB_WATCHDOG;
363
364 ath9k_queue_reset(sc, type);
365 goto out;
366 }
367
368 spin_lock_irqsave(&sc->sc_pm_lock, flags);
369 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
370 /*
371 * TSF sync does not look correct; remain awake to sync with
372 * the next Beacon.
373 */
374 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
375 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
376 }
377 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
378
379 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
380 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
381 ATH9K_INT_RXORN);
382 else
383 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
384
385 if (status & rxmask) {
386 /* Check for high priority Rx first */
387 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
388 (status & ATH9K_INT_RXHP))
389 ath_rx_tasklet(sc, 0, true);
390
391 ath_rx_tasklet(sc, 0, false);
392 }
393
394 if (status & ATH9K_INT_TX) {
395 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
396 ath_tx_edma_tasklet(sc);
397 else
398 ath_tx_tasklet(sc);
399 }
400
401 ath9k_btcoex_handle_interrupt(sc, status);
402
403 out:
404 /* re-enable hardware interrupt */
405 ath9k_hw_enable_interrupts(ah);
406
407 spin_unlock(&sc->sc_pcu_lock);
408 ath9k_ps_restore(sc);
409 }
410
411 irqreturn_t ath_isr(int irq, void *dev)
412 {
413 #define SCHED_INTR ( \
414 ATH9K_INT_FATAL | \
415 ATH9K_INT_BB_WATCHDOG | \
416 ATH9K_INT_RXORN | \
417 ATH9K_INT_RXEOL | \
418 ATH9K_INT_RX | \
419 ATH9K_INT_RXLP | \
420 ATH9K_INT_RXHP | \
421 ATH9K_INT_TX | \
422 ATH9K_INT_BMISS | \
423 ATH9K_INT_CST | \
424 ATH9K_INT_TSFOOR | \
425 ATH9K_INT_GENTIMER | \
426 ATH9K_INT_MCI)
427
428 struct ath_softc *sc = dev;
429 struct ath_hw *ah = sc->sc_ah;
430 struct ath_common *common = ath9k_hw_common(ah);
431 enum ath9k_int status;
432 bool sched = false;
433
434 /*
435 * The hardware is not ready/present, don't
436 * touch anything. Note this can happen early
437 * on if the IRQ is shared.
438 */
439 if (test_bit(SC_OP_INVALID, &sc->sc_flags))
440 return IRQ_NONE;
441
442 /* shared irq, not for us */
443
444 if (!ath9k_hw_intrpend(ah))
445 return IRQ_NONE;
446
447 if (test_bit(SC_OP_HW_RESET, &sc->sc_flags)) {
448 ath9k_hw_kill_interrupts(ah);
449 return IRQ_HANDLED;
450 }
451
452 /*
453 * Figure out the reason(s) for the interrupt. Note
454 * that the hal returns a pseudo-ISR that may include
455 * bits we haven't explicitly enabled so we mask the
456 * value to insure we only process bits we requested.
457 */
458 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
459 status &= ah->imask; /* discard unasked-for bits */
460
461 /*
462 * If there are no status bits set, then this interrupt was not
463 * for me (should have been caught above).
464 */
465 if (!status)
466 return IRQ_NONE;
467
468 /* Cache the status */
469 sc->intrstatus = status;
470
471 if (status & SCHED_INTR)
472 sched = true;
473
474 /*
475 * If a FATAL or RXORN interrupt is received, we have to reset the
476 * chip immediately.
477 */
478 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
479 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
480 goto chip_reset;
481
482 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
483 (status & ATH9K_INT_BB_WATCHDOG)) {
484
485 spin_lock(&common->cc_lock);
486 ath_hw_cycle_counters_update(common);
487 ar9003_hw_bb_watchdog_dbg_info(ah);
488 spin_unlock(&common->cc_lock);
489
490 goto chip_reset;
491 }
492 #ifdef CONFIG_PM_SLEEP
493 if (status & ATH9K_INT_BMISS) {
494 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
495 ath_dbg(common, ANY, "during WoW we got a BMISS\n");
496 atomic_inc(&sc->wow_got_bmiss_intr);
497 atomic_dec(&sc->wow_sleep_proc_intr);
498 }
499 }
500 #endif
501 if (status & ATH9K_INT_SWBA)
502 tasklet_schedule(&sc->bcon_tasklet);
503
504 if (status & ATH9K_INT_TXURN)
505 ath9k_hw_updatetxtriglevel(ah, true);
506
507 if (status & ATH9K_INT_RXEOL) {
508 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
509 ath9k_hw_set_interrupts(ah);
510 }
511
512 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
513 if (status & ATH9K_INT_TIM_TIMER) {
514 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
515 goto chip_reset;
516 /* Clear RxAbort bit so that we can
517 * receive frames */
518 ath9k_setpower(sc, ATH9K_PM_AWAKE);
519 spin_lock(&sc->sc_pm_lock);
520 ath9k_hw_setrxabort(sc->sc_ah, 0);
521 sc->ps_flags |= PS_WAIT_FOR_BEACON;
522 spin_unlock(&sc->sc_pm_lock);
523 }
524
525 chip_reset:
526
527 ath_debug_stat_interrupt(sc, status);
528
529 if (sched) {
530 /* turn off every interrupt */
531 ath9k_hw_disable_interrupts(ah);
532 tasklet_schedule(&sc->intr_tq);
533 }
534
535 return IRQ_HANDLED;
536
537 #undef SCHED_INTR
538 }
539
540 static int ath_reset(struct ath_softc *sc)
541 {
542 int i, r;
543
544 ath9k_ps_wakeup(sc);
545
546 r = ath_reset_internal(sc, NULL);
547
548 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
549 if (!ATH_TXQ_SETUP(sc, i))
550 continue;
551
552 spin_lock_bh(&sc->tx.txq[i].axq_lock);
553 ath_txq_schedule(sc, &sc->tx.txq[i]);
554 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
555 }
556
557 ath9k_ps_restore(sc);
558
559 return r;
560 }
561
562 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
563 {
564 #ifdef CONFIG_ATH9K_DEBUGFS
565 RESET_STAT_INC(sc, type);
566 #endif
567 set_bit(SC_OP_HW_RESET, &sc->sc_flags);
568 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
569 }
570
571 void ath_reset_work(struct work_struct *work)
572 {
573 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
574
575 ath_reset(sc);
576 }
577
578 /**********************/
579 /* mac80211 callbacks */
580 /**********************/
581
582 static int ath9k_start(struct ieee80211_hw *hw)
583 {
584 struct ath_softc *sc = hw->priv;
585 struct ath_hw *ah = sc->sc_ah;
586 struct ath_common *common = ath9k_hw_common(ah);
587 struct ieee80211_channel *curchan = hw->conf.chandef.chan;
588 struct ath9k_channel *init_channel;
589 int r;
590
591 ath_dbg(common, CONFIG,
592 "Starting driver with initial channel: %d MHz\n",
593 curchan->center_freq);
594
595 ath9k_ps_wakeup(sc);
596 mutex_lock(&sc->mutex);
597
598 init_channel = ath9k_cmn_get_curchannel(hw, ah);
599
600 /* Reset SERDES registers */
601 ath9k_hw_configpcipowersave(ah, false);
602
603 /*
604 * The basic interface to setting the hardware in a good
605 * state is ``reset''. On return the hardware is known to
606 * be powered up and with interrupts disabled. This must
607 * be followed by initialization of the appropriate bits
608 * and then setup of the interrupt mask.
609 */
610 spin_lock_bh(&sc->sc_pcu_lock);
611
612 atomic_set(&ah->intr_ref_cnt, -1);
613
614 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
615 if (r) {
616 ath_err(common,
617 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
618 r, curchan->center_freq);
619 ah->reset_power_on = false;
620 }
621
622 /* Setup our intr mask. */
623 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
624 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
625 ATH9K_INT_GLOBAL;
626
627 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
628 ah->imask |= ATH9K_INT_RXHP |
629 ATH9K_INT_RXLP |
630 ATH9K_INT_BB_WATCHDOG;
631 else
632 ah->imask |= ATH9K_INT_RX;
633
634 ah->imask |= ATH9K_INT_GTT;
635
636 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
637 ah->imask |= ATH9K_INT_CST;
638
639 ath_mci_enable(sc);
640
641 clear_bit(SC_OP_INVALID, &sc->sc_flags);
642 sc->sc_ah->is_monitoring = false;
643
644 if (!ath_complete_reset(sc, false))
645 ah->reset_power_on = false;
646
647 if (ah->led_pin >= 0) {
648 ath9k_hw_cfg_output(ah, ah->led_pin,
649 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
650 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
651 }
652
653 /*
654 * Reset key cache to sane defaults (all entries cleared) instead of
655 * semi-random values after suspend/resume.
656 */
657 ath9k_cmn_init_crypto(sc->sc_ah);
658
659 spin_unlock_bh(&sc->sc_pcu_lock);
660
661 mutex_unlock(&sc->mutex);
662
663 ath9k_ps_restore(sc);
664
665 return 0;
666 }
667
668 static void ath9k_tx(struct ieee80211_hw *hw,
669 struct ieee80211_tx_control *control,
670 struct sk_buff *skb)
671 {
672 struct ath_softc *sc = hw->priv;
673 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
674 struct ath_tx_control txctl;
675 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
676 unsigned long flags;
677
678 if (sc->ps_enabled) {
679 /*
680 * mac80211 does not set PM field for normal data frames, so we
681 * need to update that based on the current PS mode.
682 */
683 if (ieee80211_is_data(hdr->frame_control) &&
684 !ieee80211_is_nullfunc(hdr->frame_control) &&
685 !ieee80211_has_pm(hdr->frame_control)) {
686 ath_dbg(common, PS,
687 "Add PM=1 for a TX frame while in PS mode\n");
688 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
689 }
690 }
691
692 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
693 /*
694 * We are using PS-Poll and mac80211 can request TX while in
695 * power save mode. Need to wake up hardware for the TX to be
696 * completed and if needed, also for RX of buffered frames.
697 */
698 ath9k_ps_wakeup(sc);
699 spin_lock_irqsave(&sc->sc_pm_lock, flags);
700 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
701 ath9k_hw_setrxabort(sc->sc_ah, 0);
702 if (ieee80211_is_pspoll(hdr->frame_control)) {
703 ath_dbg(common, PS,
704 "Sending PS-Poll to pick a buffered frame\n");
705 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
706 } else {
707 ath_dbg(common, PS, "Wake up to complete TX\n");
708 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
709 }
710 /*
711 * The actual restore operation will happen only after
712 * the ps_flags bit is cleared. We are just dropping
713 * the ps_usecount here.
714 */
715 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
716 ath9k_ps_restore(sc);
717 }
718
719 /*
720 * Cannot tx while the hardware is in full sleep, it first needs a full
721 * chip reset to recover from that
722 */
723 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
724 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
725 goto exit;
726 }
727
728 memset(&txctl, 0, sizeof(struct ath_tx_control));
729 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
730 txctl.sta = control->sta;
731
732 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
733
734 if (ath_tx_start(hw, skb, &txctl) != 0) {
735 ath_dbg(common, XMIT, "TX failed\n");
736 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
737 goto exit;
738 }
739
740 return;
741 exit:
742 ieee80211_free_txskb(hw, skb);
743 }
744
745 static void ath9k_stop(struct ieee80211_hw *hw)
746 {
747 struct ath_softc *sc = hw->priv;
748 struct ath_hw *ah = sc->sc_ah;
749 struct ath_common *common = ath9k_hw_common(ah);
750 bool prev_idle;
751
752 mutex_lock(&sc->mutex);
753
754 ath_cancel_work(sc);
755 del_timer_sync(&sc->rx_poll_timer);
756
757 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
758 ath_dbg(common, ANY, "Device not present\n");
759 mutex_unlock(&sc->mutex);
760 return;
761 }
762
763 /* Ensure HW is awake when we try to shut it down. */
764 ath9k_ps_wakeup(sc);
765
766 spin_lock_bh(&sc->sc_pcu_lock);
767
768 /* prevent tasklets to enable interrupts once we disable them */
769 ah->imask &= ~ATH9K_INT_GLOBAL;
770
771 /* make sure h/w will not generate any interrupt
772 * before setting the invalid flag. */
773 ath9k_hw_disable_interrupts(ah);
774
775 spin_unlock_bh(&sc->sc_pcu_lock);
776
777 /* we can now sync irq and kill any running tasklets, since we already
778 * disabled interrupts and not holding a spin lock */
779 synchronize_irq(sc->irq);
780 tasklet_kill(&sc->intr_tq);
781 tasklet_kill(&sc->bcon_tasklet);
782
783 prev_idle = sc->ps_idle;
784 sc->ps_idle = true;
785
786 spin_lock_bh(&sc->sc_pcu_lock);
787
788 if (ah->led_pin >= 0) {
789 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
790 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
791 }
792
793 ath_prepare_reset(sc);
794
795 if (sc->rx.frag) {
796 dev_kfree_skb_any(sc->rx.frag);
797 sc->rx.frag = NULL;
798 }
799
800 if (!ah->curchan)
801 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
802
803 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
804 ath9k_hw_phy_disable(ah);
805
806 ath9k_hw_configpcipowersave(ah, true);
807
808 spin_unlock_bh(&sc->sc_pcu_lock);
809
810 ath9k_ps_restore(sc);
811
812 set_bit(SC_OP_INVALID, &sc->sc_flags);
813 sc->ps_idle = prev_idle;
814
815 mutex_unlock(&sc->mutex);
816
817 ath_dbg(common, CONFIG, "Driver halt\n");
818 }
819
820 bool ath9k_uses_beacons(int type)
821 {
822 switch (type) {
823 case NL80211_IFTYPE_AP:
824 case NL80211_IFTYPE_ADHOC:
825 case NL80211_IFTYPE_MESH_POINT:
826 return true;
827 default:
828 return false;
829 }
830 }
831
832 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
833 {
834 struct ath9k_vif_iter_data *iter_data = data;
835 int i;
836
837 if (iter_data->has_hw_macaddr) {
838 for (i = 0; i < ETH_ALEN; i++)
839 iter_data->mask[i] &=
840 ~(iter_data->hw_macaddr[i] ^ mac[i]);
841 } else {
842 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
843 iter_data->has_hw_macaddr = true;
844 }
845
846 switch (vif->type) {
847 case NL80211_IFTYPE_AP:
848 iter_data->naps++;
849 break;
850 case NL80211_IFTYPE_STATION:
851 iter_data->nstations++;
852 break;
853 case NL80211_IFTYPE_ADHOC:
854 iter_data->nadhocs++;
855 break;
856 case NL80211_IFTYPE_MESH_POINT:
857 iter_data->nmeshes++;
858 break;
859 case NL80211_IFTYPE_WDS:
860 iter_data->nwds++;
861 break;
862 default:
863 break;
864 }
865 }
866
867 static void ath9k_sta_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
868 {
869 struct ath_softc *sc = data;
870 struct ath_vif *avp = (void *)vif->drv_priv;
871
872 if (vif->type != NL80211_IFTYPE_STATION)
873 return;
874
875 if (avp->primary_sta_vif)
876 ath9k_set_assoc_state(sc, vif);
877 }
878
879 /* Called with sc->mutex held. */
880 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
881 struct ieee80211_vif *vif,
882 struct ath9k_vif_iter_data *iter_data)
883 {
884 struct ath_softc *sc = hw->priv;
885 struct ath_hw *ah = sc->sc_ah;
886 struct ath_common *common = ath9k_hw_common(ah);
887
888 /*
889 * Use the hardware MAC address as reference, the hardware uses it
890 * together with the BSSID mask when matching addresses.
891 */
892 memset(iter_data, 0, sizeof(*iter_data));
893 memset(&iter_data->mask, 0xff, ETH_ALEN);
894
895 if (vif)
896 ath9k_vif_iter(iter_data, vif->addr, vif);
897
898 /* Get list of all active MAC addresses */
899 ieee80211_iterate_active_interfaces_atomic(
900 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
901 ath9k_vif_iter, iter_data);
902
903 memcpy(common->macaddr, iter_data->hw_macaddr, ETH_ALEN);
904 }
905
906 /* Called with sc->mutex held. */
907 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
908 struct ieee80211_vif *vif)
909 {
910 struct ath_softc *sc = hw->priv;
911 struct ath_hw *ah = sc->sc_ah;
912 struct ath_common *common = ath9k_hw_common(ah);
913 struct ath9k_vif_iter_data iter_data;
914 enum nl80211_iftype old_opmode = ah->opmode;
915
916 ath9k_calculate_iter_data(hw, vif, &iter_data);
917
918 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
919 ath_hw_setbssidmask(common);
920
921 if (iter_data.naps > 0) {
922 ath9k_hw_set_tsfadjust(ah, true);
923 ah->opmode = NL80211_IFTYPE_AP;
924 } else {
925 ath9k_hw_set_tsfadjust(ah, false);
926
927 if (iter_data.nmeshes)
928 ah->opmode = NL80211_IFTYPE_MESH_POINT;
929 else if (iter_data.nwds)
930 ah->opmode = NL80211_IFTYPE_AP;
931 else if (iter_data.nadhocs)
932 ah->opmode = NL80211_IFTYPE_ADHOC;
933 else
934 ah->opmode = NL80211_IFTYPE_STATION;
935 }
936
937 ath9k_hw_setopmode(ah);
938
939 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
940 ah->imask |= ATH9K_INT_TSFOOR;
941 else
942 ah->imask &= ~ATH9K_INT_TSFOOR;
943
944 ath9k_hw_set_interrupts(ah);
945
946 /*
947 * If we are changing the opmode to STATION,
948 * a beacon sync needs to be done.
949 */
950 if (ah->opmode == NL80211_IFTYPE_STATION &&
951 old_opmode == NL80211_IFTYPE_AP &&
952 test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
953 ieee80211_iterate_active_interfaces_atomic(
954 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
955 ath9k_sta_vif_iter, sc);
956 }
957 }
958
959 static int ath9k_add_interface(struct ieee80211_hw *hw,
960 struct ieee80211_vif *vif)
961 {
962 struct ath_softc *sc = hw->priv;
963 struct ath_hw *ah = sc->sc_ah;
964 struct ath_common *common = ath9k_hw_common(ah);
965 struct ath_vif *avp = (void *)vif->drv_priv;
966 struct ath_node *an = &avp->mcast_node;
967
968 mutex_lock(&sc->mutex);
969
970 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
971 sc->nvifs++;
972
973 ath9k_ps_wakeup(sc);
974 ath9k_calculate_summary_state(hw, vif);
975 ath9k_ps_restore(sc);
976
977 if (ath9k_uses_beacons(vif->type))
978 ath9k_beacon_assign_slot(sc, vif);
979
980 an->sc = sc;
981 an->sta = NULL;
982 an->vif = vif;
983 an->no_ps_filter = true;
984 ath_tx_node_init(sc, an);
985
986 mutex_unlock(&sc->mutex);
987 return 0;
988 }
989
990 static int ath9k_change_interface(struct ieee80211_hw *hw,
991 struct ieee80211_vif *vif,
992 enum nl80211_iftype new_type,
993 bool p2p)
994 {
995 struct ath_softc *sc = hw->priv;
996 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
997
998 ath_dbg(common, CONFIG, "Change Interface\n");
999 mutex_lock(&sc->mutex);
1000
1001 if (ath9k_uses_beacons(vif->type))
1002 ath9k_beacon_remove_slot(sc, vif);
1003
1004 vif->type = new_type;
1005 vif->p2p = p2p;
1006
1007 ath9k_ps_wakeup(sc);
1008 ath9k_calculate_summary_state(hw, vif);
1009 ath9k_ps_restore(sc);
1010
1011 if (ath9k_uses_beacons(vif->type))
1012 ath9k_beacon_assign_slot(sc, vif);
1013
1014 mutex_unlock(&sc->mutex);
1015 return 0;
1016 }
1017
1018 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1019 struct ieee80211_vif *vif)
1020 {
1021 struct ath_softc *sc = hw->priv;
1022 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1023 struct ath_vif *avp = (void *)vif->drv_priv;
1024
1025 ath_dbg(common, CONFIG, "Detach Interface\n");
1026
1027 mutex_lock(&sc->mutex);
1028
1029 sc->nvifs--;
1030
1031 if (ath9k_uses_beacons(vif->type))
1032 ath9k_beacon_remove_slot(sc, vif);
1033
1034 if (sc->csa_vif == vif)
1035 sc->csa_vif = NULL;
1036
1037 ath9k_ps_wakeup(sc);
1038 ath9k_calculate_summary_state(hw, NULL);
1039 ath9k_ps_restore(sc);
1040
1041 ath_tx_node_cleanup(sc, &avp->mcast_node);
1042
1043 mutex_unlock(&sc->mutex);
1044 }
1045
1046 static void ath9k_enable_ps(struct ath_softc *sc)
1047 {
1048 struct ath_hw *ah = sc->sc_ah;
1049 struct ath_common *common = ath9k_hw_common(ah);
1050
1051 sc->ps_enabled = true;
1052 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1053 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1054 ah->imask |= ATH9K_INT_TIM_TIMER;
1055 ath9k_hw_set_interrupts(ah);
1056 }
1057 ath9k_hw_setrxabort(ah, 1);
1058 }
1059 ath_dbg(common, PS, "PowerSave enabled\n");
1060 }
1061
1062 static void ath9k_disable_ps(struct ath_softc *sc)
1063 {
1064 struct ath_hw *ah = sc->sc_ah;
1065 struct ath_common *common = ath9k_hw_common(ah);
1066
1067 sc->ps_enabled = false;
1068 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1069 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1070 ath9k_hw_setrxabort(ah, 0);
1071 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1072 PS_WAIT_FOR_CAB |
1073 PS_WAIT_FOR_PSPOLL_DATA |
1074 PS_WAIT_FOR_TX_ACK);
1075 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1076 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1077 ath9k_hw_set_interrupts(ah);
1078 }
1079 }
1080 ath_dbg(common, PS, "PowerSave disabled\n");
1081 }
1082
1083 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw)
1084 {
1085 struct ath_softc *sc = hw->priv;
1086 struct ath_hw *ah = sc->sc_ah;
1087 struct ath_common *common = ath9k_hw_common(ah);
1088 u32 rxfilter;
1089
1090 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1091 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1092 return;
1093 }
1094
1095 ath9k_ps_wakeup(sc);
1096 rxfilter = ath9k_hw_getrxfilter(ah);
1097 ath9k_hw_setrxfilter(ah, rxfilter |
1098 ATH9K_RX_FILTER_PHYRADAR |
1099 ATH9K_RX_FILTER_PHYERR);
1100
1101 /* TODO: usually this should not be neccesary, but for some reason
1102 * (or in some mode?) the trigger must be called after the
1103 * configuration, otherwise the register will have its values reset
1104 * (on my ar9220 to value 0x01002310)
1105 */
1106 ath9k_spectral_scan_config(hw, sc->spectral_mode);
1107 ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
1108 ath9k_ps_restore(sc);
1109 }
1110
1111 int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
1112 enum spectral_mode spectral_mode)
1113 {
1114 struct ath_softc *sc = hw->priv;
1115 struct ath_hw *ah = sc->sc_ah;
1116 struct ath_common *common = ath9k_hw_common(ah);
1117
1118 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1119 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1120 return -1;
1121 }
1122
1123 switch (spectral_mode) {
1124 case SPECTRAL_DISABLED:
1125 sc->spec_config.enabled = 0;
1126 break;
1127 case SPECTRAL_BACKGROUND:
1128 /* send endless samples.
1129 * TODO: is this really useful for "background"?
1130 */
1131 sc->spec_config.endless = 1;
1132 sc->spec_config.enabled = 1;
1133 break;
1134 case SPECTRAL_CHANSCAN:
1135 case SPECTRAL_MANUAL:
1136 sc->spec_config.endless = 0;
1137 sc->spec_config.enabled = 1;
1138 break;
1139 default:
1140 return -1;
1141 }
1142
1143 ath9k_ps_wakeup(sc);
1144 ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config);
1145 ath9k_ps_restore(sc);
1146
1147 sc->spectral_mode = spectral_mode;
1148
1149 return 0;
1150 }
1151
1152 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1153 {
1154 struct ath_softc *sc = hw->priv;
1155 struct ath_hw *ah = sc->sc_ah;
1156 struct ath_common *common = ath9k_hw_common(ah);
1157 struct ieee80211_conf *conf = &hw->conf;
1158 bool reset_channel = false;
1159
1160 ath9k_ps_wakeup(sc);
1161 mutex_lock(&sc->mutex);
1162
1163 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1164 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1165 if (sc->ps_idle) {
1166 ath_cancel_work(sc);
1167 ath9k_stop_btcoex(sc);
1168 } else {
1169 ath9k_start_btcoex(sc);
1170 /*
1171 * The chip needs a reset to properly wake up from
1172 * full sleep
1173 */
1174 reset_channel = ah->chip_fullsleep;
1175 }
1176 }
1177
1178 /*
1179 * We just prepare to enable PS. We have to wait until our AP has
1180 * ACK'd our null data frame to disable RX otherwise we'll ignore
1181 * those ACKs and end up retransmitting the same null data frames.
1182 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1183 */
1184 if (changed & IEEE80211_CONF_CHANGE_PS) {
1185 unsigned long flags;
1186 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1187 if (conf->flags & IEEE80211_CONF_PS)
1188 ath9k_enable_ps(sc);
1189 else
1190 ath9k_disable_ps(sc);
1191 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1192 }
1193
1194 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1195 if (conf->flags & IEEE80211_CONF_MONITOR) {
1196 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1197 sc->sc_ah->is_monitoring = true;
1198 } else {
1199 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1200 sc->sc_ah->is_monitoring = false;
1201 }
1202 }
1203
1204 if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
1205 struct ieee80211_channel *curchan = hw->conf.chandef.chan;
1206 int pos = curchan->hw_value;
1207 int old_pos = -1;
1208 unsigned long flags;
1209
1210 if (ah->curchan)
1211 old_pos = ah->curchan - &ah->channels[0];
1212
1213 ath_dbg(common, CONFIG, "Set channel: %d MHz width: %d\n",
1214 curchan->center_freq, hw->conf.chandef.width);
1215
1216 /* update survey stats for the old channel before switching */
1217 spin_lock_irqsave(&common->cc_lock, flags);
1218 ath_update_survey_stats(sc);
1219 spin_unlock_irqrestore(&common->cc_lock, flags);
1220
1221 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1222 &conf->chandef);
1223
1224 /*
1225 * If the operating channel changes, change the survey in-use flags
1226 * along with it.
1227 * Reset the survey data for the new channel, unless we're switching
1228 * back to the operating channel from an off-channel operation.
1229 */
1230 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1231 sc->cur_survey != &sc->survey[pos]) {
1232
1233 if (sc->cur_survey)
1234 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1235
1236 sc->cur_survey = &sc->survey[pos];
1237
1238 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1239 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1240 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1241 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1242 }
1243
1244 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1245 ath_err(common, "Unable to set channel\n");
1246 mutex_unlock(&sc->mutex);
1247 ath9k_ps_restore(sc);
1248 return -EINVAL;
1249 }
1250
1251 /*
1252 * The most recent snapshot of channel->noisefloor for the old
1253 * channel is only available after the hardware reset. Copy it to
1254 * the survey stats now.
1255 */
1256 if (old_pos >= 0)
1257 ath_update_survey_nf(sc, old_pos);
1258
1259 /*
1260 * Enable radar pulse detection if on a DFS channel. Spectral
1261 * scanning and radar detection can not be used concurrently.
1262 */
1263 if (hw->conf.radar_enabled) {
1264 u32 rxfilter;
1265
1266 /* set HW specific DFS configuration */
1267 ath9k_hw_set_radar_params(ah);
1268 rxfilter = ath9k_hw_getrxfilter(ah);
1269 rxfilter |= ATH9K_RX_FILTER_PHYRADAR |
1270 ATH9K_RX_FILTER_PHYERR;
1271 ath9k_hw_setrxfilter(ah, rxfilter);
1272 ath_dbg(common, DFS, "DFS enabled at freq %d\n",
1273 curchan->center_freq);
1274 } else {
1275 /* perform spectral scan if requested. */
1276 if (test_bit(SC_OP_SCANNING, &sc->sc_flags) &&
1277 sc->spectral_mode == SPECTRAL_CHANSCAN)
1278 ath9k_spectral_scan_trigger(hw);
1279 }
1280 }
1281
1282 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1283 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1284 sc->config.txpowlimit = 2 * conf->power_level;
1285 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1286 sc->config.txpowlimit, &sc->curtxpow);
1287 }
1288
1289 mutex_unlock(&sc->mutex);
1290 ath9k_ps_restore(sc);
1291
1292 return 0;
1293 }
1294
1295 #define SUPPORTED_FILTERS \
1296 (FIF_PROMISC_IN_BSS | \
1297 FIF_ALLMULTI | \
1298 FIF_CONTROL | \
1299 FIF_PSPOLL | \
1300 FIF_OTHER_BSS | \
1301 FIF_BCN_PRBRESP_PROMISC | \
1302 FIF_PROBE_REQ | \
1303 FIF_FCSFAIL)
1304
1305 /* FIXME: sc->sc_full_reset ? */
1306 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1307 unsigned int changed_flags,
1308 unsigned int *total_flags,
1309 u64 multicast)
1310 {
1311 struct ath_softc *sc = hw->priv;
1312 u32 rfilt;
1313
1314 changed_flags &= SUPPORTED_FILTERS;
1315 *total_flags &= SUPPORTED_FILTERS;
1316
1317 sc->rx.rxfilter = *total_flags;
1318 ath9k_ps_wakeup(sc);
1319 rfilt = ath_calcrxfilter(sc);
1320 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1321 ath9k_ps_restore(sc);
1322
1323 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1324 rfilt);
1325 }
1326
1327 static int ath9k_sta_add(struct ieee80211_hw *hw,
1328 struct ieee80211_vif *vif,
1329 struct ieee80211_sta *sta)
1330 {
1331 struct ath_softc *sc = hw->priv;
1332 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1333 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1334 struct ieee80211_key_conf ps_key = { };
1335 int key;
1336
1337 ath_node_attach(sc, sta, vif);
1338
1339 if (vif->type != NL80211_IFTYPE_AP &&
1340 vif->type != NL80211_IFTYPE_AP_VLAN)
1341 return 0;
1342
1343 key = ath_key_config(common, vif, sta, &ps_key);
1344 if (key > 0)
1345 an->ps_key = key;
1346
1347 return 0;
1348 }
1349
1350 static void ath9k_del_ps_key(struct ath_softc *sc,
1351 struct ieee80211_vif *vif,
1352 struct ieee80211_sta *sta)
1353 {
1354 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1355 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1356 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1357
1358 if (!an->ps_key)
1359 return;
1360
1361 ath_key_delete(common, &ps_key);
1362 an->ps_key = 0;
1363 }
1364
1365 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1366 struct ieee80211_vif *vif,
1367 struct ieee80211_sta *sta)
1368 {
1369 struct ath_softc *sc = hw->priv;
1370
1371 ath9k_del_ps_key(sc, vif, sta);
1372 ath_node_detach(sc, sta);
1373
1374 return 0;
1375 }
1376
1377 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1378 struct ieee80211_vif *vif,
1379 enum sta_notify_cmd cmd,
1380 struct ieee80211_sta *sta)
1381 {
1382 struct ath_softc *sc = hw->priv;
1383 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1384
1385 switch (cmd) {
1386 case STA_NOTIFY_SLEEP:
1387 an->sleeping = true;
1388 ath_tx_aggr_sleep(sta, sc, an);
1389 break;
1390 case STA_NOTIFY_AWAKE:
1391 an->sleeping = false;
1392 ath_tx_aggr_wakeup(sc, an);
1393 break;
1394 }
1395 }
1396
1397 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1398 struct ieee80211_vif *vif, u16 queue,
1399 const struct ieee80211_tx_queue_params *params)
1400 {
1401 struct ath_softc *sc = hw->priv;
1402 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1403 struct ath_txq *txq;
1404 struct ath9k_tx_queue_info qi;
1405 int ret = 0;
1406
1407 if (queue >= IEEE80211_NUM_ACS)
1408 return 0;
1409
1410 txq = sc->tx.txq_map[queue];
1411
1412 ath9k_ps_wakeup(sc);
1413 mutex_lock(&sc->mutex);
1414
1415 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1416
1417 qi.tqi_aifs = params->aifs;
1418 qi.tqi_cwmin = params->cw_min;
1419 qi.tqi_cwmax = params->cw_max;
1420 qi.tqi_burstTime = params->txop * 32;
1421
1422 ath_dbg(common, CONFIG,
1423 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1424 queue, txq->axq_qnum, params->aifs, params->cw_min,
1425 params->cw_max, params->txop);
1426
1427 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1428 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1429 if (ret)
1430 ath_err(common, "TXQ Update failed\n");
1431
1432 mutex_unlock(&sc->mutex);
1433 ath9k_ps_restore(sc);
1434
1435 return ret;
1436 }
1437
1438 static int ath9k_set_key(struct ieee80211_hw *hw,
1439 enum set_key_cmd cmd,
1440 struct ieee80211_vif *vif,
1441 struct ieee80211_sta *sta,
1442 struct ieee80211_key_conf *key)
1443 {
1444 struct ath_softc *sc = hw->priv;
1445 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1446 int ret = 0;
1447
1448 if (ath9k_modparam_nohwcrypt)
1449 return -ENOSPC;
1450
1451 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1452 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1453 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1454 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1455 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1456 /*
1457 * For now, disable hw crypto for the RSN IBSS group keys. This
1458 * could be optimized in the future to use a modified key cache
1459 * design to support per-STA RX GTK, but until that gets
1460 * implemented, use of software crypto for group addressed
1461 * frames is a acceptable to allow RSN IBSS to be used.
1462 */
1463 return -EOPNOTSUPP;
1464 }
1465
1466 mutex_lock(&sc->mutex);
1467 ath9k_ps_wakeup(sc);
1468 ath_dbg(common, CONFIG, "Set HW Key\n");
1469
1470 switch (cmd) {
1471 case SET_KEY:
1472 if (sta)
1473 ath9k_del_ps_key(sc, vif, sta);
1474
1475 ret = ath_key_config(common, vif, sta, key);
1476 if (ret >= 0) {
1477 key->hw_key_idx = ret;
1478 /* push IV and Michael MIC generation to stack */
1479 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1480 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1481 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1482 if (sc->sc_ah->sw_mgmt_crypto &&
1483 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1484 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1485 ret = 0;
1486 }
1487 break;
1488 case DISABLE_KEY:
1489 ath_key_delete(common, key);
1490 break;
1491 default:
1492 ret = -EINVAL;
1493 }
1494
1495 ath9k_ps_restore(sc);
1496 mutex_unlock(&sc->mutex);
1497
1498 return ret;
1499 }
1500
1501 static void ath9k_set_assoc_state(struct ath_softc *sc,
1502 struct ieee80211_vif *vif)
1503 {
1504 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1505 struct ath_vif *avp = (void *)vif->drv_priv;
1506 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1507 unsigned long flags;
1508
1509 set_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
1510 avp->primary_sta_vif = true;
1511
1512 /*
1513 * Set the AID, BSSID and do beacon-sync only when
1514 * the HW opmode is STATION.
1515 *
1516 * But the primary bit is set above in any case.
1517 */
1518 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1519 return;
1520
1521 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1522 common->curaid = bss_conf->aid;
1523 ath9k_hw_write_associd(sc->sc_ah);
1524
1525 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1526 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1527
1528 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1529 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1530 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1531
1532 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1533 ath9k_mci_update_wlan_channels(sc, false);
1534
1535 ath_dbg(common, CONFIG,
1536 "Primary Station interface: %pM, BSSID: %pM\n",
1537 vif->addr, common->curbssid);
1538 }
1539
1540 static void ath9k_bss_assoc_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1541 {
1542 struct ath_softc *sc = data;
1543 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1544
1545 if (test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
1546 return;
1547
1548 if (bss_conf->assoc)
1549 ath9k_set_assoc_state(sc, vif);
1550 }
1551
1552 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1553 struct ieee80211_vif *vif,
1554 struct ieee80211_bss_conf *bss_conf,
1555 u32 changed)
1556 {
1557 #define CHECK_ANI \
1558 (BSS_CHANGED_ASSOC | \
1559 BSS_CHANGED_IBSS | \
1560 BSS_CHANGED_BEACON_ENABLED)
1561
1562 struct ath_softc *sc = hw->priv;
1563 struct ath_hw *ah = sc->sc_ah;
1564 struct ath_common *common = ath9k_hw_common(ah);
1565 struct ath_vif *avp = (void *)vif->drv_priv;
1566 int slottime;
1567
1568 ath9k_ps_wakeup(sc);
1569 mutex_lock(&sc->mutex);
1570
1571 if (changed & BSS_CHANGED_ASSOC) {
1572 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1573 bss_conf->bssid, bss_conf->assoc);
1574
1575 if (avp->primary_sta_vif && !bss_conf->assoc) {
1576 clear_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags);
1577 avp->primary_sta_vif = false;
1578
1579 if (ah->opmode == NL80211_IFTYPE_STATION)
1580 clear_bit(SC_OP_BEACONS, &sc->sc_flags);
1581 }
1582
1583 ieee80211_iterate_active_interfaces_atomic(
1584 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1585 ath9k_bss_assoc_iter, sc);
1586
1587 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags) &&
1588 ah->opmode == NL80211_IFTYPE_STATION) {
1589 memset(common->curbssid, 0, ETH_ALEN);
1590 common->curaid = 0;
1591 ath9k_hw_write_associd(sc->sc_ah);
1592 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1593 ath9k_mci_update_wlan_channels(sc, true);
1594 }
1595 }
1596
1597 if (changed & BSS_CHANGED_IBSS) {
1598 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1599 common->curaid = bss_conf->aid;
1600 ath9k_hw_write_associd(sc->sc_ah);
1601 }
1602
1603 if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1604 (changed & BSS_CHANGED_BEACON_INT)) {
1605 if (ah->opmode == NL80211_IFTYPE_AP &&
1606 bss_conf->enable_beacon)
1607 ath9k_set_tsfadjust(sc, vif);
1608 if (ath9k_allow_beacon_config(sc, vif))
1609 ath9k_beacon_config(sc, vif, changed);
1610 }
1611
1612 if (changed & BSS_CHANGED_ERP_SLOT) {
1613 if (bss_conf->use_short_slot)
1614 slottime = 9;
1615 else
1616 slottime = 20;
1617 if (vif->type == NL80211_IFTYPE_AP) {
1618 /*
1619 * Defer update, so that connected stations can adjust
1620 * their settings at the same time.
1621 * See beacon.c for more details
1622 */
1623 sc->beacon.slottime = slottime;
1624 sc->beacon.updateslot = UPDATE;
1625 } else {
1626 ah->slottime = slottime;
1627 ath9k_hw_init_global_settings(ah);
1628 }
1629 }
1630
1631 if (changed & CHECK_ANI)
1632 ath_check_ani(sc);
1633
1634 mutex_unlock(&sc->mutex);
1635 ath9k_ps_restore(sc);
1636
1637 #undef CHECK_ANI
1638 }
1639
1640 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1641 {
1642 struct ath_softc *sc = hw->priv;
1643 u64 tsf;
1644
1645 mutex_lock(&sc->mutex);
1646 ath9k_ps_wakeup(sc);
1647 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1648 ath9k_ps_restore(sc);
1649 mutex_unlock(&sc->mutex);
1650
1651 return tsf;
1652 }
1653
1654 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1655 struct ieee80211_vif *vif,
1656 u64 tsf)
1657 {
1658 struct ath_softc *sc = hw->priv;
1659
1660 mutex_lock(&sc->mutex);
1661 ath9k_ps_wakeup(sc);
1662 ath9k_hw_settsf64(sc->sc_ah, tsf);
1663 ath9k_ps_restore(sc);
1664 mutex_unlock(&sc->mutex);
1665 }
1666
1667 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1668 {
1669 struct ath_softc *sc = hw->priv;
1670
1671 mutex_lock(&sc->mutex);
1672
1673 ath9k_ps_wakeup(sc);
1674 ath9k_hw_reset_tsf(sc->sc_ah);
1675 ath9k_ps_restore(sc);
1676
1677 mutex_unlock(&sc->mutex);
1678 }
1679
1680 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1681 struct ieee80211_vif *vif,
1682 enum ieee80211_ampdu_mlme_action action,
1683 struct ieee80211_sta *sta,
1684 u16 tid, u16 *ssn, u8 buf_size)
1685 {
1686 struct ath_softc *sc = hw->priv;
1687 bool flush = false;
1688 int ret = 0;
1689
1690 mutex_lock(&sc->mutex);
1691
1692 switch (action) {
1693 case IEEE80211_AMPDU_RX_START:
1694 break;
1695 case IEEE80211_AMPDU_RX_STOP:
1696 break;
1697 case IEEE80211_AMPDU_TX_START:
1698 ath9k_ps_wakeup(sc);
1699 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1700 if (!ret)
1701 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1702 ath9k_ps_restore(sc);
1703 break;
1704 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1705 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1706 flush = true;
1707 case IEEE80211_AMPDU_TX_STOP_CONT:
1708 ath9k_ps_wakeup(sc);
1709 ath_tx_aggr_stop(sc, sta, tid);
1710 if (!flush)
1711 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1712 ath9k_ps_restore(sc);
1713 break;
1714 case IEEE80211_AMPDU_TX_OPERATIONAL:
1715 ath9k_ps_wakeup(sc);
1716 ath_tx_aggr_resume(sc, sta, tid);
1717 ath9k_ps_restore(sc);
1718 break;
1719 default:
1720 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1721 }
1722
1723 mutex_unlock(&sc->mutex);
1724
1725 return ret;
1726 }
1727
1728 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1729 struct survey_info *survey)
1730 {
1731 struct ath_softc *sc = hw->priv;
1732 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1733 struct ieee80211_supported_band *sband;
1734 struct ieee80211_channel *chan;
1735 unsigned long flags;
1736 int pos;
1737
1738 spin_lock_irqsave(&common->cc_lock, flags);
1739 if (idx == 0)
1740 ath_update_survey_stats(sc);
1741
1742 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1743 if (sband && idx >= sband->n_channels) {
1744 idx -= sband->n_channels;
1745 sband = NULL;
1746 }
1747
1748 if (!sband)
1749 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1750
1751 if (!sband || idx >= sband->n_channels) {
1752 spin_unlock_irqrestore(&common->cc_lock, flags);
1753 return -ENOENT;
1754 }
1755
1756 chan = &sband->channels[idx];
1757 pos = chan->hw_value;
1758 memcpy(survey, &sc->survey[pos], sizeof(*survey));
1759 survey->channel = chan;
1760 spin_unlock_irqrestore(&common->cc_lock, flags);
1761
1762 return 0;
1763 }
1764
1765 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
1766 {
1767 struct ath_softc *sc = hw->priv;
1768 struct ath_hw *ah = sc->sc_ah;
1769
1770 mutex_lock(&sc->mutex);
1771 ah->coverage_class = coverage_class;
1772
1773 ath9k_ps_wakeup(sc);
1774 ath9k_hw_init_global_settings(ah);
1775 ath9k_ps_restore(sc);
1776
1777 mutex_unlock(&sc->mutex);
1778 }
1779
1780 static void ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1781 {
1782 struct ath_softc *sc = hw->priv;
1783 struct ath_hw *ah = sc->sc_ah;
1784 struct ath_common *common = ath9k_hw_common(ah);
1785 int timeout = 200; /* ms */
1786 int i, j;
1787 bool drain_txq;
1788
1789 mutex_lock(&sc->mutex);
1790 cancel_delayed_work_sync(&sc->tx_complete_work);
1791
1792 if (ah->ah_flags & AH_UNPLUGGED) {
1793 ath_dbg(common, ANY, "Device has been unplugged!\n");
1794 mutex_unlock(&sc->mutex);
1795 return;
1796 }
1797
1798 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
1799 ath_dbg(common, ANY, "Device not present\n");
1800 mutex_unlock(&sc->mutex);
1801 return;
1802 }
1803
1804 for (j = 0; j < timeout; j++) {
1805 bool npend = false;
1806
1807 if (j)
1808 usleep_range(1000, 2000);
1809
1810 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1811 if (!ATH_TXQ_SETUP(sc, i))
1812 continue;
1813
1814 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1815
1816 if (npend)
1817 break;
1818 }
1819
1820 if (!npend)
1821 break;
1822 }
1823
1824 if (drop) {
1825 ath9k_ps_wakeup(sc);
1826 spin_lock_bh(&sc->sc_pcu_lock);
1827 drain_txq = ath_drain_all_txq(sc);
1828 spin_unlock_bh(&sc->sc_pcu_lock);
1829
1830 if (!drain_txq)
1831 ath_reset(sc);
1832
1833 ath9k_ps_restore(sc);
1834 ieee80211_wake_queues(hw);
1835 }
1836
1837 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
1838 mutex_unlock(&sc->mutex);
1839 }
1840
1841 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
1842 {
1843 struct ath_softc *sc = hw->priv;
1844 int i;
1845
1846 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1847 if (!ATH_TXQ_SETUP(sc, i))
1848 continue;
1849
1850 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
1851 return true;
1852 }
1853 return false;
1854 }
1855
1856 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
1857 {
1858 struct ath_softc *sc = hw->priv;
1859 struct ath_hw *ah = sc->sc_ah;
1860 struct ieee80211_vif *vif;
1861 struct ath_vif *avp;
1862 struct ath_buf *bf;
1863 struct ath_tx_status ts;
1864 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1865 int status;
1866
1867 vif = sc->beacon.bslot[0];
1868 if (!vif)
1869 return 0;
1870
1871 if (!vif->bss_conf.enable_beacon)
1872 return 0;
1873
1874 avp = (void *)vif->drv_priv;
1875
1876 if (!sc->beacon.tx_processed && !edma) {
1877 tasklet_disable(&sc->bcon_tasklet);
1878
1879 bf = avp->av_bcbuf;
1880 if (!bf || !bf->bf_mpdu)
1881 goto skip;
1882
1883 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
1884 if (status == -EINPROGRESS)
1885 goto skip;
1886
1887 sc->beacon.tx_processed = true;
1888 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
1889
1890 skip:
1891 tasklet_enable(&sc->bcon_tasklet);
1892 }
1893
1894 return sc->beacon.tx_last;
1895 }
1896
1897 static int ath9k_get_stats(struct ieee80211_hw *hw,
1898 struct ieee80211_low_level_stats *stats)
1899 {
1900 struct ath_softc *sc = hw->priv;
1901 struct ath_hw *ah = sc->sc_ah;
1902 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
1903
1904 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
1905 stats->dot11RTSFailureCount = mib_stats->rts_bad;
1906 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
1907 stats->dot11RTSSuccessCount = mib_stats->rts_good;
1908 return 0;
1909 }
1910
1911 static u32 fill_chainmask(u32 cap, u32 new)
1912 {
1913 u32 filled = 0;
1914 int i;
1915
1916 for (i = 0; cap && new; i++, cap >>= 1) {
1917 if (!(cap & BIT(0)))
1918 continue;
1919
1920 if (new & BIT(0))
1921 filled |= BIT(i);
1922
1923 new >>= 1;
1924 }
1925
1926 return filled;
1927 }
1928
1929 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
1930 {
1931 if (AR_SREV_9300_20_OR_LATER(ah))
1932 return true;
1933
1934 switch (val & 0x7) {
1935 case 0x1:
1936 case 0x3:
1937 case 0x7:
1938 return true;
1939 case 0x2:
1940 return (ah->caps.rx_chainmask == 1);
1941 default:
1942 return false;
1943 }
1944 }
1945
1946 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
1947 {
1948 struct ath_softc *sc = hw->priv;
1949 struct ath_hw *ah = sc->sc_ah;
1950
1951 if (ah->caps.rx_chainmask != 1)
1952 rx_ant |= tx_ant;
1953
1954 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
1955 return -EINVAL;
1956
1957 sc->ant_rx = rx_ant;
1958 sc->ant_tx = tx_ant;
1959
1960 if (ah->caps.rx_chainmask == 1)
1961 return 0;
1962
1963 /* AR9100 runs into calibration issues if not all rx chains are enabled */
1964 if (AR_SREV_9100(ah))
1965 ah->rxchainmask = 0x7;
1966 else
1967 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
1968
1969 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
1970 ath9k_reload_chainmask_settings(sc);
1971
1972 return 0;
1973 }
1974
1975 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
1976 {
1977 struct ath_softc *sc = hw->priv;
1978
1979 *tx_ant = sc->ant_tx;
1980 *rx_ant = sc->ant_rx;
1981 return 0;
1982 }
1983
1984 #ifdef CONFIG_PM_SLEEP
1985
1986 static void ath9k_wow_map_triggers(struct ath_softc *sc,
1987 struct cfg80211_wowlan *wowlan,
1988 u32 *wow_triggers)
1989 {
1990 if (wowlan->disconnect)
1991 *wow_triggers |= AH_WOW_LINK_CHANGE |
1992 AH_WOW_BEACON_MISS;
1993 if (wowlan->magic_pkt)
1994 *wow_triggers |= AH_WOW_MAGIC_PATTERN_EN;
1995
1996 if (wowlan->n_patterns)
1997 *wow_triggers |= AH_WOW_USER_PATTERN_EN;
1998
1999 sc->wow_enabled = *wow_triggers;
2000
2001 }
2002
2003 static void ath9k_wow_add_disassoc_deauth_pattern(struct ath_softc *sc)
2004 {
2005 struct ath_hw *ah = sc->sc_ah;
2006 struct ath_common *common = ath9k_hw_common(ah);
2007 int pattern_count = 0;
2008 int i, byte_cnt;
2009 u8 dis_deauth_pattern[MAX_PATTERN_SIZE];
2010 u8 dis_deauth_mask[MAX_PATTERN_SIZE];
2011
2012 memset(dis_deauth_pattern, 0, MAX_PATTERN_SIZE);
2013 memset(dis_deauth_mask, 0, MAX_PATTERN_SIZE);
2014
2015 /*
2016 * Create Dissassociate / Deauthenticate packet filter
2017 *
2018 * 2 bytes 2 byte 6 bytes 6 bytes 6 bytes
2019 * +--------------+----------+---------+--------+--------+----
2020 * + Frame Control+ Duration + DA + SA + BSSID +
2021 * +--------------+----------+---------+--------+--------+----
2022 *
2023 * The above is the management frame format for disassociate/
2024 * deauthenticate pattern, from this we need to match the first byte
2025 * of 'Frame Control' and DA, SA, and BSSID fields
2026 * (skipping 2nd byte of FC and Duration feild.
2027 *
2028 * Disassociate pattern
2029 * --------------------
2030 * Frame control = 00 00 1010
2031 * DA, SA, BSSID = x:x:x:x:x:x
2032 * Pattern will be A0000000 | x:x:x:x:x:x | x:x:x:x:x:x
2033 * | x:x:x:x:x:x -- 22 bytes
2034 *
2035 * Deauthenticate pattern
2036 * ----------------------
2037 * Frame control = 00 00 1100
2038 * DA, SA, BSSID = x:x:x:x:x:x
2039 * Pattern will be C0000000 | x:x:x:x:x:x | x:x:x:x:x:x
2040 * | x:x:x:x:x:x -- 22 bytes
2041 */
2042
2043 /* Create Disassociate Pattern first */
2044
2045 byte_cnt = 0;
2046
2047 /* Fill out the mask with all FF's */
2048
2049 for (i = 0; i < MAX_PATTERN_MASK_SIZE; i++)
2050 dis_deauth_mask[i] = 0xff;
2051
2052 /* copy the first byte of frame control field */
2053 dis_deauth_pattern[byte_cnt] = 0xa0;
2054 byte_cnt++;
2055
2056 /* skip 2nd byte of frame control and Duration field */
2057 byte_cnt += 3;
2058
2059 /*
2060 * need not match the destination mac address, it can be a broadcast
2061 * mac address or an unicast to this station
2062 */
2063 byte_cnt += 6;
2064
2065 /* copy the source mac address */
2066 memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
2067
2068 byte_cnt += 6;
2069
2070 /* copy the bssid, its same as the source mac address */
2071
2072 memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
2073
2074 /* Create Disassociate pattern mask */
2075
2076 dis_deauth_mask[0] = 0xfe;
2077 dis_deauth_mask[1] = 0x03;
2078 dis_deauth_mask[2] = 0xc0;
2079
2080 ath_dbg(common, WOW, "Adding disassoc/deauth patterns for WoW\n");
2081
2082 ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
2083 pattern_count, byte_cnt);
2084
2085 pattern_count++;
2086 /*
2087 * for de-authenticate pattern, only the first byte of the frame
2088 * control field gets changed from 0xA0 to 0xC0
2089 */
2090 dis_deauth_pattern[0] = 0xC0;
2091
2092 ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
2093 pattern_count, byte_cnt);
2094
2095 }
2096
2097 static void ath9k_wow_add_pattern(struct ath_softc *sc,
2098 struct cfg80211_wowlan *wowlan)
2099 {
2100 struct ath_hw *ah = sc->sc_ah;
2101 struct ath9k_wow_pattern *wow_pattern = NULL;
2102 struct cfg80211_pkt_pattern *patterns = wowlan->patterns;
2103 int mask_len;
2104 s8 i = 0;
2105
2106 if (!wowlan->n_patterns)
2107 return;
2108
2109 /*
2110 * Add the new user configured patterns
2111 */
2112 for (i = 0; i < wowlan->n_patterns; i++) {
2113
2114 wow_pattern = kzalloc(sizeof(*wow_pattern), GFP_KERNEL);
2115
2116 if (!wow_pattern)
2117 return;
2118
2119 /*
2120 * TODO: convert the generic user space pattern to
2121 * appropriate chip specific/802.11 pattern.
2122 */
2123
2124 mask_len = DIV_ROUND_UP(wowlan->patterns[i].pattern_len, 8);
2125 memset(wow_pattern->pattern_bytes, 0, MAX_PATTERN_SIZE);
2126 memset(wow_pattern->mask_bytes, 0, MAX_PATTERN_SIZE);
2127 memcpy(wow_pattern->pattern_bytes, patterns[i].pattern,
2128 patterns[i].pattern_len);
2129 memcpy(wow_pattern->mask_bytes, patterns[i].mask, mask_len);
2130 wow_pattern->pattern_len = patterns[i].pattern_len;
2131
2132 /*
2133 * just need to take care of deauth and disssoc pattern,
2134 * make sure we don't overwrite them.
2135 */
2136
2137 ath9k_hw_wow_apply_pattern(ah, wow_pattern->pattern_bytes,
2138 wow_pattern->mask_bytes,
2139 i + 2,
2140 wow_pattern->pattern_len);
2141 kfree(wow_pattern);
2142
2143 }
2144
2145 }
2146
2147 static int ath9k_suspend(struct ieee80211_hw *hw,
2148 struct cfg80211_wowlan *wowlan)
2149 {
2150 struct ath_softc *sc = hw->priv;
2151 struct ath_hw *ah = sc->sc_ah;
2152 struct ath_common *common = ath9k_hw_common(ah);
2153 u32 wow_triggers_enabled = 0;
2154 int ret = 0;
2155
2156 mutex_lock(&sc->mutex);
2157
2158 ath_cancel_work(sc);
2159 ath_stop_ani(sc);
2160 del_timer_sync(&sc->rx_poll_timer);
2161
2162 if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
2163 ath_dbg(common, ANY, "Device not present\n");
2164 ret = -EINVAL;
2165 goto fail_wow;
2166 }
2167
2168 if (WARN_ON(!wowlan)) {
2169 ath_dbg(common, WOW, "None of the WoW triggers enabled\n");
2170 ret = -EINVAL;
2171 goto fail_wow;
2172 }
2173
2174 if (!device_can_wakeup(sc->dev)) {
2175 ath_dbg(common, WOW, "device_can_wakeup failed, WoW is not enabled\n");
2176 ret = 1;
2177 goto fail_wow;
2178 }
2179
2180 /*
2181 * none of the sta vifs are associated
2182 * and we are not currently handling multivif
2183 * cases, for instance we have to seperately
2184 * configure 'keep alive frame' for each
2185 * STA.
2186 */
2187
2188 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
2189 ath_dbg(common, WOW, "None of the STA vifs are associated\n");
2190 ret = 1;
2191 goto fail_wow;
2192 }
2193
2194 if (sc->nvifs > 1) {
2195 ath_dbg(common, WOW, "WoW for multivif is not yet supported\n");
2196 ret = 1;
2197 goto fail_wow;
2198 }
2199
2200 ath9k_wow_map_triggers(sc, wowlan, &wow_triggers_enabled);
2201
2202 ath_dbg(common, WOW, "WoW triggers enabled 0x%x\n",
2203 wow_triggers_enabled);
2204
2205 ath9k_ps_wakeup(sc);
2206
2207 ath9k_stop_btcoex(sc);
2208
2209 /*
2210 * Enable wake up on recieving disassoc/deauth
2211 * frame by default.
2212 */
2213 ath9k_wow_add_disassoc_deauth_pattern(sc);
2214
2215 if (wow_triggers_enabled & AH_WOW_USER_PATTERN_EN)
2216 ath9k_wow_add_pattern(sc, wowlan);
2217
2218 spin_lock_bh(&sc->sc_pcu_lock);
2219 /*
2220 * To avoid false wake, we enable beacon miss interrupt only
2221 * when we go to sleep. We save the current interrupt mask
2222 * so we can restore it after the system wakes up
2223 */
2224 sc->wow_intr_before_sleep = ah->imask;
2225 ah->imask &= ~ATH9K_INT_GLOBAL;
2226 ath9k_hw_disable_interrupts(ah);
2227 ah->imask = ATH9K_INT_BMISS | ATH9K_INT_GLOBAL;
2228 ath9k_hw_set_interrupts(ah);
2229 ath9k_hw_enable_interrupts(ah);
2230
2231 spin_unlock_bh(&sc->sc_pcu_lock);
2232
2233 /*
2234 * we can now sync irq and kill any running tasklets, since we already
2235 * disabled interrupts and not holding a spin lock
2236 */
2237 synchronize_irq(sc->irq);
2238 tasklet_kill(&sc->intr_tq);
2239
2240 ath9k_hw_wow_enable(ah, wow_triggers_enabled);
2241
2242 ath9k_ps_restore(sc);
2243 ath_dbg(common, ANY, "WoW enabled in ath9k\n");
2244 atomic_inc(&sc->wow_sleep_proc_intr);
2245
2246 fail_wow:
2247 mutex_unlock(&sc->mutex);
2248 return ret;
2249 }
2250
2251 static int ath9k_resume(struct ieee80211_hw *hw)
2252 {
2253 struct ath_softc *sc = hw->priv;
2254 struct ath_hw *ah = sc->sc_ah;
2255 struct ath_common *common = ath9k_hw_common(ah);
2256 u32 wow_status;
2257
2258 mutex_lock(&sc->mutex);
2259
2260 ath9k_ps_wakeup(sc);
2261
2262 spin_lock_bh(&sc->sc_pcu_lock);
2263
2264 ath9k_hw_disable_interrupts(ah);
2265 ah->imask = sc->wow_intr_before_sleep;
2266 ath9k_hw_set_interrupts(ah);
2267 ath9k_hw_enable_interrupts(ah);
2268
2269 spin_unlock_bh(&sc->sc_pcu_lock);
2270
2271 wow_status = ath9k_hw_wow_wakeup(ah);
2272
2273 if (atomic_read(&sc->wow_got_bmiss_intr) == 0) {
2274 /*
2275 * some devices may not pick beacon miss
2276 * as the reason they woke up so we add
2277 * that here for that shortcoming.
2278 */
2279 wow_status |= AH_WOW_BEACON_MISS;
2280 atomic_dec(&sc->wow_got_bmiss_intr);
2281 ath_dbg(common, ANY, "Beacon miss interrupt picked up during WoW sleep\n");
2282 }
2283
2284 atomic_dec(&sc->wow_sleep_proc_intr);
2285
2286 if (wow_status) {
2287 ath_dbg(common, ANY, "Waking up due to WoW triggers %s with WoW status = %x\n",
2288 ath9k_hw_wow_event_to_string(wow_status), wow_status);
2289 }
2290
2291 ath_restart_work(sc);
2292 ath9k_start_btcoex(sc);
2293
2294 ath9k_ps_restore(sc);
2295 mutex_unlock(&sc->mutex);
2296
2297 return 0;
2298 }
2299
2300 static void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
2301 {
2302 struct ath_softc *sc = hw->priv;
2303
2304 mutex_lock(&sc->mutex);
2305 device_init_wakeup(sc->dev, 1);
2306 device_set_wakeup_enable(sc->dev, enabled);
2307 mutex_unlock(&sc->mutex);
2308 }
2309
2310 #endif
2311 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2312 {
2313 struct ath_softc *sc = hw->priv;
2314 set_bit(SC_OP_SCANNING, &sc->sc_flags);
2315 }
2316
2317 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2318 {
2319 struct ath_softc *sc = hw->priv;
2320 clear_bit(SC_OP_SCANNING, &sc->sc_flags);
2321 }
2322
2323 static void ath9k_channel_switch_beacon(struct ieee80211_hw *hw,
2324 struct ieee80211_vif *vif,
2325 struct cfg80211_chan_def *chandef)
2326 {
2327 struct ath_softc *sc = hw->priv;
2328
2329 /* mac80211 does not support CSA in multi-if cases (yet) */
2330 if (WARN_ON(sc->csa_vif))
2331 return;
2332
2333 sc->csa_vif = vif;
2334 }
2335
2336 struct ieee80211_ops ath9k_ops = {
2337 .tx = ath9k_tx,
2338 .start = ath9k_start,
2339 .stop = ath9k_stop,
2340 .add_interface = ath9k_add_interface,
2341 .change_interface = ath9k_change_interface,
2342 .remove_interface = ath9k_remove_interface,
2343 .config = ath9k_config,
2344 .configure_filter = ath9k_configure_filter,
2345 .sta_add = ath9k_sta_add,
2346 .sta_remove = ath9k_sta_remove,
2347 .sta_notify = ath9k_sta_notify,
2348 .conf_tx = ath9k_conf_tx,
2349 .bss_info_changed = ath9k_bss_info_changed,
2350 .set_key = ath9k_set_key,
2351 .get_tsf = ath9k_get_tsf,
2352 .set_tsf = ath9k_set_tsf,
2353 .reset_tsf = ath9k_reset_tsf,
2354 .ampdu_action = ath9k_ampdu_action,
2355 .get_survey = ath9k_get_survey,
2356 .rfkill_poll = ath9k_rfkill_poll_state,
2357 .set_coverage_class = ath9k_set_coverage_class,
2358 .flush = ath9k_flush,
2359 .tx_frames_pending = ath9k_tx_frames_pending,
2360 .tx_last_beacon = ath9k_tx_last_beacon,
2361 .release_buffered_frames = ath9k_release_buffered_frames,
2362 .get_stats = ath9k_get_stats,
2363 .set_antenna = ath9k_set_antenna,
2364 .get_antenna = ath9k_get_antenna,
2365
2366 #ifdef CONFIG_PM_SLEEP
2367 .suspend = ath9k_suspend,
2368 .resume = ath9k_resume,
2369 .set_wakeup = ath9k_set_wakeup,
2370 #endif
2371
2372 #ifdef CONFIG_ATH9K_DEBUGFS
2373 .get_et_sset_count = ath9k_get_et_sset_count,
2374 .get_et_stats = ath9k_get_et_stats,
2375 .get_et_strings = ath9k_get_et_strings,
2376 #endif
2377
2378 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_DEBUGFS)
2379 .sta_add_debugfs = ath9k_sta_add_debugfs,
2380 #endif
2381 .sw_scan_start = ath9k_sw_scan_start,
2382 .sw_scan_complete = ath9k_sw_scan_complete,
2383 .channel_switch_beacon = ath9k_channel_switch_beacon,
2384 };
Linux with added FPC-III support