3 * Radio tuning for Philips SA2400 on RTL8180
5 * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
7 * Code from the BSD driver and the rtl8181 project have been
8 * very useful to understand certain things
10 * I want to thanks the Authors of such projects and the Ndiswrapper
13 * A special Big Thanks also is for all people who donated me cards,
14 * making possible the creation of the original rtl8180 driver
15 * from which this code is derived!
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
22 #include <linux/init.h>
23 #include <linux/pci.h>
24 #include <linux/delay.h>
25 #include <net/mac80211.h>
30 static const u32 sa2400_chan
[] = {
47 static void write_sa2400(struct ieee80211_hw
*dev
, u8 addr
, u32 data
)
49 struct rtl8180_priv
*priv
= dev
->priv
;
52 /* MAC will bang bits to the sa2400. sw 3-wire is NOT used */
53 phy_config
= 0xb0000000;
55 phy_config
|= ((u32
)(addr
& 0xf)) << 24;
56 phy_config
|= data
& 0xffffff;
58 rtl818x_iowrite32(priv
,
59 (__le32 __iomem
*) &priv
->map
->RFPinsOutput
, phy_config
);
64 static void sa2400_write_phy_antenna(struct ieee80211_hw
*dev
, short chan
)
66 struct rtl8180_priv
*priv
= dev
->priv
;
67 u8 ant
= SA2400_ANTENNA
;
69 if (priv
->rfparam
& RF_PARAM_ANTBDEFAULT
)
73 ant
|= BB_ANTATTEN_CHAN14
;
75 rtl8180_write_phy(dev
, 0x10, ant
);
79 static u8 sa2400_rf_rssi_map
[] = {
80 0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
81 0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
82 0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
83 0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
84 0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
85 0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
86 0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
87 0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
88 0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
89 0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02,
92 static u8
sa2400_rf_calc_rssi(u8 agc
, u8 sq
)
100 /* TODO: recalc sa2400_rf_rssi_map to avoid mult / div */
101 return 65 * sa2400_rf_rssi_map
[sq
] / 100;
104 static void sa2400_rf_set_channel(struct ieee80211_hw
*dev
,
105 struct ieee80211_conf
*conf
)
107 struct rtl8180_priv
*priv
= dev
->priv
;
109 ieee80211_frequency_to_channel(conf
->chandef
.chan
->center_freq
);
110 u32 txpw
= priv
->channels
[channel
- 1].hw_value
& 0xFF;
111 u32 chan
= sa2400_chan
[channel
- 1];
113 write_sa2400(dev
, 7, txpw
);
115 sa2400_write_phy_antenna(dev
, channel
);
117 write_sa2400(dev
, 0, chan
);
118 write_sa2400(dev
, 1, 0xbb50);
119 write_sa2400(dev
, 2, 0x80);
120 write_sa2400(dev
, 3, 0);
123 static void sa2400_rf_stop(struct ieee80211_hw
*dev
)
125 write_sa2400(dev
, 4, 0);
128 static void sa2400_rf_init(struct ieee80211_hw
*dev
)
130 struct rtl8180_priv
*priv
= dev
->priv
;
131 u32 anaparam
, txconf
;
133 int analogphy
= priv
->rfparam
& RF_PARAM_ANALOGPHY
;
135 anaparam
= priv
->anaparam
;
136 anaparam
&= ~(1 << ANAPARAM_TXDACOFF_SHIFT
);
137 anaparam
&= ~ANAPARAM_PWR1_MASK
;
138 anaparam
&= ~ANAPARAM_PWR0_MASK
;
141 anaparam
|= SA2400_ANA_ANAPARAM_PWR1_ON
<< ANAPARAM_PWR1_SHIFT
;
144 anaparam
|= (SA2400_DIG_ANAPARAM_PWR1_ON
<< ANAPARAM_PWR1_SHIFT
);
145 anaparam
|= (SA2400_ANAPARAM_PWR0_ON
<< ANAPARAM_PWR0_SHIFT
);
146 firdac
= 1 << SA2400_REG4_FIRDAC_SHIFT
;
149 rtl8180_set_anaparam(priv
, anaparam
);
151 write_sa2400(dev
, 0, sa2400_chan
[0]);
152 write_sa2400(dev
, 1, 0xbb50);
153 write_sa2400(dev
, 2, 0x80);
154 write_sa2400(dev
, 3, 0);
155 write_sa2400(dev
, 4, 0x19340 | firdac
);
156 write_sa2400(dev
, 5, 0x1dfb | (SA2400_MAX_SENS
- 54) << 15);
157 write_sa2400(dev
, 4, 0x19348 | firdac
); /* calibrate VCO */
160 write_sa2400(dev
, 4, 0x1938c); /*???*/
162 write_sa2400(dev
, 4, 0x19340 | firdac
);
164 write_sa2400(dev
, 0, sa2400_chan
[0]);
165 write_sa2400(dev
, 1, 0xbb50);
166 write_sa2400(dev
, 2, 0x80);
167 write_sa2400(dev
, 3, 0);
168 write_sa2400(dev
, 4, 0x19344 | firdac
); /* calibrate filter */
170 /* new from rtl8180 embedded driver (rtl8181 project) */
171 write_sa2400(dev
, 6, 0x13ff | (1 << 23)); /* MANRX */
172 write_sa2400(dev
, 8, 0); /* VCO */
175 rtl8180_set_anaparam(priv
, anaparam
|
176 (1 << ANAPARAM_TXDACOFF_SHIFT
));
178 txconf
= rtl818x_ioread32(priv
, &priv
->map
->TX_CONF
);
179 rtl818x_iowrite32(priv
, &priv
->map
->TX_CONF
,
180 txconf
| RTL818X_TX_CONF_LOOPBACK_CONT
);
182 write_sa2400(dev
, 4, 0x19341); /* calibrates DC */
184 /* a 5us sleep is required here,
185 * we rely on the 3ms delay introduced in write_sa2400 */
186 write_sa2400(dev
, 4, 0x19345);
188 /* a 20us sleep is required here,
189 * we rely on the 3ms delay introduced in write_sa2400 */
191 rtl818x_iowrite32(priv
, &priv
->map
->TX_CONF
, txconf
);
193 rtl8180_set_anaparam(priv
, anaparam
);
197 write_sa2400(dev
, 4, 0x19341 | firdac
); /* RTX MODE */
199 /* baseband configuration */
200 rtl8180_write_phy(dev
, 0, 0x98);
201 rtl8180_write_phy(dev
, 3, 0x38);
202 rtl8180_write_phy(dev
, 4, 0xe0);
203 rtl8180_write_phy(dev
, 5, 0x90);
204 rtl8180_write_phy(dev
, 6, 0x1a);
205 rtl8180_write_phy(dev
, 7, 0x64);
207 sa2400_write_phy_antenna(dev
, 1);
209 rtl8180_write_phy(dev
, 0x11, 0x80);
211 if (rtl818x_ioread8(priv
, &priv
->map
->CONFIG2
) &
212 RTL818X_CONFIG2_ANTENNA_DIV
)
213 rtl8180_write_phy(dev
, 0x12, 0xc7); /* enable ant diversity */
215 rtl8180_write_phy(dev
, 0x12, 0x47); /* disable ant diversity */
217 rtl8180_write_phy(dev
, 0x13, 0x90 | priv
->csthreshold
);
219 rtl8180_write_phy(dev
, 0x19, 0x0);
220 rtl8180_write_phy(dev
, 0x1a, 0xa0);
223 const struct rtl818x_rf_ops sa2400_rf_ops
= {
225 .init
= sa2400_rf_init
,
226 .stop
= sa2400_rf_stop
,
227 .set_chan
= sa2400_rf_set_channel
,
228 .calc_rssi
= sa2400_rf_calc_rssi
,