arch/arm/boot/dts/am335x-wega.dtsi

   1 /*
   2  * Copyright (C) 2015 Phytec Messtechnik GmbH
   3  * Author: Teresa Remmet <t.remmet@phytec.de>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  */
   9
  10 / {
  11         model = "Phytec AM335x phyBOARD-WEGA";
  12         compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx";
  13
  14         regulators {
  15                 compatible = "simple-bus";
  16
  17                 vcc3v3: fixedregulator@1 {
  18                         compatible = "regulator-fixed";
  19                         regulator-name = "vcc3v3";
  20                         regulator-min-microvolt = <3300000>;
  21                         regulator-max-microvolt = <3300000>;
  22                         regulator-boot-on;
  23                 };
  24         };
  25 };
  26
  27 /* CAN Busses */
  28 &am33xx_pinmux {
  29         dcan1_pins: pinmux_dcan1 {
  30                 pinctrl-single,pins = <
  31                         0x168 (PIN_OUTPUT_PULLUP | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
  32                         0x16c (PIN_INPUT_PULLUP | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
  33                 >;
  34         };
  35 };
  36
  37 &dcan1 {
  38         pinctrl-names = "default";
  39         pinctrl-0 = <&dcan1_pins>;
  40         status = "okay";
  41 };
  42
  43 /* Ethernet */
  44 &am33xx_pinmux {
  45         ethernet1_pins: pinmux_ethernet1 {
  46                 pinctrl-single,pins = <
  47                         0x40 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_a0.mii2_txen */
  48                         0x44 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a1.mii2_rxdv */
  49                         0x48 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_a2.mii2_txd3 */
  50                         0x4c (PIN_OUTPUT | MUX_MODE1)           /* gpmc_a3.mii2_txd2 */
  51                         0x50 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_a4.mii2_txd1 */
  52                         0x54 (PIN_OUTPUT | MUX_MODE1)           /* gpmc_a5.mii2_txd0 */
  53                         0x58 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a6.mii2_txclk */
  54                         0x5c (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a7.mii2_rxclk */
  55                         0x60 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a8.mii2_rxd3 */
  56                         0x64 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a9.mii2_rxd2 */
  57                         0x68 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a10.mii2_rxd1 */
  58                         0x6c (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_a11.mii2_rxd0 */
  59                         0x74 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_wpn.mii2_rxerr */
  60                         0x78 (PIN_INPUT_PULLDOWN | MUX_MODE1)   /* gpmc_ben1.mii2_col */
  61                 >;
  62         };
  63 };
  64
  65 &cpsw_emac1 {
  66         phy_id = <&davinci_mdio>, <1>;
  67         phy-mode = "mii";
  68         dual_emac_res_vlan = <2>;
  69 };
  70
  71 &mac {
  72         slaves = <2>;
  73         pinctrl-names = "default";
  74         pinctrl-0 = <&ethernet0_pins &ethernet1_pins>;
  75         dual_emac = <1>;
  76 };
  77
  78 /* MMC */
  79 &am33xx_pinmux {
  80         mmc1_pins: pinmux_mmc1 {
  81                 pinctrl-single,pins = <
  82                         0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat3.mmc0_dat3 */
  83                         0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat2.mmc0_dat2 */
  84                         0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat1.mmc0_dat1 */
  85                         0x0FC (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_dat0.mmc0_dat0 */
  86                         0x100 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_clk.mmc0_clk */
  87                         0x104 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_cmd.mmc0_cmd */
  88                         0x160 (PIN_INPUT_PULLUP | MUX_MODE7)    /* spi0_cs1.mmc0_sdcd */
  89                 >;
  90         };
  91 };
  92
  93 &mmc1 {
  94         vmmc-supply = <&vcc3v3>;
  95         bus-width = <4>;
  96         pinctrl-names = "default";
  97         pinctrl-0 = <&mmc1_pins>;
  98         cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
  99         status = "okay";
 100 };
 101
 102 /* UARTs */
 103 &am33xx_pinmux {
 104         uart0_pins: pinmux_uart0 {
 105                 pinctrl-single,pins = <
 106                         0x170 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
 107                         0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
 108                 >;
 109         };
 110
 111         uart1_pins: pinmux_uart1_pins {
 112                 pinctrl-single,pins = <
 113                         0x180 (PIN_INPUT_PULLUP | MUX_MODE0)    /* uart1_rxd.uart1_rxd */
 114                         0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
 115                         0x178 (PIN_INPUT | MUX_MODE0)           /* uart1_ctsn.uart1_ctsn */
 116                         0x17c (PIN_OUTPUT_PULLDOWN | MUX_MODE0)         /* uart1_rtsn.uart1_rtsn */
 117                 >;
 118         };
 119 };
 120
 121 &uart0 {
 122         pinctrl-names = "default";
 123         pinctrl-0 = <&uart0_pins>;
 124         status = "okay";
 125 };
 126
 127 &uart1 {
 128         pinctrl-names = "default";
 129         pinctrl-0 = <&uart1_pins>;
 130         status = "okay";
 131 };
 132
 133 /* USB */
 134 &cppi41dma {
 135         status = "okay";
 136 };
 137
 138 &usb_ctrl_mod {
 139         status = "okay";
 140 };
 141
 142 &usb {
 143         status = "okay";
 144 };
 145
 146 &usb0 {
 147         dr_mode = "peripheral";
 148         status = "okay";
 149 };
 150
 151 &usb0_phy {
 152         status = "okay";
 153 };
 154
 155 &usb1 {
 156         dr_mode = "host";
 157         status = "okay";
 158 };
 159
 160 &usb1_phy {
 161         status = "okay";
 162 };