mm: hugetlb: fix hugepage memory leak caused by wrong reserve count
[linux/fpc-iii.git] / arch / arm / boot / dts / armada-388-db.dts
blobff47af57f091afd342eed3987a8c40ea404fca7c
1 /*
2  * Device Tree file for Marvell Armada 388 evaluation board
3  * (DB-88F6820)
4  *
5  *  Copyright (C) 2014 Marvell
6  *
7  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
8  *
9  * This file is dual-licensed: you can use it either under the terms
10  * of the GPL or the X11 license, at your option. Note that this dual
11  * licensing only applies to this file, and not this project as a
12  * whole.
13  *
14  *  a) This file is free software; you can redistribute it and/or
15  *     modify it under the terms of the GNU General Public License as
16  *     published by the Free Software Foundation; either version 2 of the
17  *     License, or (at your option) any later version.
18  *
19  *     This file is distributed in the hope that it will be useful
20  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
21  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
22  *     GNU General Public License for more details.
23  *
24  * Or, alternatively
25  *
26  *  b) Permission is hereby granted, free of charge, to any person
27  *     obtaining a copy of this software and associated documentation
28  *     files (the "Software"), to deal in the Software without
29  *     restriction, including without limitation the rights to use
30  *     copy, modify, merge, publish, distribute, sublicense, and/or
31  *     sell copies of the Software, and to permit persons to whom the
32  *     Software is furnished to do so, subject to the following
33  *     conditions:
34  *
35  *     The above copyright notice and this permission notice shall be
36  *     included in all copies or substantial portions of the Software.
37  *
38  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
39  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
43  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45  *     OTHER DEALINGS IN THE SOFTWARE.
46  */
48 /dts-v1/;
49 #include "armada-388.dtsi"
51 / {
52         model = "Marvell Armada 385 Development Board";
53         compatible = "marvell,a385-db", "marvell,armada388",
54                 "marvell,armada385", "marvell,armada380";
56         chosen {
57                 stdout-path = "serial0:115200n8";
58         };
60         memory {
61                 device_type = "memory";
62                 reg = <0x00000000 0x10000000>; /* 256 MB */
63         };
65         soc {
66                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
67                           MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
68                           MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
69                           MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
71                 internal-regs {
72                         spi@10600 {
73                                 status = "okay";
75                                 spi-flash@0 {
76                                         #address-cells = <1>;
77                                         #size-cells = <1>;
78                                         compatible = "w25q32", "jedec,spi-nor";
79                                         reg = <0>; /* Chip select 0 */
80                                         spi-max-frequency = <108000000>;
81                                 };
82                         };
84                         i2c@11000 {
85                                 status = "okay";
86                                 clock-frequency = <100000>;
87                         };
89                         i2c@11100 {
90                                 status = "okay";
91                                 clock-frequency = <100000>;
92                         };
94                         serial@12000 {
95                                 status = "okay";
96                         };
98                         ethernet@30000 {
99                                 status = "okay";
100                                 phy = <&phy1>;
101                                 phy-mode = "rgmii-id";
102                         };
104                         usb@58000 {
105                                 status = "ok";
106                         };
108                         ethernet@70000 {
109                                 status = "okay";
110                                 phy = <&phy0>;
111                                 phy-mode = "rgmii-id";
112                         };
114                         mdio@72004 {
115                                 phy0: ethernet-phy@0 {
116                                         reg = <0>;
117                                 };
119                                 phy1: ethernet-phy@1 {
120                                         reg = <1>;
121                                 };
122                         };
124                         sata@a8000 {
125                                 status = "okay";
126                         };
128                         sata@e0000 {
129                                 status = "okay";
130                         };
132                         flash@d0000 {
133                                 status = "okay";
134                                 num-cs = <1>;
135                                 marvell,nand-keep-config;
136                                 marvell,nand-enable-arbiter;
137                                 nand-on-flash-bbt;
138                                 nand-ecc-strength = <4>;
139                                 nand-ecc-step-size = <512>;
141                                 partition@0 {
142                                         label = "U-Boot";
143                                         reg = <0 0x800000>;
144                                 };
145                                 partition@800000 {
146                                         label = "Linux";
147                                         reg = <0x800000 0x800000>;
148                                 };
149                                 partition@1000000 {
150                                         label = "Filesystem";
151                                         reg = <0x1000000 0x3f000000>;
152                                 };
153                         };
155                         sdhci@d8000 {
156                                 broken-cd;
157                                 wp-inverted;
158                                 bus-width = <8>;
159                                 status = "okay";
160                                 no-1-8-v;
161                         };
163                         usb3@f0000 {
164                                 status = "okay";
165                         };
167                         usb3@f8000 {
168                                 status = "okay";
169                         };
170                 };
172                 pcie-controller {
173                         status = "okay";
174                         /*
175                          * The two PCIe units are accessible through
176                          * standard PCIe slots on the board.
177                          */
178                         pcie@1,0 {
179                                 /* Port 0, Lane 0 */
180                                 status = "okay";
181                         };
182                         pcie@2,0 {
183                                 /* Port 1, Lane 0 */
184                                 status = "okay";
185                         };
186                 };
187         };