| blob | ad6de73ed5a5fd2f6b1cd7c19e325d60c21537c9 |
1 /*
2 * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board
3 *
4 * Copyright (C) 2015 Atmel,
5 * 2015 Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * This file is dual-licensed: you can use it either under the terms
8 * of the GPL or the X11 license, at your option. Note that this dual
9 * licensing only applies to this file, and not this project as a
10 * whole.
11 *
12 * a) This file is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of the
15 * License, or (at your option) any later version.
16 *
17 * This file is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * Or, alternatively,
23 *
24 * b) Permission is hereby granted, free of charge, to any person
25 * obtaining a copy of this software and associated documentation
26 * files (the "Software"), to deal in the Software without
27 * restriction, including without limitation the rights to use,
28 * copy, modify, merge, publish, distribute, sublicense, and/or
29 * sell copies of the Software, and to permit persons to whom the
30 * Software is furnished to do so, subject to the following
31 * conditions:
32 *
33 * The above copyright notice and this permission notice shall be
34 * included in all copies or substantial portions of the Software.
35 *
36 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43 * OTHER DEALINGS IN THE SOFTWARE.
44 */
45 /dts-v1/;
46 #include "sama5d2.dtsi"
47 #include "sama5d2-pinfunc.h"
48 #include <dt-bindings/mfd/atmel-flexcom.h>
50 / {
51 model = "Atmel SAMA5D2 Xplained";
52 compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
54 chosen {
55 stdout-path = "serial0:115200n8";
56 };
58 memory {
59 reg = <0x20000000 0x80000>;
60 };
62 clocks {
63 slow_xtal {
64 clock-frequency = <32768>;
65 };
67 main_xtal {
68 clock-frequency = <12000000>;
69 };
70 };
72 ahb {
73 usb0: gadget@00300000 {
74 status = "okay";
75 };
77 usb1: ohci@00400000 {
78 num-ports = <3>;
79 status = "okay";
80 };
82 usb2: ehci@00500000 {
83 status = "okay";
84 };
86 sdmmc0: sdio-host@a0000000 {
87 bus-width = <8>;
88 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_sdmmc0_default>;
90 non-removable;
91 mmc-ddr-1_8v;
92 status = "okay";
93 };
95 sdmmc1: sdio-host@b0000000 {
96 bus-width = <4>;
97 pinctrl-names = "default";
98 pinctrl-0 = <&pinctrl_sdmmc1_default>;
99 status = "okay"; /* conflict with qspi0 */
100 };
102 apb {
103 spi0: spi@f8000000 {
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_spi0_default>;
106 status = "okay";
108 m25p80@0 {
109 compatible = "atmel,at25df321a";
110 reg = <0>;
111 spi-max-frequency = <50000000>;
112 };
113 };
115 macb0: ethernet@f8008000 {
116 pinctrl-names = "default";
117 pinctrl-0 = <&pinctrl_macb0_default>;
118 phy-mode = "rmii";
119 status = "okay";
120 };
122 uart1: serial@f8020000 {
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_uart1_default>;
125 status = "okay";
126 };
128 i2c0: i2c@f8028000 {
129 dmas = <0>, <0>;
130 pinctrl-names = "default";
131 pinctrl-0 = <&pinctrl_i2c0_default>;
132 status = "okay";
134 pmic: act8865@5b {
135 compatible = "active-semi,act8865";
136 reg = <0x5b>;
137 active-semi,vsel-high;
138 status = "okay";
140 regulators {
141 vdd_1v35_reg: DCDC_REG1 {
142 regulator-name = "VDD_1V35";
143 regulator-min-microvolt = <1350000>;
144 regulator-max-microvolt = <1350000>;
145 regulator-always-on;
146 };
148 vdd_1v2_reg: DCDC_REG2 {
149 regulator-name = "VDD_1V2";
150 regulator-min-microvolt = <1100000>;
151 regulator-max-microvolt = <1300000>;
152 regulator-always-on;
153 };
155 vdd_3v3_reg: DCDC_REG3 {
156 regulator-name = "VDD_3V3";
157 regulator-min-microvolt = <3300000>;
158 regulator-max-microvolt = <3300000>;
159 regulator-always-on;
160 };
162 vdd_fuse_reg: LDO_REG1 {
163 regulator-name = "VDD_FUSE";
164 regulator-min-microvolt = <2500000>;
165 regulator-max-microvolt = <2500000>;
166 regulator-always-on;
167 };
169 vdd_3v3_lp_reg: LDO_REG2 {
170 regulator-name = "VDD_3V3_LP";
171 regulator-min-microvolt = <3300000>;
172 regulator-max-microvolt = <3300000>;
173 regulator-always-on;
174 };
176 vdd_led_reg: LDO_REG3 {
177 regulator-name = "VDD_LED";
178 regulator-min-microvolt = <3300000>;
179 regulator-max-microvolt = <3300000>;
180 regulator-always-on;
181 };
183 vdd_sdhc_1v8_reg: LDO_REG4 {
184 regulator-name = "VDD_SDHC_1V8";
185 regulator-min-microvolt = <1800000>;
186 regulator-max-microvolt = <1800000>;
187 };
188 };
189 };
190 };
192 flx0: flexcom@f8034000 {
193 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
194 status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
196 uart5: serial@200 {
197 compatible = "atmel,at91sam9260-usart";
198 reg = <0x200 0x200>;
199 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
200 clocks = <&flx0_clk>;
201 clock-names = "usart";
202 pinctrl-names = "default";
203 pinctrl-0 = <&pinctrl_flx0_default>;
204 atmel,fifo-size = <32>;
205 status = "okay";
206 };
207 };
209 uart3: serial@fc008000 {
210 pinctrl-names = "default";
211 pinctrl-0 = <&pinctrl_uart3_default>;
212 status = "okay";
213 };
215 flx4: flexcom@fc018000 {
216 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
217 status = "okay";
219 i2c2: i2c@600 {
220 compatible = "atmel,sama5d2-i2c";
221 reg = <0x600 0x200>;
222 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
223 dmas = <0>, <0>;
224 dma-names = "tx", "rx";
225 #address-cells = <1>;
226 #size-cells = <0>;
227 clocks = <&flx4_clk>;
228 pinctrl-names = "default";
229 pinctrl-0 = <&pinctrl_flx4_default>;
230 atmel,fifo-size = <16>;
231 status = "okay";
232 };
233 };
235 i2c1: i2c@fc028000 {
236 dmas = <0>, <0>;
237 pinctrl-names = "default";
238 pinctrl-0 = <&pinctrl_i2c1_default>;
239 status = "okay";
241 at24@54 {
242 compatible = "atmel,24c02";
243 reg = <0x54>;
244 pagesize = <16>;
245 };
246 };
248 pinctrl@fc038000 {
249 pinctrl_flx0_default: flx0_default {
250 pinmux = <PIN_PB28__FLEXCOM0_IO0>,
251 <PIN_PB29__FLEXCOM0_IO1>;
252 bias-disable;
253 };
255 pinctrl_flx4_default: flx4_default {
256 pinmux = <PIN_PD12__FLEXCOM4_IO0>,
257 <PIN_PD13__FLEXCOM4_IO1>;
258 bias-disable;
259 };
261 pinctrl_i2c0_default: i2c0_default {
262 pinmux = <PIN_PD21__TWD0>,
263 <PIN_PD22__TWCK0>;
264 bias-disable;
265 };
267 pinctrl_i2c1_default: i2c1_default {
268 pinmux = <PIN_PD4__TWD1>,
269 <PIN_PD5__TWCK1>;
270 bias-disable;
271 };
273 pinctrl_macb0_default: macb0_default {
274 pinmux = <PIN_PB14__GTXCK>,
275 <PIN_PB15__GTXEN>,
276 <PIN_PB16__GRXDV>,
277 <PIN_PB17__GRXER>,
278 <PIN_PB18__GRX0>,
279 <PIN_PB19__GRX1>,
280 <PIN_PB20__GTX0>,
281 <PIN_PB21__GTX1>,
282 <PIN_PB22__GMDC>,
283 <PIN_PB23__GMDIO>;
284 bias-disable;
285 };
287 pinctrl_sdmmc0_default: sdmmc0_default {
288 cmd_data {
289 pinmux = <PIN_PA1__SDMMC0_CMD>,
290 <PIN_PA2__SDMMC0_DAT0>,
291 <PIN_PA3__SDMMC0_DAT1>,
292 <PIN_PA4__SDMMC0_DAT2>,
293 <PIN_PA5__SDMMC0_DAT3>,
294 <PIN_PA6__SDMMC0_DAT4>,
295 <PIN_PA7__SDMMC0_DAT5>,
296 <PIN_PA8__SDMMC0_DAT6>,
297 <PIN_PA9__SDMMC0_DAT7>;
298 bias-pull-up;
299 };
301 ck_cd_rstn_vddsel {
302 pinmux = <PIN_PA0__SDMMC0_CK>,
303 <PIN_PA10__SDMMC0_RSTN>,
304 <PIN_PA11__SDMMC0_VDDSEL>,
305 <PIN_PA13__SDMMC0_CD>;
306 bias-disable;
307 };
308 };
310 pinctrl_sdmmc1_default: sdmmc1_default {
311 cmd_data {
312 pinmux = <PIN_PA28__SDMMC1_CMD>,
313 <PIN_PA18__SDMMC1_DAT0>,
314 <PIN_PA19__SDMMC1_DAT1>,
315 <PIN_PA20__SDMMC1_DAT2>,
316 <PIN_PA21__SDMMC1_DAT3>;
317 bias-pull-up;
318 };
320 conf-ck_cd {
321 pinmux = <PIN_PA22__SDMMC1_CK>,
322 <PIN_PA30__SDMMC1_CD>;
323 bias-disable;
324 };
325 };
327 pinctrl_spi0_default: spi0_default {
328 pinmux = <PIN_PA14__SPI0_SPCK>,
329 <PIN_PA15__SPI0_MOSI>,
330 <PIN_PA16__SPI0_MISO>,
331 <PIN_PA17__SPI0_NPCS0>;
332 bias-disable;
333 };
335 pinctrl_uart1_default: uart1_default {
336 pinmux = <PIN_PD2__URXD1>,
337 <PIN_PD3__UTXD1>;
338 bias-disable;
339 };
341 pinctrl_uart3_default: uart3_default {
342 pinmux = <PIN_PB11__URXD3>,
343 <PIN_PB12__UTXD3>;
344 bias-disable;
345 };
346 };
347 };
348 };
349 };