2 * Copyright (C) 2014 Broadcom Corporation
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
17 #include "dt-bindings/clock/bcm21664.h"
19 #include "skeleton.dtsi"
22 model = "BCM21664 SoC";
23 compatible = "brcm,bcm21664";
24 interrupt-parent = <&gic>;
27 bootargs = "console=ttyS0,115200n8";
33 enable-method = "brcm,bcm11351-cpu-method";
34 secondary-boot-reg = <0x35004178>;
38 compatible = "arm,cortex-a9";
44 compatible = "arm,cortex-a9";
49 gic: interrupt-controller@3ff00100 {
50 compatible = "arm,cortex-a9-gic";
51 #interrupt-cells = <3>;
54 reg = <0x3ff01000 0x1000>,
59 compatible = "brcm,bcm21664-smc", "brcm,kona-smc";
60 reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
64 compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
66 reg = <0x3e000000 0x118>;
67 clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
68 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
74 compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
76 reg = <0x3e001000 0x118>;
77 clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
78 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
84 compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
86 reg = <0x3e002000 0x118>;
87 clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
88 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
94 compatible = "arm,pl310-cache";
95 reg = <0x3ff20000 0x1000>;
100 brcm,resetmgr@35001f00 {
101 compatible = "brcm,bcm21664-resetmgr";
102 reg = <0x35001f00 0x24>;
106 compatible = "brcm,kona-timer";
107 reg = <0x35006000 0x1c>;
108 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
109 clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>;
112 gpio: gpio@35003000 {
113 compatible = "brcm,bcm21664-gpio", "brcm,kona-gpio";
114 reg = <0x35003000 0x524>;
116 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
117 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
118 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
119 GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
121 #interrupt-cells = <2>;
123 interrupt-controller;
126 sdio1: sdio@3f180000 {
127 compatible = "brcm,kona-sdhci";
128 reg = <0x3f180000 0x801c>;
129 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
130 clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>;
134 sdio2: sdio@3f190000 {
135 compatible = "brcm,kona-sdhci";
136 reg = <0x3f190000 0x801c>;
137 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
138 clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>;
142 sdio3: sdio@3f1a0000 {
143 compatible = "brcm,kona-sdhci";
144 reg = <0x3f1a0000 0x801c>;
145 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
146 clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>;
150 sdio4: sdio@3f1b0000 {
151 compatible = "brcm,kona-sdhci";
152 reg = <0x3f1b0000 0x801c>;
153 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
154 clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>;
159 compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
160 reg = <0x3e016000 0x70>;
161 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
162 #address-cells = <1>;
164 clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>;
169 compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
170 reg = <0x3e017000 0x70>;
171 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
172 #address-cells = <1>;
174 clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>;
179 compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
180 reg = <0x3e018000 0x70>;
181 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
182 #address-cells = <1>;
184 clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>;
189 compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
190 reg = <0x3e01c000 0x70>;
191 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
192 #address-cells = <1>;
194 clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>;
199 #address-cells = <1>;
204 * Fixed clocks are defined before CCUs whose
205 * clocks may depend on them.
208 ref_32k_clk: ref_32k {
210 compatible = "fixed-clock";
211 clock-frequency = <32768>;
214 bbl_32k_clk: bbl_32k {
216 compatible = "fixed-clock";
217 clock-frequency = <32768>;
220 ref_13m_clk: ref_13m {
222 compatible = "fixed-clock";
223 clock-frequency = <13000000>;
226 var_13m_clk: var_13m {
228 compatible = "fixed-clock";
229 clock-frequency = <13000000>;
232 dft_19_5m_clk: dft_19_5m {
234 compatible = "fixed-clock";
235 clock-frequency = <19500000>;
238 ref_crystal_clk: ref_crystal {
240 compatible = "fixed-clock";
241 clock-frequency = <26000000>;
244 ref_52m_clk: ref_52m {
246 compatible = "fixed-clock";
247 clock-frequency = <52000000>;
250 var_52m_clk: var_52m {
252 compatible = "fixed-clock";
253 clock-frequency = <52000000>;
256 usb_otg_ahb_clk: usb_otg_ahb {
258 compatible = "fixed-clock";
259 clock-frequency = <52000000>;
262 ref_96m_clk: ref_96m {
264 compatible = "fixed-clock";
265 clock-frequency = <96000000>;
268 var_96m_clk: var_96m {
270 compatible = "fixed-clock";
271 clock-frequency = <96000000>;
274 ref_104m_clk: ref_104m {
276 compatible = "fixed-clock";
277 clock-frequency = <104000000>;
280 var_104m_clk: var_104m {
282 compatible = "fixed-clock";
283 clock-frequency = <104000000>;
286 ref_156m_clk: ref_156m {
288 compatible = "fixed-clock";
289 clock-frequency = <156000000>;
292 var_156m_clk: var_156m {
294 compatible = "fixed-clock";
295 clock-frequency = <156000000>;
299 compatible = BCM21664_DT_ROOT_CCU_COMPAT;
300 reg = <0x35001000 0x0f00>;
302 clock-output-names = "frac_1m";
306 compatible = BCM21664_DT_AON_CCU_COMPAT;
307 reg = <0x35002000 0x0f00>;
309 clock-output-names = "hub_timer";
312 master_ccu: master_ccu {
313 compatible = BCM21664_DT_MASTER_CCU_COMPAT;
314 reg = <0x3f001000 0x0f00>;
316 clock-output-names = "sdio1",
326 slave_ccu: slave_ccu {
327 compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
328 reg = <0x3e011000 0x0f00>;
330 clock-output-names = "uartb",
340 usbotg: usb@3f120000 {
341 compatible = "snps,dwc2";
342 reg = <0x3f120000 0x10000>;
343 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
344 clocks = <&usb_otg_ahb_clk>;
347 phy-names = "usb2-phy";
351 usbphy: usb-phy@3f130000 {
352 compatible = "brcm,kona-usb2-phy";
353 reg = <0x3f130000 0x28>;