| blob | 3c99cfa1a8761604a409b9d0525f143c494571b0 |
1 /*
2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
5 */
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/omap.h>
10 #include "skeleton.dtsi"
12 / {
13 compatible = "ti,dm816";
14 interrupt-parent = <&intc>;
16 aliases {
17 i2c0 = &i2c1;
18 i2c1 = &i2c2;
19 serial0 = &uart1;
20 serial1 = &uart2;
21 serial2 = &uart3;
22 ethernet0 = ð0;
23 ethernet1 = ð1;
24 };
26 cpus {
27 #address-cells = <1>;
28 #size-cells = <0>;
29 cpu@0 {
30 compatible = "arm,cortex-a8";
31 device_type = "cpu";
32 reg = <0>;
33 };
34 };
36 pmu {
37 compatible = "arm,cortex-a8-pmu";
38 interrupts = <3>;
39 };
41 /*
42 * The soc node represents the soc top level view. It is used for IPs
43 * that are not memory mapped in the MPU view or for the MPU itself.
44 */
45 soc {
46 compatible = "ti,omap-infra";
47 mpu {
48 compatible = "ti,omap3-mpu";
49 ti,hwmods = "mpu";
50 };
51 };
53 /*
54 * XXX: Use a flat representation of the dm816x interconnect.
55 * The real dm816x interconnect network is quite complex. Since
56 * it will not bring real advantage to represent that in DT
57 * for the moment, just use a fake OCP bus entry to represent
58 * the whole bus hierarchy.
59 */
60 ocp {
61 compatible = "simple-bus";
62 reg = <0x44000000 0x10000>;
63 interrupts = <9 10>;
64 #address-cells = <1>;
65 #size-cells = <1>;
66 ranges;
67 ti,hwmods = "l3_main";
69 prcm: prcm@48180000 {
70 compatible = "ti,dm816-prcm";
71 reg = <0x48180000 0x4000>;
73 prcm_clocks: clocks {
74 #address-cells = <1>;
75 #size-cells = <0>;
76 };
78 prcm_clockdomains: clockdomains {
79 };
80 };
82 scrm: scrm@48140000 {
83 compatible = "ti,dm816-scrm", "simple-bus";
84 reg = <0x48140000 0x21000>;
85 #address-cells = <1>;
86 #size-cells = <1>;
87 ranges = <0 0x48140000 0x21000>;
89 dm816x_pinmux: pinmux@800 {
90 compatible = "pinctrl-single";
91 reg = <0x800 0x50a>;
92 #address-cells = <1>;
93 #size-cells = <0>;
94 pinctrl-single,register-width = <16>;
95 pinctrl-single,function-mask = <0xf>;
96 };
98 /* Device Configuration Registers */
99 scm_conf: syscon@600 {
100 compatible = "syscon", "simple-bus";
101 reg = <0x600 0x110>;
102 #address-cells = <1>;
103 #size-cells = <1>;
104 ranges = <0 0x600 0x110>;
106 usb_phy0: usb-phy@20 {
107 compatible = "ti,dm8168-usb-phy";
108 reg = <0x20 0x8>;
109 reg-names = "phy";
110 clocks = <&main_fapll 6>;
111 clock-names = "refclk";
112 #phy-cells = <0>;
113 syscon = <&scm_conf>;
114 };
116 usb_phy1: usb-phy@28 {
117 compatible = "ti,dm8168-usb-phy";
118 reg = <0x28 0x8>;
119 reg-names = "phy";
120 clocks = <&main_fapll 6>;
121 clock-names = "refclk";
122 #phy-cells = <0>;
123 syscon = <&scm_conf>;
124 };
125 };
127 scrm_clocks: clocks {
128 #address-cells = <1>;
129 #size-cells = <0>;
130 };
132 scrm_clockdomains: clockdomains {
133 };
134 };
136 edma: edma@49000000 {
137 compatible = "ti,edma3";
138 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
139 reg = <0x49000000 0x10000>,
140 <0x44e10f90 0x40>;
141 interrupts = <12 13 14>;
142 #dma-cells = <1>;
143 };
145 elm: elm@48080000 {
146 compatible = "ti,816-elm";
147 ti,hwmods = "elm";
148 reg = <0x48080000 0x2000>;
149 interrupts = <4>;
150 };
152 gpio1: gpio@48032000 {
153 compatible = "ti,omap4-gpio";
154 ti,hwmods = "gpio1";
155 ti,gpio-always-on;
156 reg = <0x48032000 0x1000>;
157 interrupts = <96>;
158 gpio-controller;
159 #gpio-cells = <2>;
160 interrupt-controller;
161 #interrupt-cells = <2>;
162 };
164 gpio2: gpio@4804c000 {
165 compatible = "ti,omap4-gpio";
166 ti,hwmods = "gpio2";
167 ti,gpio-always-on;
168 reg = <0x4804c000 0x1000>;
169 interrupts = <98>;
170 gpio-controller;
171 #gpio-cells = <2>;
172 interrupt-controller;
173 #interrupt-cells = <2>;
174 };
176 gpmc: gpmc@50000000 {
177 compatible = "ti,am3352-gpmc";
178 ti,hwmods = "gpmc";
179 reg = <0x50000000 0x2000>;
180 #address-cells = <2>;
181 #size-cells = <1>;
182 interrupts = <100>;
183 gpmc,num-cs = <6>;
184 gpmc,num-waitpins = <2>;
185 };
187 i2c1: i2c@48028000 {
188 compatible = "ti,omap4-i2c";
189 ti,hwmods = "i2c1";
190 reg = <0x48028000 0x1000>;
191 #address-cells = <1>;
192 #size-cells = <0>;
193 interrupts = <70>;
194 dmas = <&edma 58 &edma 59>;
195 dma-names = "tx", "rx";
196 };
198 i2c2: i2c@4802a000 {
199 compatible = "ti,omap4-i2c";
200 ti,hwmods = "i2c2";
201 reg = <0x4802a000 0x1000>;
202 #address-cells = <1>;
203 #size-cells = <0>;
204 interrupts = <71>;
205 dmas = <&edma 60 &edma 61>;
206 dma-names = "tx", "rx";
207 };
209 intc: interrupt-controller@48200000 {
210 compatible = "ti,dm816-intc";
211 interrupt-controller;
212 #interrupt-cells = <1>;
213 reg = <0x48200000 0x1000>;
214 };
216 mailbox: mailbox@480c8000 {
217 compatible = "ti,omap4-mailbox";
218 reg = <0x480c8000 0x2000>;
219 interrupts = <77>;
220 ti,hwmods = "mailbox";
221 ti,mbox-num-users = <4>;
222 ti,mbox-num-fifos = <12>;
223 mbox_dsp: mbox_dsp {
224 ti,mbox-tx = <3 0 0>;
225 ti,mbox-rx = <0 0 0>;
226 };
227 };
229 mdio: mdio@4a100800 {
230 compatible = "ti,davinci_mdio";
231 #address-cells = <1>;
232 #size-cells = <0>;
233 reg = <0x4a100800 0x100>;
234 ti,hwmods = "davinci_mdio";
235 bus_freq = <1000000>;
236 phy0: ethernet-phy@0 {
237 reg = <1>;
238 };
239 phy1: ethernet-phy@1 {
240 reg = <2>;
241 };
242 };
244 eth0: ethernet@4a100000 {
245 compatible = "ti,dm816-emac";
246 ti,hwmods = "emac0";
247 reg = <0x4a100000 0x800
248 0x4a100900 0x3700>;
249 clocks = <&sysclk24_ck>;
250 syscon = <&scm_conf>;
251 ti,davinci-ctrl-reg-offset = <0>;
252 ti,davinci-ctrl-mod-reg-offset = <0x900>;
253 ti,davinci-ctrl-ram-offset = <0x2000>;
254 ti,davinci-ctrl-ram-size = <0x2000>;
255 interrupts = <40 41 42 43>;
256 phy-handle = <&phy0>;
257 };
259 eth1: ethernet@4a120000 {
260 compatible = "ti,dm816-emac";
261 ti,hwmods = "emac1";
262 reg = <0x4a120000 0x4000>;
263 clocks = <&sysclk24_ck>;
264 syscon = <&scm_conf>;
265 ti,davinci-ctrl-reg-offset = <0>;
266 ti,davinci-ctrl-mod-reg-offset = <0x900>;
267 ti,davinci-ctrl-ram-offset = <0x2000>;
268 ti,davinci-ctrl-ram-size = <0x2000>;
269 interrupts = <44 45 46 47>;
270 phy-handle = <&phy1>;
271 };
273 mcspi1: spi@48030000 {
274 compatible = "ti,omap4-mcspi";
275 reg = <0x48030000 0x1000>;
276 #address-cells = <1>;
277 #size-cells = <0>;
278 interrupts = <65>;
279 ti,spi-num-cs = <4>;
280 ti,hwmods = "mcspi1";
281 dmas = <&edma 16 &edma 17
282 &edma 18 &edma 19>;
283 dma-names = "tx0", "rx0", "tx1", "rx1";
284 };
286 mmc1: mmc@48060000 {
287 compatible = "ti,omap4-hsmmc";
288 reg = <0x48060000 0x11000>;
289 ti,hwmods = "mmc1";
290 interrupts = <64>;
291 dmas = <&edma 24 &edma 25>;
292 dma-names = "tx", "rx";
293 };
295 timer1: timer@4802e000 {
296 compatible = "ti,dm816-timer";
297 reg = <0x4802e000 0x2000>;
298 interrupts = <67>;
299 ti,hwmods = "timer1";
300 ti,timer-alwon;
301 };
303 timer2: timer@48040000 {
304 compatible = "ti,dm816-timer";
305 reg = <0x48040000 0x2000>;
306 interrupts = <68>;
307 ti,hwmods = "timer2";
308 };
310 timer3: timer@48042000 {
311 compatible = "ti,dm816-timer";
312 reg = <0x48042000 0x2000>;
313 interrupts = <69>;
314 ti,hwmods = "timer3";
315 };
317 timer4: timer@48044000 {
318 compatible = "ti,dm816-timer";
319 reg = <0x48044000 0x2000>;
320 interrupts = <92>;
321 ti,hwmods = "timer4";
322 };
324 timer5: timer@48046000 {
325 compatible = "ti,dm816-timer";
326 reg = <0x48046000 0x2000>;
327 interrupts = <93>;
328 ti,hwmods = "timer5";
329 };
331 timer6: timer@48048000 {
332 compatible = "ti,dm816-timer";
333 reg = <0x48048000 0x2000>;
334 interrupts = <94>;
335 ti,hwmods = "timer6";
336 };
338 timer7: timer@4804a000 {
339 compatible = "ti,dm816-timer";
340 reg = <0x4804a000 0x2000>;
341 interrupts = <95>;
342 ti,hwmods = "timer7";
343 };
345 uart1: uart@48020000 {
346 compatible = "ti,omap3-uart";
347 ti,hwmods = "uart1";
348 reg = <0x48020000 0x2000>;
349 clock-frequency = <48000000>;
350 interrupts = <72>;
351 dmas = <&edma 26 &edma 27>;
352 dma-names = "tx", "rx";
353 };
355 uart2: uart@48022000 {
356 compatible = "ti,omap3-uart";
357 ti,hwmods = "uart2";
358 reg = <0x48022000 0x2000>;
359 clock-frequency = <48000000>;
360 interrupts = <73>;
361 dmas = <&edma 28 &edma 29>;
362 dma-names = "tx", "rx";
363 };
365 uart3: uart@48024000 {
366 compatible = "ti,omap3-uart";
367 ti,hwmods = "uart3";
368 reg = <0x48024000 0x2000>;
369 clock-frequency = <48000000>;
370 interrupts = <74>;
371 dmas = <&edma 30 &edma 31>;
372 dma-names = "tx", "rx";
373 };
375 /* NOTE: USB needs a transceiver driver for phys to work */
376 usb: usb_otg_hs@47401000 {
377 compatible = "ti,am33xx-usb";
378 reg = <0x47401000 0x400000>;
379 ranges;
380 #address-cells = <1>;
381 #size-cells = <1>;
382 ti,hwmods = "usb_otg_hs";
384 usb0: usb@47401000 {
385 compatible = "ti,musb-dm816";
386 reg = <0x47401400 0x400
387 0x47401000 0x200>;
388 reg-names = "mc", "control";
389 interrupts = <18>;
390 interrupt-names = "mc";
391 dr_mode = "host";
392 interface-type = <0>;
393 phys = <&usb_phy0>;
394 phy-names = "usb2-phy";
395 mentor,multipoint = <1>;
396 mentor,num-eps = <16>;
397 mentor,ram-bits = <12>;
398 mentor,power = <500>;
400 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
401 &cppi41dma 2 0 &cppi41dma 3 0
402 &cppi41dma 4 0 &cppi41dma 5 0
403 &cppi41dma 6 0 &cppi41dma 7 0
404 &cppi41dma 8 0 &cppi41dma 9 0
405 &cppi41dma 10 0 &cppi41dma 11 0
406 &cppi41dma 12 0 &cppi41dma 13 0
407 &cppi41dma 14 0 &cppi41dma 0 1
408 &cppi41dma 1 1 &cppi41dma 2 1
409 &cppi41dma 3 1 &cppi41dma 4 1
410 &cppi41dma 5 1 &cppi41dma 6 1
411 &cppi41dma 7 1 &cppi41dma 8 1
412 &cppi41dma 9 1 &cppi41dma 10 1
413 &cppi41dma 11 1 &cppi41dma 12 1
414 &cppi41dma 13 1 &cppi41dma 14 1>;
415 dma-names =
416 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
417 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
418 "rx14", "rx15",
419 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
420 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
421 "tx14", "tx15";
422 };
424 usb1: usb@47401800 {
425 compatible = "ti,musb-dm816";
426 reg = <0x47401c00 0x400
427 0x47401800 0x200>;
428 reg-names = "mc", "control";
429 interrupts = <19>;
430 interrupt-names = "mc";
431 dr_mode = "host";
432 interface-type = <0>;
433 phys = <&usb_phy1>;
434 phy-names = "usb2-phy";
435 mentor,multipoint = <1>;
436 mentor,num-eps = <16>;
437 mentor,ram-bits = <12>;
438 mentor,power = <500>;
440 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
441 &cppi41dma 17 0 &cppi41dma 18 0
442 &cppi41dma 19 0 &cppi41dma 20 0
443 &cppi41dma 21 0 &cppi41dma 22 0
444 &cppi41dma 23 0 &cppi41dma 24 0
445 &cppi41dma 25 0 &cppi41dma 26 0
446 &cppi41dma 27 0 &cppi41dma 28 0
447 &cppi41dma 29 0 &cppi41dma 15 1
448 &cppi41dma 16 1 &cppi41dma 17 1
449 &cppi41dma 18 1 &cppi41dma 19 1
450 &cppi41dma 20 1 &cppi41dma 21 1
451 &cppi41dma 22 1 &cppi41dma 23 1
452 &cppi41dma 24 1 &cppi41dma 25 1
453 &cppi41dma 26 1 &cppi41dma 27 1
454 &cppi41dma 28 1 &cppi41dma 29 1>;
455 dma-names =
456 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
457 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
458 "rx14", "rx15",
459 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
460 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
461 "tx14", "tx15";
462 };
464 cppi41dma: dma-controller@47402000 {
465 compatible = "ti,am3359-cppi41";
466 reg = <0x47400000 0x1000
467 0x47402000 0x1000
468 0x47403000 0x1000
469 0x47404000 0x4000>;
470 reg-names = "glue", "controller", "scheduler", "queuemgr";
471 interrupts = <17>;
472 interrupt-names = "glue";
473 #dma-cells = <2>;
474 #dma-channels = <30>;
475 #dma-requests = <256>;
476 };
477 };
479 wd_timer2: wd_timer@480c2000 {
480 compatible = "ti,omap3-wdt";
481 ti,hwmods = "wd_timer";
482 reg = <0x480c2000 0x1000>;
483 interrupts = <0>;
484 };
485 };
486 };
488 #include "dm816x-clocks.dtsi"