mm: hugetlb: fix hugepage memory leak caused by wrong reserve count
[linux/fpc-iii.git] / arch / arm / boot / dts / imx25-eukrea-mbimxsd25-baseboard.dts
blobed1d0b4578ef99402f22941b818451ac366518cf
1 /*
2  * Copyright 2013 EukrĂ©a Electromatique <denis@eukrea.com>
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * as published by the Free Software Foundation; either version 2
7  * of the License, or (at your option) any later version.
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  */
14 /dts-v1/;
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include "imx25-eukrea-cpuimx25.dtsi"
20 / {
21         model = "Eukrea MBIMXSD25";
22         compatible = "eukrea,mbimxsd25-baseboard", "eukrea,cpuimx25", "fsl,imx25";
24         gpio_keys {
25                 compatible = "gpio-keys";
26                 pinctrl-names = "default";
27                 pinctrl-0 = <&pinctrl_gpiokeys>;
29                 bp1 {
30                         label = "BP1";
31                         gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
32                         linux,code = <BTN_MISC>;
33                         gpio-key,wakeup;
34                 };
35         };
37         leds {
38                 compatible = "gpio-leds";
39                 pinctrl-names = "default";
40                 pinctrl-0 = <&pinctrl_gpioled>;
42                 led1 {
43                         label = "led1";
44                         gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
45                         linux,default-trigger = "heartbeat";
46                 };
47         };
49         sound {
50                 compatible = "eukrea,asoc-tlv320";
51                 eukrea,model = "imx25-eukrea-tlv320aic23";
52                 ssi-controller = <&ssi1>;
53                 fsl,mux-int-port = <1>;
54                 fsl,mux-ext-port = <5>;
55         };
58 &audmux {
59         pinctrl-names = "default";
60         pinctrl-0 = <&pinctrl_audmux>;
61         status = "okay";
64 &esdhc1 {
65         pinctrl-names = "default";
66         pinctrl-0 = <&pinctrl_esdhc1>;
67         cd-gpios = <&gpio1 20>;
68         status = "okay";
71 &i2c1 {
72         tlv320aic23: codec@1a {
73                 compatible = "ti,tlv320aic23";
74                 reg = <0x1a>;
75         };
78 &iomuxc {
79         imx25-eukrea-mbimxsd25-baseboard {
80                 pinctrl_audmux: audmuxgrp {
81                         fsl,pins = <
82                                 MX25_PAD_KPP_COL3__AUD5_TXFS            0xe0
83                                 MX25_PAD_KPP_COL2__AUD5_TXC             0xe0
84                                 MX25_PAD_KPP_COL1__AUD5_RXD             0xe0
85                                 MX25_PAD_KPP_COL0__AUD5_TXD             0xe0
86                         >;
87                 };
89                 pinctrl_esdhc1: esdhc1grp {
90                         fsl,pins = <
91                                 MX25_PAD_SD1_CMD__SD1_CMD               0x400000c0
92                                 MX25_PAD_SD1_CLK__SD1_CLK               0x400000c0
93                                 MX25_PAD_SD1_DATA0__SD1_DATA0           0x400000c0
94                                 MX25_PAD_SD1_DATA1__SD1_DATA1           0x400000c0
95                                 MX25_PAD_SD1_DATA2__SD1_DATA2           0x400000c0
96                                 MX25_PAD_SD1_DATA3__SD1_DATA3           0x400000c0
97                         >;
98                 };
100                 pinctrl_gpiokeys: gpiokeysgrp {
101                         fsl,pins = <MX25_PAD_VSTBY_ACK__GPIO_3_18 0x80000000>;
102                 };
104                 pinctrl_gpioled: gpioledgrp {
105                         fsl,pins = <MX25_PAD_POWER_FAIL__GPIO_3_19 0x80000000>;
106                 };
108                 pinctrl_lcdc: lcdcgrp {
109                         fsl,pins = <
110                                 MX25_PAD_LD0__LD0                       0x1
111                                 MX25_PAD_LD1__LD1                       0x1
112                                 MX25_PAD_LD2__LD2                       0x1
113                                 MX25_PAD_LD3__LD3                       0x1
114                                 MX25_PAD_LD4__LD4                       0x1
115                                 MX25_PAD_LD5__LD5                       0x1
116                                 MX25_PAD_LD6__LD6                       0x1
117                                 MX25_PAD_LD7__LD7                       0x1
118                                 MX25_PAD_LD8__LD8                       0x1
119                                 MX25_PAD_LD9__LD9                       0x1
120                                 MX25_PAD_LD10__LD10                     0x1
121                                 MX25_PAD_LD11__LD11                     0x1
122                                 MX25_PAD_LD12__LD12                     0x1
123                                 MX25_PAD_LD13__LD13                     0x1
124                                 MX25_PAD_LD14__LD14                     0x1
125                                 MX25_PAD_LD15__LD15                     0x1
126                                 MX25_PAD_GPIO_E__LD16                   0x1
127                                 MX25_PAD_GPIO_F__LD17                   0x1
128                                 MX25_PAD_HSYNC__HSYNC                   0x80000000
129                                 MX25_PAD_VSYNC__VSYNC                   0x80000000
130                                 MX25_PAD_LSCLK__LSCLK                   0x80000000
131                                 MX25_PAD_OE_ACD__OE_ACD                 0x80000000
132                                 MX25_PAD_CONTRAST__CONTRAST             0x80000000
133                         >;
134                 };
136                 pinctrl_uart1: uart1grp {
137                         fsl,pins = <
138                                 MX25_PAD_UART1_RTS__UART1_RTS           0xe0
139                                 MX25_PAD_UART1_CTS__UART1_CTS           0xe0
140                                 MX25_PAD_UART1_TXD__UART1_TXD           0x80000000
141                                 MX25_PAD_UART1_RXD__UART1_RXD           0xc0
142                         >;
143                 };
145                 pinctrl_uart2: uart2grp {
146                         fsl,pins = <
147                                 MX25_PAD_UART2_RXD__UART2_RXD           0x80000000
148                                 MX25_PAD_UART2_TXD__UART2_TXD           0x80000000
149                                 MX25_PAD_UART2_RTS__UART2_RTS           0x80000000
150                                 MX25_PAD_UART2_CTS__UART2_CTS           0x80000000
151                         >;
152                 };
153         };
156 &ssi1 {
157         codec-handle = <&tlv320aic23>;
158         status = "okay";
161 &uart1 {
162         pinctrl-names = "default";
163         pinctrl-0 = <&pinctrl_uart1>;
164         fsl,uart-has-rtscts;
165         status = "okay";
168 &uart2 {
169         pinctrl-names = "default";
170         pinctrl-0 = <&pinctrl_uart2>;
171         fsl,uart-has-rtscts;
172         status = "okay";
175 &usbhost1 {
176         phy_type = "serial";
177         dr_mode = "host";
178         status = "okay";
181 &usbotg {
182         phy_type = "utmi";
183         dr_mode = "otg";
184         external-vbus-divider;
185         status = "okay";