2 * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
20 #include "imx51-eukrea-cpuimx51.dtsi"
21 #include <dt-bindings/gpio/gpio.h>
24 model = "Eukrea CPUIMX51";
25 compatible = "eukrea,mbimxsd51","eukrea,cpuimx51", "fsl,imx51";
29 compatible = "fixed-clock";
31 clock-frequency = <24000000>;
36 compatible = "gpio-keys";
37 pinctrl-names = "default";
38 pinctrl-0 = <&pinctrl_gpiokeys_1>;
42 gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
45 linux,input-type = <1>;
50 compatible = "gpio-leds";
51 pinctrl-names = "default";
52 pinctrl-0 = <&pinctrl_gpioled>;
56 gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
57 linux,default-trigger = "heartbeat";
62 compatible = "simple-bus";
66 reg_can: regulator@0 {
67 compatible = "regulator-fixed";
69 regulator-name = "CAN_RST";
70 regulator-min-microvolt = <3300000>;
71 regulator-max-microvolt = <3300000>;
72 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
73 startup-delay-us = <20000>;
79 compatible = "eukrea,asoc-tlv320";
80 eukrea,model = "imx51-eukrea-tlv320aic23";
81 ssi-controller = <&ssi2>;
82 fsl,mux-int-port = <2>;
83 fsl,mux-ext-port = <3>;
89 compatible = "simple-bus";
91 usbh1phy: usbh1phy@0 {
92 compatible = "usb-nop-xceiv";
94 clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
95 clock-names = "main_clk";
96 clock-frequency = <19200000>;
102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_audmux>;
108 pinctrl-names = "default";
109 pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>;
110 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
115 pinctrl-names = "default";
116 pinctrl-0 = <&pinctrl_ecspi1>;
117 fsl,spi-num-chipselects = <1>;
118 cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
122 pinctrl-names = "default";
123 pinctrl-0 = <&pinctrl_can>;
124 compatible = "microchip,mcp2515";
127 spi-max-frequency = <10000000>;
128 interrupt-parent = <&gpio1>;
129 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
130 vdd-supply = <®_can>;
135 tlv320aic23: codec@1a {
136 compatible = "ti,tlv320aic23";
143 pinctrl_audmux: audmuxgrp {
145 MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0x80000000
146 MX51_PAD_AUD3_BB_RXD__AUD3_RXD 0x80000000
147 MX51_PAD_AUD3_BB_CK__AUD3_TXC 0x80000000
148 MX51_PAD_AUD3_BB_FS__AUD3_TXFS 0x80000000
153 pinctrl_can: cangrp {
155 MX51_PAD_CSI2_PIXCLK__GPIO4_15 0x80000000 /* nReset */
156 MX51_PAD_GPIO1_1__GPIO1_1 0x80000000 /* IRQ */
160 pinctrl_ecspi1: ecspi1grp {
162 MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
163 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
164 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
165 MX51_PAD_CSPI1_SS0__GPIO4_24 0x80000000 /* CS0 */
169 pinctrl_esdhc1: esdhc1grp {
171 MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
172 MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
173 MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
174 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
175 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
176 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
180 pinctrl_uart1: uart1grp {
182 MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
183 MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
187 pinctrl_uart3: uart3grp {
189 MX51_PAD_UART3_RXD__UART3_RXD 0x1c5
190 MX51_PAD_UART3_TXD__UART3_TXD 0x1c5
194 pinctrl_uart3_rtscts: uart3rtsctsgrp {
196 MX51_PAD_KEY_COL4__UART3_RTS 0x1c5
197 MX51_PAD_KEY_COL5__UART3_CTS 0x1c5
201 pinctrl_backlight_1: backlightgrp-1 {
203 MX51_PAD_DI1_D1_CS__GPIO3_4 0x1f5
207 pinctrl_esdhc1_cd: esdhc1_cd {
209 MX51_PAD_GPIO1_0__GPIO1_0 0xd5
213 pinctrl_gpiokeys_1: gpiokeysgrp-1 {
215 MX51_PAD_NANDF_D9__GPIO3_31 0x1f5
219 pinctrl_gpioled: gpioledgrp-1 {
221 MX51_PAD_NANDF_D10__GPIO3_30 0x80000000
225 pinctrl_reg_lcd_3v3: reg_lcd_3v3 {
227 MX51_PAD_CSI1_D9__GPIO3_13 0x1f5
231 pinctrl_usbh1: usbh1grp {
233 MX51_PAD_USBH1_CLK__USBH1_CLK 0x1e5
234 MX51_PAD_USBH1_DIR__USBH1_DIR 0x1e5
235 MX51_PAD_USBH1_NXT__USBH1_NXT 0x1e5
236 MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5
237 MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5
238 MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5
239 MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5
240 MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5
241 MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5
242 MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5
243 MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5
244 MX51_PAD_USBH1_STP__USBH1_STP 0x1e5
248 pinctrl_usbh1_vbus: usbh1-vbusgrp {
250 MX51_PAD_EIM_CS3__GPIO2_28 0x1f5
257 codec-handle = <&tlv320aic23>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&pinctrl_uart1>;
269 pinctrl-names = "default";
270 pinctrl-0 = <&pinctrl_uart3 &pinctrl_uart3_rtscts>;
276 pinctrl-names = "default";
277 pinctrl-0 = <&pinctrl_usbh1>;
278 fsl,usbphy = <&usbh1phy>;
286 phy_type = "utmi_wide";
291 pinctrl-names = "default";
292 pinctrl-0 = <&pinctrl_usbh1_vbus>;
293 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;