mm: hugetlb: fix hugepage memory leak caused by wrong reserve count
[linux/fpc-iii.git] / arch / arm / boot / dts / imx51-eukrea-mbimxsd51-baseboard.dts
blob34599c547459a2d00756cb42bc05cca3f2fa2798
1 /*
2  * Copyright 2013 EukrĂ©a Electromatique <denis@eukrea.com>
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * as published by the Free Software Foundation; either version 2
7  * of the License, or (at your option) any later version.
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  *
13  * You should have received a copy of the GNU General Public License
14  * along with this program; if not, write to the Free Software
15  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
16  * MA 02110-1301, USA.
17  */
19 /dts-v1/;
20 #include "imx51-eukrea-cpuimx51.dtsi"
21 #include <dt-bindings/gpio/gpio.h>
23 / {
24         model = "Eukrea CPUIMX51";
25         compatible = "eukrea,mbimxsd51","eukrea,cpuimx51", "fsl,imx51";
27         clocks {
28                 clk24M: can_clock {
29                         compatible = "fixed-clock";
30                         #clock-cells = <0>;
31                         clock-frequency = <24000000>;
32                 };
33         };
35         gpio_keys {
36                 compatible = "gpio-keys";
37                 pinctrl-names = "default";
38                 pinctrl-0 = <&pinctrl_gpiokeys_1>;
40                 button-1 {
41                         label = "BP1";
42                         gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
43                         linux,code = <256>;
44                         gpio-key,wakeup;
45                         linux,input-type = <1>;
46                 };
47         };
49         leds {
50                 compatible = "gpio-leds";
51                 pinctrl-names = "default";
52                 pinctrl-0 = <&pinctrl_gpioled>;
54                 led1 {
55                         label = "led1";
56                         gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
57                         linux,default-trigger = "heartbeat";
58                 };
59         };
61         regulators {
62                 compatible = "simple-bus";
63                 #address-cells = <1>;
64                 #size-cells = <0>;
66                 reg_can: regulator@0 {
67                         compatible = "regulator-fixed";
68                         reg = <0>;
69                         regulator-name = "CAN_RST";
70                         regulator-min-microvolt = <3300000>;
71                         regulator-max-microvolt = <3300000>;
72                         gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
73                         startup-delay-us = <20000>;
74                         enable-active-high;
75                 };
76         };
78         sound {
79                 compatible = "eukrea,asoc-tlv320";
80                 eukrea,model = "imx51-eukrea-tlv320aic23";
81                 ssi-controller = <&ssi2>;
82                 fsl,mux-int-port = <2>;
83                 fsl,mux-ext-port = <3>;
84         };
86         usbphy {
87                 #address-cells = <1>;
88                 #size-cells = <0>;
89                 compatible = "simple-bus";
91                 usbh1phy: usbh1phy@0 {
92                         compatible = "usb-nop-xceiv";
93                         reg = <0>;
94                         clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
95                         clock-names = "main_clk";
96                         clock-frequency = <19200000>;
97                 };
98         };
101 &audmux {
102         pinctrl-names = "default";
103         pinctrl-0 = <&pinctrl_audmux>;
104         status = "okay";
107 &esdhc1 {
108         pinctrl-names = "default";
109         pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>;
110         cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
111         status = "okay";
114 &ecspi1 {
115         pinctrl-names = "default";
116         pinctrl-0 = <&pinctrl_ecspi1>;
117         fsl,spi-num-chipselects = <1>;
118         cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
119         status = "okay";
121         can0: can@0 {
122                 pinctrl-names = "default";
123                 pinctrl-0 = <&pinctrl_can>;
124                 compatible = "microchip,mcp2515";
125                 reg = <0>;
126                 clocks = <&clk24M>;
127                 spi-max-frequency = <10000000>;
128                 interrupt-parent = <&gpio1>;
129                 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
130                 vdd-supply = <&reg_can>;
131         };
134 &i2c1 {
135         tlv320aic23: codec@1a {
136                 compatible = "ti,tlv320aic23";
137                 reg = <0x1a>;
138         };
141 &iomuxc {
142         imx51-eukrea {
143                 pinctrl_audmux: audmuxgrp {
144                         fsl,pins = <
145                                 MX51_PAD_AUD3_BB_TXD__AUD3_TXD          0x80000000
146                                 MX51_PAD_AUD3_BB_RXD__AUD3_RXD          0x80000000
147                                 MX51_PAD_AUD3_BB_CK__AUD3_TXC           0x80000000
148                                 MX51_PAD_AUD3_BB_FS__AUD3_TXFS          0x80000000
149                         >;
150                 };
153                 pinctrl_can: cangrp {
154                         fsl,pins = <
155                                 MX51_PAD_CSI2_PIXCLK__GPIO4_15          0x80000000      /* nReset */
156                                 MX51_PAD_GPIO1_1__GPIO1_1               0x80000000      /* IRQ */
157                         >;
158                 };
160                 pinctrl_ecspi1: ecspi1grp {
161                         fsl,pins = <
162                                 MX51_PAD_CSPI1_MISO__ECSPI1_MISO        0x185
163                                 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI        0x185
164                                 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK        0x185
165                                 MX51_PAD_CSPI1_SS0__GPIO4_24            0x80000000      /* CS0 */
166                         >;
167                 };
169                 pinctrl_esdhc1: esdhc1grp {
170                         fsl,pins = <
171                                 MX51_PAD_SD1_CMD__SD1_CMD               0x400020d5
172                                 MX51_PAD_SD1_CLK__SD1_CLK               0x20d5
173                                 MX51_PAD_SD1_DATA0__SD1_DATA0           0x20d5
174                                 MX51_PAD_SD1_DATA1__SD1_DATA1           0x20d5
175                                 MX51_PAD_SD1_DATA2__SD1_DATA2           0x20d5
176                                 MX51_PAD_SD1_DATA3__SD1_DATA3           0x20d5
177                         >;
178                 };
180                 pinctrl_uart1: uart1grp {
181                         fsl,pins = <
182                                 MX51_PAD_UART1_RXD__UART1_RXD           0x1c5
183                                 MX51_PAD_UART1_TXD__UART1_TXD           0x1c5
184                         >;
185                 };
187                 pinctrl_uart3: uart3grp {
188                         fsl,pins = <
189                                 MX51_PAD_UART3_RXD__UART3_RXD           0x1c5
190                                 MX51_PAD_UART3_TXD__UART3_TXD           0x1c5
191                         >;
192                 };
194                 pinctrl_uart3_rtscts: uart3rtsctsgrp {
195                         fsl,pins = <
196                                 MX51_PAD_KEY_COL4__UART3_RTS            0x1c5
197                                 MX51_PAD_KEY_COL5__UART3_CTS            0x1c5
198                         >;
199                 };
201                 pinctrl_backlight_1: backlightgrp-1 {
202                         fsl,pins = <
203                                 MX51_PAD_DI1_D1_CS__GPIO3_4 0x1f5
204                         >;
205                 };
207                 pinctrl_esdhc1_cd: esdhc1_cd {
208                         fsl,pins = <
209                                 MX51_PAD_GPIO1_0__GPIO1_0 0xd5
210                         >;
211                 };
213                 pinctrl_gpiokeys_1: gpiokeysgrp-1 {
214                         fsl,pins = <
215                                 MX51_PAD_NANDF_D9__GPIO3_31 0x1f5
216                         >;
217                 };
219                 pinctrl_gpioled: gpioledgrp-1 {
220                         fsl,pins = <
221                                 MX51_PAD_NANDF_D10__GPIO3_30 0x80000000
222                         >;
223                 };
225                 pinctrl_reg_lcd_3v3: reg_lcd_3v3 {
226                         fsl,pins = <
227                                 MX51_PAD_CSI1_D9__GPIO3_13 0x1f5
228                         >;
229                 };
231                 pinctrl_usbh1: usbh1grp {
232                         fsl,pins = <
233                                 MX51_PAD_USBH1_CLK__USBH1_CLK     0x1e5
234                                 MX51_PAD_USBH1_DIR__USBH1_DIR     0x1e5
235                                 MX51_PAD_USBH1_NXT__USBH1_NXT     0x1e5
236                                 MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5
237                                 MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5
238                                 MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5
239                                 MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5
240                                 MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5
241                                 MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5
242                                 MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5
243                                 MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5
244                                 MX51_PAD_USBH1_STP__USBH1_STP     0x1e5
245                         >;
246                 };
248                 pinctrl_usbh1_vbus: usbh1-vbusgrp {
249                         fsl,pins = <
250                                 MX51_PAD_EIM_CS3__GPIO2_28 0x1f5
251                         >;
252                 };
253         };
256 &ssi2 {
257         codec-handle = <&tlv320aic23>;
258         status = "okay";
261 &uart1 {
262         pinctrl-names = "default";
263         pinctrl-0 = <&pinctrl_uart1>;
264         fsl,uart-has-rtscts;
265         status = "okay";
268 &uart3 {
269         pinctrl-names = "default";
270         pinctrl-0 = <&pinctrl_uart3 &pinctrl_uart3_rtscts>;
271         fsl,uart-has-rtscts;
272         status = "okay";
275 &usbh1 {
276         pinctrl-names = "default";
277         pinctrl-0 = <&pinctrl_usbh1>;
278         fsl,usbphy = <&usbh1phy>;
279         dr_mode = "host";
280         phy_type = "ulpi";
281         status = "okay";
284 &usbotg {
285         dr_mode = "otg";
286         phy_type = "utmi_wide";
287         status = "okay";
290 &usbphy0 {
291         pinctrl-names = "default";
292         pinctrl-0 = <&pinctrl_usbh1_vbus>;
293         reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;