arch/arm/boot/dts/imx6qdl-gw54xx.dtsi

   1 /*
   2  * Copyright 2013 Gateworks Corporation
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include <dt-bindings/gpio/gpio.h>
  13
  14 / {
  15         /* these are used by bootloader for disabling nodes */
  16         aliases {
  17                 ethernet1 = &eth1;
  18                 led0 = &led0;
  19                 led1 = &led1;
  20                 led2 = &led2;
  21                 nand = &gpmi;
  22                 ssi0 = &ssi1;
  23                 usb0 = &usbh1;
  24                 usb1 = &usbotg;
  25         };
  26
  27         chosen {
  28                 bootargs = "console=ttymxc1,115200";
  29         };
  30
  31         backlight {
  32                 compatible = "pwm-backlight";
  33                 pwms = <&pwm4 0 5000000>;
  34                 brightness-levels = <0 4 8 16 32 64 128 255>;
  35                 default-brightness-level = <7>;
  36         };
  37
  38         leds {
  39                 compatible = "gpio-leds";
  40                 pinctrl-names = "default";
  41                 pinctrl-0 = <&pinctrl_gpio_leds>;
  42
  43                 led0: user1 {
  44                         label = "user1";
  45                         gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
  46                         default-state = "on";
  47                         linux,default-trigger = "heartbeat";
  48                 };
  49
  50                 led1: user2 {
  51                         label = "user2";
  52                         gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
  53                         default-state = "off";
  54                 };
  55
  56                 led2: user3 {
  57                         label = "user3";
  58                         gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
  59                         default-state = "off";
  60                 };
  61         };
  62
  63         memory {
  64                 reg = <0x10000000 0x40000000>;
  65         };
  66
  67         pps {
  68                 compatible = "pps-gpio";
  69                 pinctrl-names = "default";
  70                 pinctrl-0 = <&pinctrl_pps>;
  71                 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
  72                 status = "okay";
  73         };
  74
  75         regulators {
  76                 compatible = "simple-bus";
  77                 #address-cells = <1>;
  78                 #size-cells = <0>;
  79
  80                 reg_1p0v: regulator@0 {
  81                         compatible = "regulator-fixed";
  82                         reg = <0>;
  83                         regulator-name = "1P0V";
  84                         regulator-min-microvolt = <1000000>;
  85                         regulator-max-microvolt = <1000000>;
  86                         regulator-always-on;
  87                 };
  88
  89                 reg_3p3v: regulator@1 {
  90                         compatible = "regulator-fixed";
  91                         reg = <1>;
  92                         regulator-name = "3P3V";
  93                         regulator-min-microvolt = <3300000>;
  94                         regulator-max-microvolt = <3300000>;
  95                         regulator-always-on;
  96                 };
  97
  98                 reg_usb_h1_vbus: regulator@2 {
  99                         compatible = "regulator-fixed";
 100                         reg = <2>;
 101                         regulator-name = "usb_h1_vbus";
 102                         regulator-min-microvolt = <5000000>;
 103                         regulator-max-microvolt = <5000000>;
 104                         regulator-always-on;
 105                 };
 106
 107                 reg_usb_otg_vbus: regulator@3 {
 108                         compatible = "regulator-fixed";
 109                         reg = <3>;
 110                         regulator-name = "usb_otg_vbus";
 111                         regulator-min-microvolt = <5000000>;
 112                         regulator-max-microvolt = <5000000>;
 113                         gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
 114                         enable-active-high;
 115                 };
 116         };
 117
 118         sound {
 119                 compatible = "fsl,imx6q-ventana-sgtl5000",
 120                              "fsl,imx-audio-sgtl5000";
 121                 model = "sgtl5000-audio";
 122                 ssi-controller = <&ssi1>;
 123                 audio-codec = <&codec>;
 124                 audio-routing =
 125                         "MIC_IN", "Mic Jack",
 126                         "Mic Jack", "Mic Bias",
 127                         "Headphone Jack", "HP_OUT";
 128                 mux-int-port = <1>;
 129                 mux-ext-port = <4>;
 130         };
 131 };
 132
 133 &audmux {
 134         pinctrl-names = "default";
 135         pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
 136         status = "okay";
 137 };
 138
 139 &can1 {
 140         pinctrl-names = "default";
 141         pinctrl-0 = <&pinctrl_flexcan1>;
 142         status = "okay";
 143 };
 144
 145 &fec {
 146         pinctrl-names = "default";
 147         pinctrl-0 = <&pinctrl_enet>;
 148         phy-mode = "rgmii";
 149         phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
 150         status = "okay";
 151 };
 152
 153 &gpmi {
 154         pinctrl-names = "default";
 155         pinctrl-0 = <&pinctrl_gpmi_nand>;
 156         status = "okay";
 157 };
 158
 159 &hdmi {
 160         ddc-i2c-bus = <&i2c3>;
 161         status = "okay";
 162 };
 163
 164 &i2c1 {
 165         clock-frequency = <100000>;
 166         pinctrl-names = "default";
 167         pinctrl-0 = <&pinctrl_i2c1>;
 168         status = "okay";
 169
 170         eeprom1: eeprom@50 {
 171                 compatible = "atmel,24c02";
 172                 reg = <0x50>;
 173                 pagesize = <16>;
 174         };
 175
 176         eeprom2: eeprom@51 {
 177                 compatible = "atmel,24c02";
 178                 reg = <0x51>;
 179                 pagesize = <16>;
 180         };
 181
 182         eeprom3: eeprom@52 {
 183                 compatible = "atmel,24c02";
 184                 reg = <0x52>;
 185                 pagesize = <16>;
 186         };
 187
 188         eeprom4: eeprom@53 {
 189                 compatible = "atmel,24c02";
 190                 reg = <0x53>;
 191                 pagesize = <16>;
 192         };
 193
 194         gpio: pca9555@23 {
 195                 compatible = "nxp,pca9555";
 196                 reg = <0x23>;
 197                 gpio-controller;
 198                 #gpio-cells = <2>;
 199         };
 200
 201         rtc: ds1672@68 {
 202                 compatible = "dallas,ds1672";
 203                 reg = <0x68>;
 204         };
 205 };
 206
 207 &i2c2 {
 208         clock-frequency = <100000>;
 209         pinctrl-names = "default";
 210         pinctrl-0 = <&pinctrl_i2c2>;
 211         status = "okay";
 212
 213         pmic: pfuze100@08 {
 214                 compatible = "fsl,pfuze100";
 215                 reg = <0x08>;
 216
 217                 regulators {
 218                         sw1a_reg: sw1ab {
 219                                 regulator-min-microvolt = <300000>;
 220                                 regulator-max-microvolt = <1875000>;
 221                                 regulator-boot-on;
 222                                 regulator-always-on;
 223                                 regulator-ramp-delay = <6250>;
 224                         };
 225
 226                         sw1c_reg: sw1c {
 227                                 regulator-min-microvolt = <300000>;
 228                                 regulator-max-microvolt = <1875000>;
 229                                 regulator-boot-on;
 230                                 regulator-always-on;
 231                                 regulator-ramp-delay = <6250>;
 232                         };
 233
 234                         sw2_reg: sw2 {
 235                                 regulator-min-microvolt = <800000>;
 236                                 regulator-max-microvolt = <3950000>;
 237                                 regulator-boot-on;
 238                                 regulator-always-on;
 239                         };
 240
 241                         sw3a_reg: sw3a {
 242                                 regulator-min-microvolt = <400000>;
 243                                 regulator-max-microvolt = <1975000>;
 244                                 regulator-boot-on;
 245                                 regulator-always-on;
 246                         };
 247
 248                         sw3b_reg: sw3b {
 249                                 regulator-min-microvolt = <400000>;
 250                                 regulator-max-microvolt = <1975000>;
 251                                 regulator-boot-on;
 252                                 regulator-always-on;
 253                         };
 254
 255                         sw4_reg: sw4 {
 256                                 regulator-min-microvolt = <800000>;
 257                                 regulator-max-microvolt = <3300000>;
 258                         };
 259
 260                         swbst_reg: swbst {
 261                                 regulator-min-microvolt = <5000000>;
 262                                 regulator-max-microvolt = <5150000>;
 263                         };
 264
 265                         snvs_reg: vsnvs {
 266                                 regulator-min-microvolt = <1000000>;
 267                                 regulator-max-microvolt = <3000000>;
 268                                 regulator-boot-on;
 269                                 regulator-always-on;
 270                         };
 271
 272                         vref_reg: vrefddr {
 273                                 regulator-boot-on;
 274                                 regulator-always-on;
 275                         };
 276
 277                         vgen1_reg: vgen1 {
 278                                 regulator-min-microvolt = <800000>;
 279                                 regulator-max-microvolt = <1550000>;
 280                         };
 281
 282                         vgen2_reg: vgen2 {
 283                                 regulator-min-microvolt = <800000>;
 284                                 regulator-max-microvolt = <1550000>;
 285                         };
 286
 287                         vgen3_reg: vgen3 {
 288                                 regulator-min-microvolt = <1800000>;
 289                                 regulator-max-microvolt = <3300000>;
 290                         };
 291
 292                         vgen4_reg: vgen4 {
 293                                 regulator-min-microvolt = <1800000>;
 294                                 regulator-max-microvolt = <3300000>;
 295                                 regulator-always-on;
 296                         };
 297
 298                         vgen5_reg: vgen5 {
 299                                 regulator-min-microvolt = <1800000>;
 300                                 regulator-max-microvolt = <3300000>;
 301                                 regulator-always-on;
 302                         };
 303
 304                         vgen6_reg: vgen6 {
 305                                 regulator-min-microvolt = <1800000>;
 306                                 regulator-max-microvolt = <3300000>;
 307                                 regulator-always-on;
 308                         };
 309                 };
 310         };
 311 };
 312
 313 &i2c3 {
 314         clock-frequency = <100000>;
 315         pinctrl-names = "default";
 316         pinctrl-0 = <&pinctrl_i2c3>;
 317         status = "okay";
 318
 319         codec: sgtl5000@0a {
 320                 compatible = "fsl,sgtl5000";
 321                 reg = <0x0a>;
 322                 clocks = <&clks 201>;
 323                 VDDA-supply = <&sw4_reg>;
 324                 VDDIO-supply = <&reg_3p3v>;
 325         };
 326
 327         touchscreen: egalax_ts@04 {
 328                 compatible = "eeti,egalax_ts";
 329                 reg = <0x04>;
 330                 interrupt-parent = <&gpio7>;
 331                 interrupts = <12 2>;
 332                 wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
 333         };
 334 };
 335
 336 &ldb {
 337         status = "okay";
 338
 339         lvds-channel@1 {
 340                 fsl,data-mapping = "spwg";
 341                 fsl,data-width = <18>;
 342                 status = "okay";
 343
 344                 display-timings {
 345                         native-mode = <&timing0>;
 346                         timing0: hsd100pxn1 {
 347                                 clock-frequency = <65000000>;
 348                                 hactive = <1024>;
 349                                 vactive = <768>;
 350                                 hback-porch = <220>;
 351                                 hfront-porch = <40>;
 352                                 vback-porch = <21>;
 353                                 vfront-porch = <7>;
 354                                 hsync-len = <60>;
 355                                 vsync-len = <10>;
 356                         };
 357                 };
 358         };
 359 };
 360
 361 &pcie {
 362         pinctrl-names = "default";
 363         pinctrl-0 = <&pinctrl_pcie>;
 364         reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
 365         status = "okay";
 366
 367         eth1: sky2@8 { /* MAC/PHY on bus 8 */
 368                 compatible = "marvell,sky2";
 369         };
 370 };
 371
 372 &pwm4 {
 373         pinctrl-names = "default";
 374         pinctrl-0 = <&pinctrl_pwm4>;
 375         status = "okay";
 376 };
 377
 378 &ssi1 {
 379         status = "okay";
 380 };
 381
 382 &ssi2 {
 383         status = "okay";
 384 };
 385
 386 &uart1 {
 387         pinctrl-names = "default";
 388         pinctrl-0 = <&pinctrl_uart1>;
 389         status = "okay";
 390 };
 391
 392 &uart2 {
 393         pinctrl-names = "default";
 394         pinctrl-0 = <&pinctrl_uart2>;
 395         status = "okay";
 396 };
 397
 398 &uart5 {
 399         pinctrl-names = "default";
 400         pinctrl-0 = <&pinctrl_uart5>;
 401         status = "okay";
 402 };
 403
 404 &usbotg {
 405         vbus-supply = <&reg_usb_otg_vbus>;
 406         pinctrl-names = "default";
 407         pinctrl-0 = <&pinctrl_usbotg>;
 408         disable-over-current;
 409         status = "okay";
 410 };
 411
 412 &usbh1 {
 413         vbus-supply = <&reg_usb_h1_vbus>;
 414         status = "okay";
 415 };
 416
 417 &usdhc3 {
 418         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 419         pinctrl-0 = <&pinctrl_usdhc3>;
 420         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 421         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 422         cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
 423         vmmc-supply = <&reg_3p3v>;
 424         no-1-8-v; /* firmware will remove if board revision supports */
 425         status = "okay";
 426 };
 427
 428 &iomuxc {
 429         imx6qdl-gw54xx {
 430                 pinctrl_audmux: audmuxgrp {
 431                         fsl,pins = <
 432                                 MX6QDL_PAD_SD2_DAT0__AUD4_RXD           0x130b0
 433                                 MX6QDL_PAD_SD2_DAT3__AUD4_TXC           0x130b0
 434                                 MX6QDL_PAD_SD2_DAT2__AUD4_TXD           0x110b0
 435                                 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS          0x130b0
 436                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x130b0 /* AUD4_MCK */
 437                         >;
 438                 };
 439
 440                 pinctrl_enet: enetgrp {
 441                         fsl,pins = <
 442                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 443                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 444                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 445                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 446                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 447                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 448                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
 449                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
 450                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
 451                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
 452                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
 453                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
 454                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 455                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 456                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 457                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 458                         >;
 459                 };
 460
 461                 pinctrl_flexcan1: flexcan1grp {
 462                         fsl,pins = <
 463                                 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x1b0b1
 464                                 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x1b0b1
 465                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x4001b0b0 /* CAN_STBY */
 466                         >;
 467                 };
 468
 469                 pinctrl_gpio_leds: gpioledsgrp {
 470                         fsl,pins = <
 471                                 MX6QDL_PAD_KEY_COL0__GPIO4_IO06         0x1b0b0
 472                                 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07         0x1b0b0
 473                                 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15         0x1b0b0
 474                         >;
 475                 };
 476
 477                 pinctrl_gpmi_nand: gpminandgrp {
 478                         fsl,pins = <
 479                                 MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
 480                                 MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
 481                                 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
 482                                 MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
 483                                 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
 484                                 MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
 485                                 MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
 486                                 MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
 487                                 MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
 488                                 MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
 489                                 MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
 490                                 MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
 491                                 MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
 492                                 MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
 493                                 MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
 494                         >;
 495                 };
 496
 497                 pinctrl_i2c1: i2c1grp {
 498                         fsl,pins = <
 499                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 500                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 501                         >;
 502                 };
 503
 504                 pinctrl_i2c2: i2c2grp {
 505                         fsl,pins = <
 506                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 507                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 508                         >;
 509                 };
 510
 511                 pinctrl_i2c3: i2c3grp {
 512                         fsl,pins = <
 513                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
 514                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
 515                         >;
 516                 };
 517
 518                 pinctrl_pcie: pciegrp {
 519                         fsl,pins = <
 520                                 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28       0x1b0b0 /* PCIE IRQ */
 521                                 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29        0x1b0b0 /* PCIE RST */
 522                         >;
 523                 };
 524
 525                 pinctrl_pps: ppsgrp {
 526                         fsl,pins = <
 527                                 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26        0x1b0b1
 528                         >;
 529                 };
 530
 531                 pinctrl_pwm4: pwm4grp {
 532                         fsl,pins = <
 533                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT            0x1b0b1
 534                         >;
 535                 };
 536
 537                 pinctrl_uart1: uart1grp {
 538                         fsl,pins = <
 539                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 540                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 541                         >;
 542                 };
 543
 544                 pinctrl_uart2: uart2grp {
 545                         fsl,pins = <
 546                                 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
 547                                 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
 548                         >;
 549                 };
 550
 551                 pinctrl_uart5: uart5grp {
 552                         fsl,pins = <
 553                                 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA      0x1b0b1
 554                                 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA      0x1b0b1
 555                         >;
 556                 };
 557
 558                 pinctrl_usbotg: usbotggrp {
 559                         fsl,pins = <
 560                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 561                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22          0x1b0b0 /* PWR_EN */
 562                         >;
 563                 };
 564
 565                 pinctrl_usdhc3: usdhc3grp {
 566                         fsl,pins = <
 567                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 568                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 569                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 570                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 571                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 572                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 573                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x17059 /* CD */
 574                                 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT       0x17059
 575                         >;
 576                 };
 577
 578                 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
 579                         fsl,pins = <
 580                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170b9
 581                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100b9
 582                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x170b9
 583                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x170b9
 584                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x170b9
 585                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x170b9
 586                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x170b9 /* CD */
 587                                 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT       0x170b9
 588                         >;
 589                 };
 590
 591                 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
 592                         fsl,pins = <
 593                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x170f9
 594                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x100f9
 595                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x170f9
 596                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x170f9
 597                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x170f9
 598                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x170f9
 599                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x170f9 /* CD */
 600                                 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT       0x170f9
 601                         >;
 602                 };
 603         };
 604 };