mm: hugetlb: fix hugepage memory leak caused by wrong reserve count
[linux/fpc-iii.git] / arch / arm / boot / dts / imx6qdl-gw551x.dtsi
blob741f3d529e3e23bcf3cb17160620fb30ae2c79dc
1 /*
2  * Copyright 2014 Gateworks Corporation
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of
12  *     the License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  *     You should have received a copy of the GNU General Public
20  *     License along with this file; if not, write to the Free
21  *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22  *     MA 02110-1301 USA
23  *
24  * Or, alternatively,
25  *
26  *  b) Permission is hereby granted, free of charge, to any person
27  *     obtaining a copy of this software and associated documentation
28  *     files (the "Software"), to deal in the Software without
29  *     restriction, including without limitation the rights to use,
30  *     copy, modify, merge, publish, distribute, sublicense, and/or
31  *     sell copies of the Software, and to permit persons to whom the
32  *     Software is furnished to do so, subject to the following
33  *     conditions:
34  *
35  *     The above copyright notice and this permission notice shall be
36  *     included in all copies or substantial portions of the Software.
37  *
38  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45  *     OTHER DEALINGS IN THE SOFTWARE.
46  */
48 #include <dt-bindings/gpio/gpio.h>
50 / {
51         /* these are used by bootloader for disabling nodes */
52         aliases {
53                 led0 = &led0;
54                 nand = &gpmi;
55                 ssi0 = &ssi1;
56                 usb0 = &usbh1;
57                 usb1 = &usbotg;
58         };
60         chosen {
61                 bootargs = "console=ttymxc1,115200";
62         };
64         leds {
65                 compatible = "gpio-leds";
66                 pinctrl-names = "default";
67                 pinctrl-0 = <&pinctrl_gpio_leds>;
69                 led0: user1 {
70                         label = "user1";
71                         gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
72                         default-state = "on";
73                         linux,default-trigger = "heartbeat";
74                 };
75         };
77         memory {
78                 reg = <0x10000000 0x20000000>;
79         };
81         regulators {
82                 compatible = "simple-bus";
83                 #address-cells = <1>;
84                 #size-cells = <0>;
86                 reg_5p0v: regulator@0 {
87                         compatible = "regulator-fixed";
88                         reg = <0>;
89                         regulator-name = "5P0V";
90                         regulator-min-microvolt = <5000000>;
91                         regulator-max-microvolt = <5000000>;
92                 };
94                 reg_usb_h1_vbus: regulator@1 {
95                         compatible = "regulator-fixed";
96                         reg = <1>;
97                         regulator-name = "usb_h1_vbus";
98                         regulator-min-microvolt = <5000000>;
99                         regulator-max-microvolt = <5000000>;
100                 };
102                 reg_usb_otg_vbus: regulator@2 {
103                         compatible = "regulator-fixed";
104                         reg = <2>;
105                         regulator-name = "usb_otg_vbus";
106                         regulator-min-microvolt = <5000000>;
107                         regulator-max-microvolt = <5000000>;
108                 };
109         };
112 &can1 {
113         pinctrl-names = "default";
114         pinctrl-0 = <&pinctrl_flexcan1>;
115         status = "okay";
118 &gpmi {
119         pinctrl-names = "default";
120         pinctrl-0 = <&pinctrl_gpmi_nand>;
121         status = "okay";
124 &hdmi {
125         ddc-i2c-bus = <&i2c3>;
126         status = "okay";
129 &i2c1 {
130         clock-frequency = <100000>;
131         pinctrl-names = "default";
132         pinctrl-0 = <&pinctrl_i2c1>;
133         status = "okay";
135         eeprom1: eeprom@50 {
136                 compatible = "atmel,24c02";
137                 reg = <0x50>;
138                 pagesize = <16>;
139         };
141         eeprom2: eeprom@51 {
142                 compatible = "atmel,24c02";
143                 reg = <0x51>;
144                 pagesize = <16>;
145         };
147         eeprom3: eeprom@52 {
148                 compatible = "atmel,24c02";
149                 reg = <0x52>;
150                 pagesize = <16>;
151         };
153         eeprom4: eeprom@53 {
154                 compatible = "atmel,24c02";
155                 reg = <0x53>;
156                 pagesize = <16>;
157         };
159         gpio: pca9555@23 {
160                 compatible = "nxp,pca9555";
161                 reg = <0x23>;
162                 gpio-controller;
163                 #gpio-cells = <2>;
164         };
166         rtc: ds1672@68 {
167                 compatible = "dallas,ds1672";
168                 reg = <0x68>;
169         };
172 &i2c2 {
173         clock-frequency = <100000>;
174         pinctrl-names = "default";
175         pinctrl-0 = <&pinctrl_i2c2>;
176         status = "okay";
179 &i2c3 {
180         clock-frequency = <100000>;
181         pinctrl-names = "default";
182         pinctrl-0 = <&pinctrl_i2c3>;
183         status = "okay";
185         gpio_exp: pca9555@24 {
186                 compatible = "nxp,pca9555";
187                 reg = <0x24>;
188                 gpio-controller;
189                 #gpio-cells = <2>;
190         };
194 &pcie {
195         pinctrl-names = "default";
196         pinctrl-0 = <&pinctrl_pcie>;
197         reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
198         status = "okay";
201 &ssi1 {
202         status = "okay";
205 &uart2 {
206         pinctrl-names = "default";
207         pinctrl-0 = <&pinctrl_uart2>;
208         status = "okay";
211 &uart3 {
212         pinctrl-names = "default";
213         pinctrl-0 = <&pinctrl_uart3>;
214         status = "okay";
217 &usbotg {
218         vbus-supply = <&reg_usb_otg_vbus>;
219         pinctrl-names = "default";
220         pinctrl-0 = <&pinctrl_usbotg>;
221         disable-over-current;
222         status = "okay";
225 &usbh1 {
226         vbus-supply = <&reg_usb_h1_vbus>;
227         status = "okay";
230 &iomuxc {
231         imx6qdl-gw51xx {
232                 pinctrl_flexcan1: flexcan1grp {
233                         fsl,pins = <
234                                 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x1b0b1
235                                 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x1b0b1
236                                 MX6QDL_PAD_GPIO_9__GPIO1_IO09           0x4001b0b0 /* CAN_STBY */
237                         >;
238                 };
240                 pinctrl_gpio_leds: gpioledsgrp {
241                         fsl,pins = <
242                                 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x1b0b0
243                         >;
244                 };
246                 pinctrl_gpmi_nand: gpminandgrp {
247                         fsl,pins = <
248                                 MX6QDL_PAD_NANDF_CLE__NAND_CLE          0xb0b1
249                                 MX6QDL_PAD_NANDF_ALE__NAND_ALE          0xb0b1
250                                 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B        0xb0b1
251                                 MX6QDL_PAD_NANDF_RB0__NAND_READY_B      0xb000
252                                 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B        0xb0b1
253                                 MX6QDL_PAD_SD4_CMD__NAND_RE_B           0xb0b1
254                                 MX6QDL_PAD_SD4_CLK__NAND_WE_B           0xb0b1
255                                 MX6QDL_PAD_NANDF_D0__NAND_DATA00        0xb0b1
256                                 MX6QDL_PAD_NANDF_D1__NAND_DATA01        0xb0b1
257                                 MX6QDL_PAD_NANDF_D2__NAND_DATA02        0xb0b1
258                                 MX6QDL_PAD_NANDF_D3__NAND_DATA03        0xb0b1
259                                 MX6QDL_PAD_NANDF_D4__NAND_DATA04        0xb0b1
260                                 MX6QDL_PAD_NANDF_D5__NAND_DATA05        0xb0b1
261                                 MX6QDL_PAD_NANDF_D6__NAND_DATA06        0xb0b1
262                                 MX6QDL_PAD_NANDF_D7__NAND_DATA07        0xb0b1
263                         >;
264                 };
266                 pinctrl_i2c1: i2c1grp {
267                         fsl,pins = <
268                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
269                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
270                         >;
271                 };
273                 pinctrl_i2c2: i2c2grp {
274                         fsl,pins = <
275                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
276                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
277                         >;
278                 };
280                 pinctrl_i2c3: i2c3grp {
281                         fsl,pins = <
282                                 MX6QDL_PAD_GPIO_3__I2C3_SCL             0x4001b8b1
283                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001b8b1
284                         >;
285                 };
287                 pinctrl_pcie: pciegrp {
288                         fsl,pins = <
289                                 MX6QDL_PAD_GPIO_0__GPIO1_IO00           0x1b0b0 /* PCIE RST */
290                         >;
291                 };
293                 pinctrl_uart2: uart2grp {
294                         fsl,pins = <
295                                 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA      0x1b0b1
296                                 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA      0x1b0b1
297                         >;
298                 };
300                 pinctrl_uart3: uart3grp {
301                         fsl,pins = <
302                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
303                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
304                         >;
305                 };
307                 pinctrl_usbotg: usbotggrp {
308                         fsl,pins = <
309                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
310                         >;
311                 };
312         };