mm: hugetlb: fix hugepage memory leak caused by wrong reserve count
[linux/fpc-iii.git] / arch / arm / boot / dts / kirkwood-rd88f6281.dtsi
blobd195e884b3b529617031250bbe1ecb5184fdd201
1 /*
2  * Marvell RD88F6181 Common Board descrition
3  *
4  * Andrew Lunn <andrew@lunn.ch>
5  *
6  * This file is licensed under the terms of the GNU General Public
7  * License version 2.  This program is licensed "as is" without any
8  * warranty of any kind, whether express or implied.
9  *
10  * This file contains the definitions that are common between the two
11  * variants of the Marvell Kirkwood Development Board.
12  */
14 #include "kirkwood.dtsi"
15 #include "kirkwood-6281.dtsi"
17 / {
18         memory {
19                 device_type = "memory";
20                 reg = <0x00000000 0x20000000>;
21         };
23         chosen {
24                 bootargs = "console=ttyS0,115200n8";
25                 stdout-path = &uart0;
26         };
28         mbus {
29                 pcie-controller {
30                         status = "okay";
32                         pcie@1,0 {
33                                 status = "okay";
34                         };
35                 };
36         };
38         ocp@f1000000 {
39                 pinctrl: pin-controller@10000 {
40                         pinctrl-names = "default";
42                         pmx_sdio_cd: pmx-sdio-cd {
43                                 marvell,pins = "mpp28";
44                                 marvell,function = "gpio";
45                         };
46                 };
48                 serial@12000 {
49                         status = "okay";
51                 };
53                 sata@80000 {
54                         status = "okay";
55                         nr-ports = <2>;
56                 };
57                 mvsdio@90000 {
58                         pinctrl-0 = <&pmx_sdio &pmx_sdio_cd>;
59                         pinctrl-names = "default";
60                         status = "okay";
61                         cd-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
62                         /* No WP GPIO */
63                 };
64         };
66         dsa@0 {
67                 compatible = "marvell,dsa";
68                 #address-cells = <2>;
69                 #size-cells = <0>;
71                 dsa,ethernet = <&eth0port>;
72                 dsa,mii-bus = <&mdio>;
74                 switch@0 {
75                         #address-cells = <1>;
76                         #size-cells = <0>;
78                         port@0 {
79                                 reg = <0>;
80                                 label = "lan1";
81                         };
83                         port@1 {
84                                 reg = <1>;
85                                 label = "lan2";
86                         };
88                         port@2 {
89                                 reg = <2>;
90                                 label = "lan3";
91                         };
93                         port@3 {
94                                 reg = <3>;
95                                 label = "lan4";
96                         };
98                         port@5 {
99                                 reg = <5>;
100                                 label = "cpu";
101                         };
102                 };
103        };
106 &nand {
107         status = "okay";
109         partition@0 {
110                 label = "u-boot";
111                 reg = <0x0000000 0x100000>;
112                 read-only;
113         };
115         partition@100000 {
116                 label = "uImage";
117                 reg = <0x0100000 0x200000>;
118         };
120         partition@300000 {
121                 label = "rootfs";
122                 reg = <0x0300000 0x500000>;
123         };
126 &mdio {
127         status = "okay";
130 &eth0 {
131         status = "okay";
132         ethernet0-port@0 {
133                 speed = <1000>;
134                 duplex = <1>;
135         };