arch/arm/boot/dts/mt6580.dtsi

   1 /*
   2  * Copyright (c) 2015 MediaTek Inc.
   3  * Author: Mars.C <mars.cheng@mediatek.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <dt-bindings/interrupt-controller/irq.h>
  16 #include <dt-bindings/interrupt-controller/arm-gic.h>
  17 #include "skeleton.dtsi"
  18
  19 / {
  20         compatible = "mediatek,mt6580";
  21         #address-cells = <1>;
  22         #size-cells = <1>;
  23         interrupt-parent = <&sysirq>;
  24
  25         cpus {
  26                 #address-cells = <1>;
  27                 #size-cells = <0>;
  28
  29                 cpu@0 {
  30                         device_type = "cpu";
  31                         compatible = "arm,cortex-a7";
  32                         reg = <0x0>;
  33                 };
  34                 cpu@1 {
  35                         device_type = "cpu";
  36                         compatible = "arm,cortex-a7";
  37                         reg = <0x1>;
  38                 };
  39                 cpu@2 {
  40                         device_type = "cpu";
  41                         compatible = "arm,cortex-a7";
  42                         reg = <0x2>;
  43                 };
  44                 cpu@3 {
  45                         device_type = "cpu";
  46                         compatible = "arm,cortex-a7";
  47                         reg = <0x3>;
  48                 };
  49
  50         };
  51
  52         system_clk: dummy13m {
  53                 compatible = "fixed-clock";
  54                 clock-frequency = <13000000>;
  55                 #clock-cells = <0>;
  56         };
  57
  58         rtc_clk: dummy32k {
  59                 compatible = "fixed-clock";
  60                 clock-frequency = <32000>;
  61                 #clock-cells = <0>;
  62         };
  63
  64         uart_clk: dummy26m {
  65                 compatible = "fixed-clock";
  66                 clock-frequency = <26000000>;
  67                 #clock-cells = <0>;
  68         };
  69
  70         timer: timer@10008000 {
  71                 compatible = "mediatek,mt6580-timer",
  72                              "mediatek,mt6577-timer";
  73                 reg = <0x10008000 0x80>;
  74                 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
  75                 clocks = <&system_clk>, <&rtc_clk>;
  76                 clock-names = "system-clk", "rtc-clk";
  77         };
  78
  79         sysirq: interrupt-controller@10200100 {
  80                 compatible = "mediatek,mt6580-sysirq",
  81                              "mediatek,mt6577-sysirq";
  82                 interrupt-controller;
  83                 #interrupt-cells = <3>;
  84                 interrupt-parent = <&gic>;
  85                 reg = <0x10200100 0x1c>;
  86         };
  87
  88         gic: interrupt-controller@10211000 {
  89                 compatible = "arm,cortex-a7-gic";
  90                 interrupt-controller;
  91                 #interrupt-cells = <3>;
  92                 interrupt-parent = <&gic>;
  93                 reg = <0x10211000 0x1000>,
  94                       <0x10212000 0x1000>,
  95                       <0x10214000 0x2000>,
  96                       <0x10216000 0x2000>;
  97         };
  98
  99         uart0: serial@11005000 {
 100                 compatible = "mediatek,mt6580-uart",
 101                              "mediatek,mt6577-uart";
 102                 reg = <0x11005000 0x400>;
 103                 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
 104                 clocks = <&uart_clk>;
 105                 status = "disabled";
 106         };
 107
 108         uart1: serial@11006000 {
 109                 compatible = "mediatek,mt6580-uart",
 110                              "mediatek,mt6577-uart";
 111                 reg = <0x11006000 0x400>;
 112                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_LOW>;
 113                 clocks = <&uart_clk>;
 114                 status = "disabled";
 115         };
 116 };