mm: hugetlb: fix hugepage memory leak caused by wrong reserve count
[linux/fpc-iii.git] / arch / arm / boot / dts / omap2420.dtsi
blob5b9a376cc31eee01e38a0cbd8a5cb16b8bf6c04f
1 /*
2  * Device Tree Source for OMAP2420 SoC
3  *
4  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5  *
6  * This file is licensed under the terms of the GNU General Public License
7  * version 2.  This program is licensed "as is" without any warranty of any
8  * kind, whether express or implied.
9  */
11 #include "omap2.dtsi"
13 / {
14         compatible = "ti,omap2420", "ti,omap2";
16         ocp {
17                 l4: l4@48000000 {
18                         compatible = "ti,omap2-l4", "simple-bus";
19                         #address-cells = <1>;
20                         #size-cells = <1>;
21                         ranges = <0 0x48000000 0x100000>;
23                         prcm: prcm@8000 {
24                                 compatible = "ti,omap2-prcm";
25                                 reg = <0x8000 0x1000>;
27                                 prcm_clocks: clocks {
28                                         #address-cells = <1>;
29                                         #size-cells = <0>;
30                                 };
32                                 prcm_clockdomains: clockdomains {
33                                 };
34                         };
36                         scm: scm@0 {
37                                 compatible = "ti,omap2-scm", "simple-bus";
38                                 reg = <0x0 0x1000>;
39                                 #address-cells = <1>;
40                                 #size-cells = <1>;
41                                 ranges = <0 0x0 0x1000>;
43                                 omap2420_pmx: pinmux@30 {
44                                         compatible = "ti,omap2420-padconf",
45                                                      "pinctrl-single";
46                                         reg = <0x30 0x0113>;
47                                         #address-cells = <1>;
48                                         #size-cells = <0>;
49                                         pinctrl-single,register-width = <8>;
50                                         pinctrl-single,function-mask = <0x3f>;
51                                 };
53                                 scm_conf: scm_conf@270 {
54                                         compatible = "syscon";
55                                         reg = <0x270 0x100>;
56                                         #address-cells = <1>;
57                                         #size-cells = <1>;
59                                         scm_clocks: clocks {
60                                                 #address-cells = <1>;
61                                                 #size-cells = <0>;
62                                         };
63                                 };
65                                 scm_clockdomains: clockdomains {
66                                 };
67                         };
69                         counter32k: counter@4000 {
70                                 compatible = "ti,omap-counter32k";
71                                 reg = <0x4000 0x20>;
72                                 ti,hwmods = "counter_32k";
73                         };
74                 };
76                 gpio1: gpio@48018000 {
77                         compatible = "ti,omap2-gpio";
78                         reg = <0x48018000 0x200>;
79                         interrupts = <29>;
80                         ti,hwmods = "gpio1";
81                         ti,gpio-always-on;
82                         #gpio-cells = <2>;
83                         gpio-controller;
84                         #interrupt-cells = <2>;
85                         interrupt-controller;
86                 };
88                 gpio2: gpio@4801a000 {
89                         compatible = "ti,omap2-gpio";
90                         reg = <0x4801a000 0x200>;
91                         interrupts = <30>;
92                         ti,hwmods = "gpio2";
93                         ti,gpio-always-on;
94                         #gpio-cells = <2>;
95                         gpio-controller;
96                         #interrupt-cells = <2>;
97                         interrupt-controller;
98                 };
100                 gpio3: gpio@4801c000 {
101                         compatible = "ti,omap2-gpio";
102                         reg = <0x4801c000 0x200>;
103                         interrupts = <31>;
104                         ti,hwmods = "gpio3";
105                         ti,gpio-always-on;
106                         #gpio-cells = <2>;
107                         gpio-controller;
108                         #interrupt-cells = <2>;
109                         interrupt-controller;
110                 };
112                 gpio4: gpio@4801e000 {
113                         compatible = "ti,omap2-gpio";
114                         reg = <0x4801e000 0x200>;
115                         interrupts = <32>;
116                         ti,hwmods = "gpio4";
117                         ti,gpio-always-on;
118                         #gpio-cells = <2>;
119                         gpio-controller;
120                         #interrupt-cells = <2>;
121                         interrupt-controller;
122                 };
124                 gpmc: gpmc@6800a000 {
125                         compatible = "ti,omap2420-gpmc";
126                         reg = <0x6800a000 0x1000>;
127                         #address-cells = <2>;
128                         #size-cells = <1>;
129                         interrupts = <20>;
130                         gpmc,num-cs = <8>;
131                         gpmc,num-waitpins = <4>;
132                         ti,hwmods = "gpmc";
133                 };
135                 mcbsp1: mcbsp@48074000 {
136                         compatible = "ti,omap2420-mcbsp";
137                         reg = <0x48074000 0xff>;
138                         reg-names = "mpu";
139                         interrupts = <59>, /* TX interrupt */
140                                      <60>; /* RX interrupt */
141                         interrupt-names = "tx", "rx";
142                         ti,hwmods = "mcbsp1";
143                         dmas = <&sdma 31>,
144                                <&sdma 32>;
145                         dma-names = "tx", "rx";
146                         status = "disabled";
147                 };
149                 mcbsp2: mcbsp@48076000 {
150                         compatible = "ti,omap2420-mcbsp";
151                         reg = <0x48076000 0xff>;
152                         reg-names = "mpu";
153                         interrupts = <62>, /* TX interrupt */
154                                      <63>; /* RX interrupt */
155                         interrupt-names = "tx", "rx";
156                         ti,hwmods = "mcbsp2";
157                         dmas = <&sdma 33>,
158                                <&sdma 34>;
159                         dma-names = "tx", "rx";
160                         status = "disabled";
161                 };
163                 msdi1: mmc@4809c000 {
164                         compatible = "ti,omap2420-mmc";
165                         ti,hwmods = "msdi1";
166                         reg = <0x4809c000 0x80>;
167                         interrupts = <83>;
168                         dmas = <&sdma 61 &sdma 62>;
169                         dma-names = "tx", "rx";
170                 };
172                 mailbox: mailbox@48094000 {
173                         compatible = "ti,omap2-mailbox";
174                         reg = <0x48094000 0x200>;
175                         interrupts = <26>, <34>;
176                         interrupt-names = "dsp", "iva";
177                         ti,hwmods = "mailbox";
178                         #mbox-cells = <1>;
179                         ti,mbox-num-users = <4>;
180                         ti,mbox-num-fifos = <6>;
181                         mbox_dsp: dsp {
182                                 ti,mbox-tx = <0 0 0>;
183                                 ti,mbox-rx = <1 0 0>;
184                         };
185                         mbox_iva: iva {
186                                 ti,mbox-tx = <2 1 3>;
187                                 ti,mbox-rx = <3 1 3>;
188                         };
189                 };
191                 timer1: timer@48028000 {
192                         compatible = "ti,omap2420-timer";
193                         reg = <0x48028000 0x400>;
194                         interrupts = <37>;
195                         ti,hwmods = "timer1";
196                         ti,timer-alwon;
197                 };
199                 wd_timer2: wdt@48022000 {
200                         compatible = "ti,omap2-wdt";
201                         ti,hwmods = "wd_timer2";
202                         reg = <0x48022000 0x80>;
203                 };
204         };
207 &i2c1 {
208         compatible = "ti,omap2420-i2c";
211 &i2c2 {
212         compatible = "ti,omap2420-i2c";
215 /include/ "omap24xx-clocks.dtsi"
216 /include/ "omap2420-clocks.dtsi"