2 * Support for CompuLab CM-T3517
7 #include "omap3-cm-t3x.dtsi"
10 model = "CompuLab CM-T3517";
11 compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
13 vmmc: regulator-vmmc {
14 compatible = "regulator-fixed";
15 regulator-name = "vmmc";
16 regulator-min-microvolt = <3300000>;
17 regulator-max-microvolt = <3300000>;
20 wl12xx_vmmc2: wl12xx_vmmc2 {
21 compatible = "regulator-fixed";
22 regulator-name = "vw1271";
23 pinctrl-names = "default";
28 regulator-min-microvolt = <1800000>;
29 regulator-max-microvolt = <1800000>;
30 gpio = <&gpio1 6 GPIO_ACTIVE_HIGH >; /* gpio6 */
31 startup-delay-us = <20000>;
35 wl12xx_vaux2: wl12xx_vaux2 {
36 compatible = "regulator-fixed";
37 regulator-name = "vwl1271_vaux2";
38 regulator-min-microvolt = <1800000>;
39 regulator-max-microvolt = <1800000>;
45 wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins {
46 pinctrl-single,pins = <
47 OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
48 OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE4) /* sys_boot4.gpio_6 */
55 phy1_reset_pins: pinmux_hsusb1_phy_reset_pins {
56 pinctrl-single,pins = <
57 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE4) /* uart2_tx.gpio_146 */
61 phy2_reset_pins: pinmux_hsusb2_phy_reset_pins {
62 pinctrl-single,pins = <
63 OMAP3_CORE1_IOPAD(0x217a, PIN_OUTPUT | MUX_MODE4) /* uart2_rx.gpio_147 */
67 otg_drv_vbus: pinmux_otg_drv_vbus {
68 pinctrl-single,pins = <
69 OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50MHz_clk.usb0_drvvbus */
73 mmc2_pins: pinmux_mmc2_pins {
74 pinctrl-single,pins = <
75 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
76 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
77 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
78 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
79 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
80 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
84 wl12xx_core_pins: pinmux_wl12xx_core_pins {
85 pinctrl-single,pins = <
86 OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs5.gpio_56 */
87 OMAP3_CORE1_IOPAD(0x2176, PIN_INPUT_PULLUP | MUX_MODE4) /* uart2_rts.gpio_145 */
91 usb_hub_pins: pinmux_usb_hub_pins {
92 pinctrl-single,pins = <
93 OMAP3_CORE1_IOPAD(0x2184, PIN_OUTPUT | MUX_MODE4) /* mcbsp4_clkx.gpio_152 - USB HUB RST */
99 pinctrl-names = "default";
100 pinctrl-0 = <&phy1_reset_pins>;
101 reset-gpios = <&gpio5 18 GPIO_ACTIVE_LOW>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&phy2_reset_pins>;
107 reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>;
120 pinctrl-names = "default";
121 pinctrl-0 = <&otg_drv_vbus>;
125 vmmc-supply = <&vmmc>;
129 pinctrl-names = "default";
130 pinctrl-0 = <&mmc2_pins>;
131 vmmc-supply = <&wl12xx_vmmc2>;
132 vmmc_aux-supply = <&wl12xx_vaux2>;
137 #address-cells = <1>;
140 compatible = "ti,wl1271";
142 interrupt-parent = <&gpio5>;
143 interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; /* gpio 145 */
144 ref-clock-frequency = <38400000>;
151 pinctrl-names = "default";
154 &dss_dpi_pins_cm_t35x