mm: hugetlb: fix hugepage memory leak caused by wrong reserve count
[linux/fpc-iii.git] / arch / arm / boot / dts / omap3-overo-base.dtsi
bloba29ad16cc9bbddec399cef41a00106bc636a14a0
1 /*
2  * Copyright (C) 2012 Florian Vaussard, EPFL Mobots group
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
9 /*
10  * The Gumstix Overo must be combined with an expansion board.
11  */
13 / {
14         pwmleds {
15                 compatible = "pwm-leds";
17                 overo {
18                         label = "overo:blue:COM";
19                         pwms = <&twl_pwmled 1 7812500>;
20                         max-brightness = <127>;
21                         linux,default-trigger = "mmc0";
22                 };
23         };
25         sound {
26                 compatible = "ti,omap-twl4030";
27                 ti,model = "overo";
29                 ti,mcbsp = <&mcbsp2>;
30         };
32         /* HS USB Port 2 Power */
33         hsusb2_power: hsusb2_power_reg {
34                 compatible = "regulator-fixed";
35                 regulator-name = "hsusb2_vbus";
36                 regulator-min-microvolt = <5000000>;
37                 regulator-max-microvolt = <5000000>;
38                 gpio = <&gpio6 8 GPIO_ACTIVE_HIGH>;             /* gpio_168: vbus enable */
39                 startup-delay-us = <70000>;
40                 enable-active-high;
41         };
43         /* HS USB Host PHY on PORT 2 */
44         hsusb2_phy: hsusb2_phy {
45                 compatible = "usb-nop-xceiv";
46                 reset-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;      /* gpio_183 */
47                 vcc-supply = <&hsusb2_power>;
48         };
50         /* Regulator to trigger the nPoweron signal of the Wifi module */
51         w3cbw003c_npoweron: regulator-w3cbw003c-npoweron {
52                 compatible = "regulator-fixed";
53                 regulator-name = "regulator-w3cbw003c-npoweron";
54                 regulator-min-microvolt = <3300000>;
55                 regulator-max-microvolt = <3300000>;
56                 gpio = <&gpio2 22 GPIO_ACTIVE_HIGH>;            /* gpio_54: nPoweron */
57                 enable-active-high;
58         };
60         /* Regulator to trigger the nReset signal of the Wifi module */
61         w3cbw003c_wifi_nreset: regulator-w3cbw003c-wifi-nreset {
62                 pinctrl-names = "default";
63                 pinctrl-0 = <&w3cbw003c_pins &w3cbw003c_2_pins>;
64                 compatible = "regulator-fixed";
65                 regulator-name = "regulator-w3cbw003c-wifi-nreset";
66                 regulator-min-microvolt = <3300000>;
67                 regulator-max-microvolt = <3300000>;
68                 gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>;            /* gpio_16: WiFi nReset */
69                 startup-delay-us = <10000>;
70         };
72         /* Regulator to trigger the nReset signal of the Bluetooth module */
73         w3cbw003c_bt_nreset: regulator-w3cbw003c-bt-nreset {
74                 compatible = "regulator-fixed";
75                 regulator-name = "regulator-w3cbw003c-bt-nreset";
76                 regulator-min-microvolt = <3300000>;
77                 regulator-max-microvolt = <3300000>;
78                 gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;             /* gpio_164: BT nReset */
79                 startup-delay-us = <10000>;
80         };
83 &omap3_pmx_core {
84         pinctrl-names = "default";
85         pinctrl-0 = <
86                         &hsusb2_pins
87         >;
89         uart2_pins: pinmux_uart2_pins {
90                 pinctrl-single,pins = <
91                         OMAP3_CORE1_IOPAD(0x216c, PIN_INPUT | MUX_MODE1)        /* mcbsp3_dx.uart2_cts */
92                         OMAP3_CORE1_IOPAD(0x216e, PIN_OUTPUT | MUX_MODE1)       /* mcbsp3_dr.uart2_rts */
93                         OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1)       /* mcbsp3_clk.uart2_tx */
94                         OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1)        /* mcbsp3_fsx.uart2_rx */
95                 >;
96         };
98         i2c1_pins: pinmux_i2c1_pins {
99                 pinctrl-single,pins = <
100                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)                /* i2c1_scl.i2c1_scl */
101                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)                /* i2c1_sda.i2c1_sda */
102                 >;
103         };
105         mmc1_pins: pinmux_mmc1_pins {
106                 pinctrl-single,pins = <
107                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_clk.sdmmc1_clk */
108                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_cmd.sdmmc1_cmd */
109                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat0.sdmmc1_dat0 */
110                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat1.sdmmc1_dat1 */
111                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat2.sdmmc1_dat2 */
112                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat3.sdmmc1_dat3 */
113                 >;
114         };
116         mmc2_pins: pinmux_mmc2_pins {
117                 pinctrl-single,pins = <
118                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_clk.sdmmc2_clk */
119                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_cmd.sdmmc2_cmd */
120                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat0.sdmmc2_dat0 */
121                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat1.sdmmc2_dat1 */
122                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat2.sdmmc2_dat2 */
123                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat3.sdmmc2_dat3 */
124                 >;
125         };
127         /* WiFi/BT combo */
128         w3cbw003c_pins: pinmux_w3cbw003c_pins {
129                 pinctrl-single,pins = <
130                         OMAP3_CORE1_IOPAD(0x20b4, PIN_OUTPUT | MUX_MODE4)               /* gpmc_ncs3.gpio_54 */
131                         OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)               /* uart3_rts_sd.gpio_164 */
132                 >;
133         };
135         hsusb2_pins: pinmux_hsusb2_pins {
136                 pinctrl-single,pins = <
137                         OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi1_cs3.hsusb2_data2 */
138                         OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_clk.hsusb2_data7 */
139                         OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_simo.hsusb2_data4 */
140                         OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_somi.hsusb2_data5 */
141                         OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs0.hsusb2_data6 */
142                         OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)       /* mcspi2_cs1.hsusb2_data3 */
143                         OMAP3_CORE1_IOPAD(0x21be, PIN_OUTPUT | MUX_MODE4)               /* i2c2_scl.gpio_168 */
144                         OMAP3_CORE1_IOPAD(0x21c0, PIN_OUTPUT | MUX_MODE4)               /* i2c2_sda.gpio_183 */
145                 >;
146         };
149 &i2c1 {
150         pinctrl-names = "default";
151         pinctrl-0 = <&i2c1_pins>;
152         clock-frequency = <2600000>;
154         twl: twl@48 {
155                 reg = <0x48>;
156                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
157                 interrupt-parent = <&intc>;
159                 twl_audio: audio {
160                         compatible = "ti,twl4030-audio";
161                         codec {
162                         };
163                 };
164         };
167 #include "twl4030.dtsi"
168 #include "twl4030_omap3.dtsi"
170 /* i2c2 pins are used for gpio */
171 &i2c2 {
172         status = "disabled";
175 /* on board microSD slot */
176 &mmc1 {
177         pinctrl-names = "default";
178         pinctrl-0 = <&mmc1_pins>;
179         vmmc-supply = <&vmmc1>;
180         bus-width = <4>;
183 /* optional on board WiFi */
184 &mmc2 {
185         pinctrl-names = "default";
186         pinctrl-0 = <&mmc2_pins>;
187         vmmc-supply = <&w3cbw003c_npoweron>;
188         vqmmc-supply = <&w3cbw003c_bt_nreset>;
189         vmmc_aux-supply = <&w3cbw003c_wifi_nreset>;
190         bus-width = <4>;
191         cap-sdio-irq;
192         non-removable;
195 &twl_gpio {
196         ti,use-leds;
199 &usb_otg_hs {
200         interface-type = <0>;
201         usb-phy = <&usb2_phy>;
202         phys = <&usb2_phy>;
203         phy-names = "usb2-phy";
204         mode = <3>;
205         power = <50>;
208 &usbhshost {
209         port2-mode = "ehci-phy";
212 &usbhsehci {
213         phys = <0 &hsusb2_phy>;
216 &uart2 {
217         pinctrl-names = "default";
218         pinctrl-0 = <&uart2_pins>;
221 &mcbsp2 {
222         status = "okay";
225 &gpmc {
226         ranges = <0 0 0x00000000 0x20000000>;
228         nand@0,0 {
229                 linux,mtd-name= "micron,mt29c4g96maz";
230                 reg = <0 0 0>;
231                 nand-bus-width = <16>;
232                 gpmc,device-width = <2>;
233                 ti,nand-ecc-opt = "bch8";
235                 gpmc,sync-clk-ps = <0>;
236                 gpmc,cs-on-ns = <0>;
237                 gpmc,cs-rd-off-ns = <44>;
238                 gpmc,cs-wr-off-ns = <44>;
239                 gpmc,adv-on-ns = <6>;
240                 gpmc,adv-rd-off-ns = <34>;
241                 gpmc,adv-wr-off-ns = <44>;
242                 gpmc,we-off-ns = <40>;
243                 gpmc,oe-off-ns = <54>;
244                 gpmc,access-ns = <64>;
245                 gpmc,rd-cycle-ns = <82>;
246                 gpmc,wr-cycle-ns = <82>;
247                 gpmc,wr-access-ns = <40>;
248                 gpmc,wr-data-mux-bus-ns = <0>;
250                 #address-cells = <1>;
251                 #size-cells = <1>;
253                 partition@0 {
254                         label = "SPL";
255                         reg = <0 0x80000>; /* 512KiB */
256                 };
257                 partition@80000 {
258                         label = "U-Boot";
259                         reg = <0x80000 0x1C0000>; /* 1792KiB */
260                 };
261                 partition@1c0000 {
262                         label = "Environment";
263                         reg = <0x240000 0x40000>; /* 256KiB */
264                 };
265                 partition@280000 {
266                         label = "Kernel";
267                         reg = <0x280000 0x800000>; /* 8192KiB */
268                 };
269                 partition@780000 {
270                         label = "Filesystem";
271                         reg = <0xA80000 0>;
272                         /* HACK: MTDPART_SIZ_FULL=0 so fill to end */
273                 };
274         };