mm: hugetlb: fix hugepage memory leak caused by wrong reserve count
[linux/fpc-iii.git] / arch / arm / boot / dts / r8a7794-silk.dts
blob48ff3e2958ae68d5e81b6713379cba6f2b100c3f
1 /*
2  * Device Tree Source for the SILK board
3  *
4  * Copyright (C) 2014 Renesas Electronics Corporation
5  * Copyright (C) 2014-2015 Renesas Solutions Corp.
6  * Copyright (C) 2014-2015 Cogent Embedded, Inc.
7  *
8  * This file is licensed under the terms of the GNU General Public License
9  * version 2.  This program is licensed "as is" without any warranty of any
10  * kind, whether express or implied.
11  */
13 /dts-v1/;
14 #include "r8a7794.dtsi"
16 / {
17         model = "SILK";
18         compatible = "renesas,silk", "renesas,r8a7794";
20         aliases {
21                 serial0 = &scif2;
22         };
24         chosen {
25                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
26                 stdout-path = &scif2;
27         };
29         memory@40000000 {
30                 device_type = "memory";
31                 reg = <0 0x40000000 0 0x40000000>;
32         };
34         d3_3v: regulator@0 {
35                 compatible = "regulator-fixed";
36                 regulator-name = "D3.3V";
37                 regulator-min-microvolt = <3300000>;
38                 regulator-max-microvolt = <3300000>;
39                 regulator-boot-on;
40                 regulator-always-on;
41         };
44 &extal_clk {
45         clock-frequency = <20000000>;
48 &pfc {
49         scif2_pins: serial2 {
50                 renesas,groups = "scif2_data";
51                 renesas,function = "scif2";
52         };
54         ether_pins: ether {
55                 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
56                 renesas,function = "eth";
57         };
59         phy1_pins: phy1 {
60                 renesas,groups = "intc_irq8";
61                 renesas,function = "intc";
62         };
64         i2c1_pins: i2c1 {
65                 renesas,groups = "i2c1";
66                 renesas,function = "i2c1";
67         };
69         mmcif0_pins: mmcif0 {
70                 renesas,groups = "mmc_data8", "mmc_ctrl";
71                 renesas,function = "mmc";
72         };
74         qspi_pins: spi0 {
75                 renesas,groups = "qspi_ctrl", "qspi_data4";
76                 renesas,function = "qspi";
77         };
79         vin0_pins: vin0 {
80                 renesas,groups = "vin0_data8", "vin0_clk";
81                 renesas,function = "vin0";
82         };
84         usb0_pins: usb0 {
85                 renesas,groups = "usb0";
86                 renesas,function = "usb0";
87         };
89         usb1_pins: usb1 {
90                 renesas,groups = "usb1";
91                 renesas,function = "usb1";
92         };
95 &scif2 {
96         pinctrl-0 = <&scif2_pins>;
97         pinctrl-names = "default";
99         status = "okay";
102 &ether {
103         pinctrl-0 = <&ether_pins &phy1_pins>;
104         pinctrl-names = "default";
106         phy-handle = <&phy1>;
107         renesas,ether-link-active-low;
108         status = "okay";
110         phy1: ethernet-phy@1 {
111                 reg = <1>;
112                 interrupt-parent = <&irqc0>;
113                 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
114                 micrel,led-mode = <1>;
115         };
118 &i2c1 {
119         pinctrl-0 = <&i2c1_pins>;
120         pinctrl-names = "default";
122         status = "okay";
123         clock-frequency = <400000>;
125         composite-in@20 {
126                 compatible = "adi,adv7180";
127                 reg = <0x20>;
128                 remote = <&vin0>;
130                 port {
131                         adv7180: endpoint {
132                                 bus-width = <8>;
133                                 remote-endpoint = <&vin0ep>;
134                         };
135                 };
136         };
139 &mmcif0 {
140         pinctrl-0 = <&mmcif0_pins>;
141         pinctrl-names = "default";
143         vmmc-supply = <&d3_3v>;
144         vqmmc-supply = <&d3_3v>;
145         bus-width = <8>;
146         non-removable;
147         status = "okay";
150 &qspi {
151         pinctrl-0 = <&qspi_pins>;
152         pinctrl-names = "default";
154         status = "okay";
156         flash@0 {
157                 #address-cells = <1>;
158                 #size-cells = <1>;
159                 compatible = "spansion,s25fl512s", "jedec,spi-nor";
160                 reg = <0>;
161                 spi-max-frequency = <30000000>;
162                 spi-tx-bus-width = <4>;
163                 spi-rx-bus-width = <4>;
164                 spi-cpol;
165                 spi-cpha;
166                 m25p,fast-read;
168                 partition@0 {
169                         label = "loader";
170                         reg = <0x00000000 0x00040000>;
171                         read-only;
172                 };
173                 partition@40000 {
174                         label = "user";
175                         reg = <0x00040000 0x00400000>;
176                         read-only;
177                 };
178                 partition@440000 {
179                         label = "flash";
180                         reg = <0x00440000 0x03bc0000>;
181                 };
182         };
185 /* composite video input */
186 &vin0 {
187         status = "okay";
188         pinctrl-0 = <&vin0_pins>;
189         pinctrl-names = "default";
191         port {
192                 #address-cells = <1>;
193                 #size-cells = <0>;
195                 vin0ep: endpoint {
196                         remote-endpoint = <&adv7180>;
197                         bus-width = <8>;
198                 };
199         };
202 &pci0 {
203         status = "okay";
204         pinctrl-0 = <&usb0_pins>;
205         pinctrl-names = "default";
208 &pci1 {
209         status = "okay";
210         pinctrl-0 = <&usb1_pins>;
211         pinctrl-names = "default";
214 &usbphy {
215         status = "okay";