mm: hugetlb: fix hugepage memory leak caused by wrong reserve count
[linux/fpc-iii.git] / arch / arm / boot / dts / rk3288-rock2-som.dtsi
blob1813b7c36556e025c724f7fb7fccefd9c9252743
1 /*
2  * This file is dual-licensed: you can use it either under the terms
3  * of the GPL or the X11 license, at your option. Note that this dual
4  * licensing only applies to this file, and not this project as a
5  * whole.
6  *
7  *  a) This file is free software; you can redistribute it and/or
8  *     modify it under the terms of the GNU General Public License as
9  *     published by the Free Software Foundation; either version 2 of the
10  *     License, or (at your option) any later version.
11  *
12  *     This file is distributed in the hope that it will be useful,
13  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
14  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  *     GNU General Public License for more details.
16  *
17  * Or, alternatively,
18  *
19  *  b) Permission is hereby granted, free of charge, to any person
20  *     obtaining a copy of this software and associated documentation
21  *     files (the "Software"), to deal in the Software without
22  *     restriction, including without limitation the rights to use,
23  *     copy, modify, merge, publish, distribute, sublicense, and/or
24  *     sell copies of the Software, and to permit persons to whom the
25  *     Software is furnished to do so, subject to the following
26  *     conditions:
27  *
28  *     The above copyright notice and this permission notice shall be
29  *     included in all copies or substantial portions of the Software.
30  *
31  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
32  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
33  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
34  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
35  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
36  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
37  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
38  *     OTHER DEALINGS IN THE SOFTWARE.
39  */
41 #include <dt-bindings/pwm/pwm.h>
42 #include "rk3288.dtsi"
44 / {
45         memory {
46                 reg = <0x0 0x80000000>;
47                 device_type = "memory";
48         };
50         emmc_pwrseq: emmc-pwrseq {
51                 compatible = "mmc-pwrseq-emmc";
52                 pinctrl-0 = <&emmc_reset>;
53                 pinctrl-names = "default";
54                 reset-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
55         };
57         ext_gmac: external-gmac-clock {
58                 compatible = "fixed-clock";
59                 #clock-cells = <0>;
60                 clock-frequency = <125000000>;
61                 clock-output-names = "ext_gmac";
62         };
64         vcc_sys: vsys-regulator {
65                 compatible = "regulator-fixed";
66                 regulator-name = "vcc_sys";
67                 regulator-min-microvolt = <5000000>;
68                 regulator-max-microvolt = <5000000>;
69                 regulator-always-on;
70                 regulator-boot-on;
71         };
74 &cpu0 {
75         cpu0-supply = <&vdd_cpu>;
78 &emmc {
79         bus-width = <8>;
80         cap-mmc-highspeed;
81         disable-wp;
82         non-removable;
83         num-slots = <1>;
84         mmc-pwrseq = <&emmc_pwrseq>;
85         pinctrl-names = "default";
86         pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
87         vmmc-supply = <&vcc_io>;
88         status = "okay";
91 &gmac {
92         assigned-clocks = <&cru SCLK_MAC>;
93         assigned-clock-parents = <&ext_gmac>;
94         clock_in_out = "input";
95         phy-mode = "rgmii";
96         phy-supply = <&vccio_pmu>;
97         pinctrl-names = "default";
98         pinctrl-0 = <&rgmii_pins &phy_rst>;
99         snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
100         snps,reset-active-low;
101         snps,reset-delays-us = <0 10000 30000>;
102         rx_delay = <0x10>;
103         tx_delay = <0x30>;
106 &i2c0 {
107         status = "okay";
109         act8846: act8846@5a {
110                 compatible = "active-semi,act8846";
111                 reg = <0x5a>;
112                 inl1-supply = <&vcc_io>;
113                 inl2-supply = <&vcc_sys>;
114                 inl3-supply = <&vcc_20>;
115                 vp1-supply = <&vcc_sys>;
116                 vp2-supply = <&vcc_sys>;
117                 vp3-supply = <&vcc_sys>;
118                 vp4-supply = <&vcc_sys>;
120                 regulators {
121                         vcc_ddr: REG1 {
122                                 regulator-name = "VCC_DDR";
123                                 regulator-min-microvolt = <1200000>;
124                                 regulator-max-microvolt = <1200000>;
125                                 regulator-always-on;
126                         };
128                         vcc_io: REG2 {
129                                 regulator-name = "VCC_IO";
130                                 regulator-min-microvolt = <3300000>;
131                                 regulator-max-microvolt = <3300000>;
132                                 regulator-always-on;
133                         };
135                         vdd_log: REG3 {
136                                 regulator-name = "VDD_LOG";
137                                 regulator-min-microvolt = <1000000>;
138                                 regulator-max-microvolt = <1000000>;
139                                 regulator-always-on;
140                         };
142                         vcc_20: REG4 {
143                                 regulator-name = "VCC_20";
144                                 regulator-min-microvolt = <2000000>;
145                                 regulator-max-microvolt = <2000000>;
146                                 regulator-always-on;
147                         };
149                         vccio_sd: REG5 {
150                                 regulator-name = "VCCIO_SD";
151                                 regulator-min-microvolt = <3300000>;
152                                 regulator-max-microvolt = <3300000>;
153                                 regulator-always-on;
154                         };
156                         vdd10_lcd: REG6 {
157                                 regulator-name = "VDD10_LCD";
158                                 regulator-min-microvolt = <1000000>;
159                                 regulator-max-microvolt = <1000000>;
160                                 regulator-always-on;
161                         };
163                         vcca_codec: REG7 {
164                                 regulator-name = "VCCA_CODEC";
165                                 regulator-min-microvolt = <3300000>;
166                                 regulator-max-microvolt = <3300000>;
167                                 regulator-always-on;
168                         };
170                         vcca_tp: REG8 {
171                                 regulator-name = "VCCA_TP";
172                                 regulator-min-microvolt = <3300000>;
173                                 regulator-max-microvolt = <3300000>;
174                                 regulator-always-on;
175                         };
177                         vccio_pmu: REG9 {
178                                 regulator-name = "VCCIO_PMU";
179                                 regulator-min-microvolt = <3300000>;
180                                 regulator-max-microvolt = <3300000>;
181                                 regulator-always-on;
182                         };
184                         vdd_10: REG10 {
185                                 regulator-name = "VDD_10";
186                                 regulator-min-microvolt = <1000000>;
187                                 regulator-max-microvolt = <1000000>;
188                                 regulator-always-on;
189                         };
191                         vcc_18: REG11 {
192                                 regulator-name = "VCC_18";
193                                 regulator-min-microvolt = <1800000>;
194                                 regulator-max-microvolt = <1800000>;
195                                 regulator-always-on;
196                         };
198                         vcc18_lcd: REG12 {
199                                 regulator-name = "VCC18_LCD";
200                                 regulator-min-microvolt = <1800000>;
201                                 regulator-max-microvolt = <1800000>;
202                                 regulator-always-on;
203                         };
204                 };
205         };
207         vdd_cpu: syr827@40 {
208                 compatible = "silergy,syr827";
209                 reg = <0x40>;
210                 fcs,suspend-voltage-selector = <1>;
211                 regulator-always-on;
212                 regulator-boot-on;
213                 regulator-enable-ramp-delay = <300>;
214                 regulator-name = "vdd_cpu";
215                 regulator-min-microvolt = <850000>;
216                 regulator-max-microvolt = <1350000>;
217                 regulator-ramp-delay = <8000>;
218                 vin-supply = <&vcc_sys>;
219         };
221         vdd_gpu: syr828@41 {
222                 compatible = "silergy,syr828";
223                 reg = <0x41>;
224                 fcs,suspend-voltage-selector = <1>;
225                 regulator-always-on;
226                 regulator-enable-ramp-delay = <300>;
227                 regulator-min-microvolt = <850000>;
228                 regulator-max-microvolt = <1350000>;
229                 regulator-name = "vdd_gpu";
230                 regulator-ramp-delay = <8000>;
231                 vin-supply = <&vcc_sys>;
232         };
235 &pinctrl {
236         pcfg_output_high: pcfg-output-high {
237                 output-high;
238         };
240         emmc {
241                         emmc_reset: emmc-reset {
242                                 rockchip,pins = <3 9 RK_FUNC_GPIO &pcfg_pull_none>;
243                         };
244         };
246         gmac {
247                 phy_rst: phy-rst {
248                         rockchip,pins = <4 8 RK_FUNC_GPIO  &pcfg_output_high>;
249                 };
250         };
253 &tsadc {
254         rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
255         rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
256         status = "okay";
259 &vopb {
260         status = "okay";
263 &vopb_mmu {
264         status = "okay";
267 &vopl {
268         status = "okay";
271 &vopl_mmu {
272         status = "okay";
275 &wdt {
276         status = "okay";