mm: hugetlb: fix hugepage memory leak caused by wrong reserve count
[linux/fpc-iii.git] / arch / arm / boot / dts / rk3288-veyron-jerry.dts
blob60bd6e91e30808b9792ae45d2762a23685317650
1 /*
2  * Google Veyron Jerry Rev 3+ board device tree source
3  *
4  * Copyright 2015 Google, Inc
5  *
6  * This file is dual-licensed: you can use it either under the terms
7  * of the GPL or the X11 license, at your option. Note that this dual
8  * licensing only applies to this file, and not this project as a
9  * whole.
10  *
11  *  a) This file is free software; you can redistribute it and/or
12  *     modify it under the terms of the GNU General Public License as
13  *     published by the Free Software Foundation; either version 2 of the
14  *     License, or (at your option) any later version.
15  *
16  *     This file is distributed in the hope that it will be useful,
17  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
18  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  *     GNU General Public License for more details.
20  *
21  *  Or, alternatively,
22  *
23  *  b) Permission is hereby granted, free of charge, to any person
24  *     obtaining a copy of this software and associated documentation
25  *     files (the "Software"), to deal in the Software without
26  *     restriction, including without limitation the rights to use,
27  *     copy, modify, merge, publish, distribute, sublicense, and/or
28  *     sell copies of the Software, and to permit persons to whom the
29  *     Software is furnished to do so, subject to the following
30  *     conditions:
31  *
32  *     The above copyright notice and this permission notice shall be
33  *     included in all copies or substantial portions of the Software.
34  *
35  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42  *     OTHER DEALINGS IN THE SOFTWARE.
43  */
45 /dts-v1/;
46 #include "rk3288-veyron-chromebook.dtsi"
47 #include "cros-ec-sbs.dtsi"
49 / {
50         model = "Google Jerry";
51         compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
52                      "google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
53                      "google,veyron-jerry-rev3", "google,veyron-jerry",
54                      "google,veyron", "rockchip,rk3288";
56         panel_regulator: panel-regulator {
57                 compatible = "regulator-fixed";
58                 enable-active-high;
59                 gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
60                 pinctrl-names = "default";
61                 pinctrl-0 = <&lcd_enable_h>;
62                 regulator-name = "panel_regulator";
63                 vin-supply = <&vcc33_sys>;
64         };
66         vcc18_lcd: vcc18-lcd {
67                 compatible = "regulator-fixed";
68                 enable-active-high;
69                 gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
70                 pinctrl-names = "default";
71                 pinctrl-0 = <&avdd_1v8_disp_en>;
72                 regulator-name = "vcc18_lcd";
73                 regulator-always-on;
74                 regulator-boot-on;
75                 vin-supply = <&vcc18_wl>;
76         };
78         backlight_regulator: backlight-regulator {
79                 compatible = "regulator-fixed";
80                 enable-active-high;
81                 gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
82                 pinctrl-names = "default";
83                 pinctrl-0 = <&bl_pwr_en>;
84                 regulator-name = "backlight_regulator";
85                 vin-supply = <&vcc33_sys>;
86                 startup-delay-us = <15000>;
87         };
90 &rk808 {
91         pinctrl-names = "default";
92         pinctrl-0 = <&pmic_int_l>;
94         regulators {
95                 mic_vcc: LDO_REG2 {
96                         regulator-name = "mic_vcc";
97                         regulator-always-on;
98                         regulator-boot-on;
99                         regulator-min-microvolt = <1800000>;
100                         regulator-max-microvolt = <1800000>;
101                         regulator-state-mem {
102                                 regulator-off-in-suspend;
103                         };
104                 };
105         };
108 &sdmmc {
109         disable-wp;
110         pinctrl-names = "default";
111         pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
112                         &sdmmc_bus4>;
115 &vcc_5v {
116         enable-active-high;
117         gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
118         pinctrl-names = "default";
119         pinctrl-0 = <&drv_5v>;
122 &vcc50_hdmi {
123         enable-active-high;
124         gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
125         pinctrl-names = "default";
126         pinctrl-0 = <&vcc50_hdmi_en>;
129 &pinctrl {
130         backlight {
131                 bl_pwr_en: bl_pwr_en {
132                         rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
133                 };
134         };
136         buck-5v {
137                 drv_5v: drv-5v {
138                         rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
139                 };
140         };
142         hdmi {
143                 vcc50_hdmi_en: vcc50-hdmi-en {
144                         rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
145                 };
146         };
148         lcd {
149                 lcd_enable_h: lcd-en {
150                         rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
151                 };
153                 avdd_1v8_disp_en: avdd-1v8-disp-en {
154                         rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
155                 };
156         };
158         pmic {
159                 dvs_1: dvs-1 {
160                         rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
161                 };
163                 dvs_2: dvs-2 {
164                         rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
165                 };
166         };
169 &i2c4 {
170         status = "okay";
172         /*
173          * Trackpad pin control is shared between Elan and Synaptics devices
174          * so we have to pull it up to the bus level.
175          */
176         pinctrl-names = "default";
177         pinctrl-0 = <&i2c4_xfer &trackpad_int>;
179         trackpad@15 {
180                 /*
181                  * Remove the inherited pinctrl settings to avoid clashing
182                  * with bus-wide ones.
183                  */
184                 /delete-property/pinctrl-names;
185                 /delete-property/pinctrl-0;
186         };
188         trackpad@2c {
189                 compatible = "hid-over-i2c";
190                 interrupt-parent = <&gpio7>;
191                 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
192                 reg = <0x2c>;
193                 hid-descr-addr = <0x0020>;
194                 vcc-supply = <&vcc33_io>;
195                 wakeup-source;
196         };