mm: hugetlb: fix hugepage memory leak caused by wrong reserve count
[linux/fpc-iii.git] / arch / arm / mach-w90x900 / include / mach / regs-timer.h
blob8f390620c0e42149e851a749ad02f1b18859291f
1 /*
2 * arch/arm/mach-w90x900/include/mach/regs-timer.h
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
7 * Wan ZongShun <mcuos.com@gmail.com>
9 * Based on arch/arm/mach-s3c2410/include/mach/regs-timer.h
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
18 #ifndef __ASM_ARCH_REGS_TIMER_H
19 #define __ASM_ARCH_REGS_TIMER_H
21 /* Timer Registers */
23 #define TMR_BA W90X900_VA_TIMER
24 #define REG_TCSR0 (TMR_BA+0x00)
25 #define REG_TCSR1 (TMR_BA+0x04)
26 #define REG_TICR0 (TMR_BA+0x08)
27 #define REG_TICR1 (TMR_BA+0x0C)
28 #define REG_TDR0 (TMR_BA+0x10)
29 #define REG_TDR1 (TMR_BA+0x14)
30 #define REG_TISR (TMR_BA+0x18)
31 #define REG_WTCR (TMR_BA+0x1C)
32 #define REG_TCSR2 (TMR_BA+0x20)
33 #define REG_TCSR3 (TMR_BA+0x24)
34 #define REG_TICR2 (TMR_BA+0x28)
35 #define REG_TICR3 (TMR_BA+0x2C)
36 #define REG_TDR2 (TMR_BA+0x30)
37 #define REG_TDR3 (TMR_BA+0x34)
38 #define REG_TCSR4 (TMR_BA+0x40)
39 #define REG_TICR4 (TMR_BA+0x48)
40 #define REG_TDR4 (TMR_BA+0x50)
42 #endif /* __ASM_ARCH_REGS_TIMER_H */