arch/arm64/include/asm/dcc.h

   1 /* Copyright (c) 2014-2015 The Linux Foundation. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  * A call to __dcc_getchar() or __dcc_putchar() is typically followed by
  13  * a call to __dcc_getstatus().  We want to make sure that the CPU does
  14  * not speculative read the DCC status before executing the read or write
  15  * instruction.  That's what the ISBs are for.
  16  *
  17  * The 'volatile' ensures that the compiler does not cache the status bits,
  18  * and instead reads the DCC register every time.
  19  */
  20 #ifndef __ASM_DCC_H
  21 #define __ASM_DCC_H
  22
  23 #include <asm/barrier.h>
  24
  25 static inline u32 __dcc_getstatus(void)
  26 {
  27         u32 ret;
  28
  29         asm volatile("mrs %0, mdccsr_el0" : "=r" (ret));
  30
  31         return ret;
  32 }
  33
  34 static inline char __dcc_getchar(void)
  35 {
  36         char c;
  37
  38         asm volatile("mrs %0, dbgdtrrx_el0" : "=r" (c));
  39         isb();
  40
  41         return c;
  42 }
  43
  44 static inline void __dcc_putchar(char c)
  45 {
  46         /*
  47          * The typecast is to make absolutely certain that 'c' is
  48          * zero-extended.
  49          */
  50         asm volatile("msr dbgdtrtx_el0, %0"
  51                         : : "r" ((unsigned long)(unsigned char)c));
  52         isb();
  53 }
  54
  55 #endif