mm: hugetlb: fix hugepage memory leak caused by wrong reserve count
[linux/fpc-iii.git] / arch / arm64 / kernel / debug-monitors.c
blob8aee3aeec3e687edde6f5be67233299e7a4f7d4f
1 /*
2 * ARMv8 single-step debug support and mdscr context switching.
4 * Copyright (C) 2012 ARM Limited
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 * Author: Will Deacon <will.deacon@arm.com>
21 #include <linux/cpu.h>
22 #include <linux/debugfs.h>
23 #include <linux/hardirq.h>
24 #include <linux/init.h>
25 #include <linux/ptrace.h>
26 #include <linux/stat.h>
27 #include <linux/uaccess.h>
29 #include <asm/cpufeature.h>
30 #include <asm/cputype.h>
31 #include <asm/debug-monitors.h>
32 #include <asm/system_misc.h>
34 /* Determine debug architecture. */
35 u8 debug_monitors_arch(void)
37 return cpuid_feature_extract_field(read_system_reg(SYS_ID_AA64DFR0_EL1),
38 ID_AA64DFR0_DEBUGVER_SHIFT);
42 * MDSCR access routines.
44 static void mdscr_write(u32 mdscr)
46 unsigned long flags;
47 local_dbg_save(flags);
48 asm volatile("msr mdscr_el1, %0" :: "r" (mdscr));
49 local_dbg_restore(flags);
52 static u32 mdscr_read(void)
54 u32 mdscr;
55 asm volatile("mrs %0, mdscr_el1" : "=r" (mdscr));
56 return mdscr;
60 * Allow root to disable self-hosted debug from userspace.
61 * This is useful if you want to connect an external JTAG debugger.
63 static bool debug_enabled = true;
65 static int create_debug_debugfs_entry(void)
67 debugfs_create_bool("debug_enabled", 0644, NULL, &debug_enabled);
68 return 0;
70 fs_initcall(create_debug_debugfs_entry);
72 static int __init early_debug_disable(char *buf)
74 debug_enabled = false;
75 return 0;
78 early_param("nodebugmon", early_debug_disable);
81 * Keep track of debug users on each core.
82 * The ref counts are per-cpu so we use a local_t type.
84 static DEFINE_PER_CPU(int, mde_ref_count);
85 static DEFINE_PER_CPU(int, kde_ref_count);
87 void enable_debug_monitors(enum dbg_active_el el)
89 u32 mdscr, enable = 0;
91 WARN_ON(preemptible());
93 if (this_cpu_inc_return(mde_ref_count) == 1)
94 enable = DBG_MDSCR_MDE;
96 if (el == DBG_ACTIVE_EL1 &&
97 this_cpu_inc_return(kde_ref_count) == 1)
98 enable |= DBG_MDSCR_KDE;
100 if (enable && debug_enabled) {
101 mdscr = mdscr_read();
102 mdscr |= enable;
103 mdscr_write(mdscr);
107 void disable_debug_monitors(enum dbg_active_el el)
109 u32 mdscr, disable = 0;
111 WARN_ON(preemptible());
113 if (this_cpu_dec_return(mde_ref_count) == 0)
114 disable = ~DBG_MDSCR_MDE;
116 if (el == DBG_ACTIVE_EL1 &&
117 this_cpu_dec_return(kde_ref_count) == 0)
118 disable &= ~DBG_MDSCR_KDE;
120 if (disable) {
121 mdscr = mdscr_read();
122 mdscr &= disable;
123 mdscr_write(mdscr);
128 * OS lock clearing.
130 static void clear_os_lock(void *unused)
132 asm volatile("msr oslar_el1, %0" : : "r" (0));
135 static int os_lock_notify(struct notifier_block *self,
136 unsigned long action, void *data)
138 int cpu = (unsigned long)data;
139 if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE)
140 smp_call_function_single(cpu, clear_os_lock, NULL, 1);
141 return NOTIFY_OK;
144 static struct notifier_block os_lock_nb = {
145 .notifier_call = os_lock_notify,
148 static int debug_monitors_init(void)
150 cpu_notifier_register_begin();
152 /* Clear the OS lock. */
153 on_each_cpu(clear_os_lock, NULL, 1);
154 isb();
155 local_dbg_enable();
157 /* Register hotplug handler. */
158 __register_cpu_notifier(&os_lock_nb);
160 cpu_notifier_register_done();
161 return 0;
163 postcore_initcall(debug_monitors_init);
166 * Single step API and exception handling.
168 static void set_regs_spsr_ss(struct pt_regs *regs)
170 unsigned long spsr;
172 spsr = regs->pstate;
173 spsr &= ~DBG_SPSR_SS;
174 spsr |= DBG_SPSR_SS;
175 regs->pstate = spsr;
178 static void clear_regs_spsr_ss(struct pt_regs *regs)
180 unsigned long spsr;
182 spsr = regs->pstate;
183 spsr &= ~DBG_SPSR_SS;
184 regs->pstate = spsr;
187 /* EL1 Single Step Handler hooks */
188 static LIST_HEAD(step_hook);
189 static DEFINE_RWLOCK(step_hook_lock);
191 void register_step_hook(struct step_hook *hook)
193 write_lock(&step_hook_lock);
194 list_add(&hook->node, &step_hook);
195 write_unlock(&step_hook_lock);
198 void unregister_step_hook(struct step_hook *hook)
200 write_lock(&step_hook_lock);
201 list_del(&hook->node);
202 write_unlock(&step_hook_lock);
206 * Call registered single step handlers
207 * There is no Syndrome info to check for determining the handler.
208 * So we call all the registered handlers, until the right handler is
209 * found which returns zero.
211 static int call_step_hook(struct pt_regs *regs, unsigned int esr)
213 struct step_hook *hook;
214 int retval = DBG_HOOK_ERROR;
216 read_lock(&step_hook_lock);
218 list_for_each_entry(hook, &step_hook, node) {
219 retval = hook->fn(regs, esr);
220 if (retval == DBG_HOOK_HANDLED)
221 break;
224 read_unlock(&step_hook_lock);
226 return retval;
229 static int single_step_handler(unsigned long addr, unsigned int esr,
230 struct pt_regs *regs)
232 siginfo_t info;
235 * If we are stepping a pending breakpoint, call the hw_breakpoint
236 * handler first.
238 if (!reinstall_suspended_bps(regs))
239 return 0;
241 if (user_mode(regs)) {
242 info.si_signo = SIGTRAP;
243 info.si_errno = 0;
244 info.si_code = TRAP_HWBKPT;
245 info.si_addr = (void __user *)instruction_pointer(regs);
246 force_sig_info(SIGTRAP, &info, current);
249 * ptrace will disable single step unless explicitly
250 * asked to re-enable it. For other clients, it makes
251 * sense to leave it enabled (i.e. rewind the controls
252 * to the active-not-pending state).
254 user_rewind_single_step(current);
255 } else {
256 if (call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
257 return 0;
259 pr_warning("Unexpected kernel single-step exception at EL1\n");
261 * Re-enable stepping since we know that we will be
262 * returning to regs.
264 set_regs_spsr_ss(regs);
267 return 0;
271 * Breakpoint handler is re-entrant as another breakpoint can
272 * hit within breakpoint handler, especically in kprobes.
273 * Use reader/writer locks instead of plain spinlock.
275 static LIST_HEAD(break_hook);
276 static DEFINE_SPINLOCK(break_hook_lock);
278 void register_break_hook(struct break_hook *hook)
280 spin_lock(&break_hook_lock);
281 list_add_rcu(&hook->node, &break_hook);
282 spin_unlock(&break_hook_lock);
285 void unregister_break_hook(struct break_hook *hook)
287 spin_lock(&break_hook_lock);
288 list_del_rcu(&hook->node);
289 spin_unlock(&break_hook_lock);
290 synchronize_rcu();
293 static int call_break_hook(struct pt_regs *regs, unsigned int esr)
295 struct break_hook *hook;
296 int (*fn)(struct pt_regs *regs, unsigned int esr) = NULL;
298 rcu_read_lock();
299 list_for_each_entry_rcu(hook, &break_hook, node)
300 if ((esr & hook->esr_mask) == hook->esr_val)
301 fn = hook->fn;
302 rcu_read_unlock();
304 return fn ? fn(regs, esr) : DBG_HOOK_ERROR;
307 static int brk_handler(unsigned long addr, unsigned int esr,
308 struct pt_regs *regs)
310 siginfo_t info;
312 if (user_mode(regs)) {
313 info = (siginfo_t) {
314 .si_signo = SIGTRAP,
315 .si_errno = 0,
316 .si_code = TRAP_BRKPT,
317 .si_addr = (void __user *)instruction_pointer(regs),
320 force_sig_info(SIGTRAP, &info, current);
321 } else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
322 pr_warning("Unexpected kernel BRK exception at EL1\n");
323 return -EFAULT;
326 return 0;
329 int aarch32_break_handler(struct pt_regs *regs)
331 siginfo_t info;
332 u32 arm_instr;
333 u16 thumb_instr;
334 bool bp = false;
335 void __user *pc = (void __user *)instruction_pointer(regs);
337 if (!compat_user_mode(regs))
338 return -EFAULT;
340 if (compat_thumb_mode(regs)) {
341 /* get 16-bit Thumb instruction */
342 get_user(thumb_instr, (u16 __user *)pc);
343 thumb_instr = le16_to_cpu(thumb_instr);
344 if (thumb_instr == AARCH32_BREAK_THUMB2_LO) {
345 /* get second half of 32-bit Thumb-2 instruction */
346 get_user(thumb_instr, (u16 __user *)(pc + 2));
347 thumb_instr = le16_to_cpu(thumb_instr);
348 bp = thumb_instr == AARCH32_BREAK_THUMB2_HI;
349 } else {
350 bp = thumb_instr == AARCH32_BREAK_THUMB;
352 } else {
353 /* 32-bit ARM instruction */
354 get_user(arm_instr, (u32 __user *)pc);
355 arm_instr = le32_to_cpu(arm_instr);
356 bp = (arm_instr & ~0xf0000000) == AARCH32_BREAK_ARM;
359 if (!bp)
360 return -EFAULT;
362 info = (siginfo_t) {
363 .si_signo = SIGTRAP,
364 .si_errno = 0,
365 .si_code = TRAP_BRKPT,
366 .si_addr = pc,
369 force_sig_info(SIGTRAP, &info, current);
370 return 0;
373 static int __init debug_traps_init(void)
375 hook_debug_fault_code(DBG_ESR_EVT_HWSS, single_step_handler, SIGTRAP,
376 TRAP_HWBKPT, "single-step handler");
377 hook_debug_fault_code(DBG_ESR_EVT_BRK, brk_handler, SIGTRAP,
378 TRAP_BRKPT, "ptrace BRK handler");
379 return 0;
381 arch_initcall(debug_traps_init);
383 /* Re-enable single step for syscall restarting. */
384 void user_rewind_single_step(struct task_struct *task)
387 * If single step is active for this thread, then set SPSR.SS
388 * to 1 to avoid returning to the active-pending state.
390 if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
391 set_regs_spsr_ss(task_pt_regs(task));
394 void user_fastforward_single_step(struct task_struct *task)
396 if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
397 clear_regs_spsr_ss(task_pt_regs(task));
400 /* Kernel API */
401 void kernel_enable_single_step(struct pt_regs *regs)
403 WARN_ON(!irqs_disabled());
404 set_regs_spsr_ss(regs);
405 mdscr_write(mdscr_read() | DBG_MDSCR_SS);
406 enable_debug_monitors(DBG_ACTIVE_EL1);
409 void kernel_disable_single_step(void)
411 WARN_ON(!irqs_disabled());
412 mdscr_write(mdscr_read() & ~DBG_MDSCR_SS);
413 disable_debug_monitors(DBG_ACTIVE_EL1);
416 int kernel_active_single_step(void)
418 WARN_ON(!irqs_disabled());
419 return mdscr_read() & DBG_MDSCR_SS;
422 /* ptrace API */
423 void user_enable_single_step(struct task_struct *task)
425 set_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
426 set_regs_spsr_ss(task_pt_regs(task));
429 void user_disable_single_step(struct task_struct *task)
431 clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);