arch/powerpc/platforms/powernv/setup.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * PowerNV setup code.
   4  *
   5  * Copyright 2011 IBM Corp.
   6  */
   7
   8 #undef DEBUG
   9
  10 #include <linux/cpu.h>
  11 #include <linux/errno.h>
  12 #include <linux/sched.h>
  13 #include <linux/kernel.h>
  14 #include <linux/tty.h>
  15 #include <linux/reboot.h>
  16 #include <linux/init.h>
  17 #include <linux/console.h>
  18 #include <linux/delay.h>
  19 #include <linux/irq.h>
  20 #include <linux/seq_file.h>
  21 #include <linux/of.h>
  22 #include <linux/of_fdt.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/bug.h>
  25 #include <linux/pci.h>
  26 #include <linux/cpufreq.h>
  27 #include <linux/memblock.h>
  28
  29 #include <asm/machdep.h>
  30 #include <asm/firmware.h>
  31 #include <asm/xics.h>
  32 #include <asm/xive.h>
  33 #include <asm/opal.h>
  34 #include <asm/kexec.h>
  35 #include <asm/smp.h>
  36 #include <asm/tm.h>
  37 #include <asm/setup.h>
  38 #include <asm/security_features.h>
  39
  40 #include "powernv.h"
  41
  42
  43 static bool fw_feature_is(const char *state, const char *name,
  44                           struct device_node *fw_features)
  45 {
  46         struct device_node *np;
  47         bool rc = false;
  48
  49         np = of_get_child_by_name(fw_features, name);
  50         if (np) {
  51                 rc = of_property_read_bool(np, state);
  52                 of_node_put(np);
  53         }
  54
  55         return rc;
  56 }
  57
  58 static void init_fw_feat_flags(struct device_node *np)
  59 {
  60         if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np))
  61                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
  62
  63         if (fw_feature_is("enabled", "fw-bcctrl-serialized", np))
  64                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
  65
  66         if (fw_feature_is("enabled", "inst-l1d-flush-ori30,30,0", np))
  67                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
  68
  69         if (fw_feature_is("enabled", "inst-l1d-flush-trig2", np))
  70                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
  71
  72         if (fw_feature_is("enabled", "fw-l1d-thread-split", np))
  73                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
  74
  75         if (fw_feature_is("enabled", "fw-count-cache-disabled", np))
  76                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
  77
  78         if (fw_feature_is("enabled", "fw-count-cache-flush-bcctr2,0,0", np))
  79                 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST);
  80
  81         if (fw_feature_is("enabled", "needs-count-cache-flush-on-context-switch", np))
  82                 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE);
  83
  84         /*
  85          * The features below are enabled by default, so we instead look to see
  86          * if firmware has *disabled* them, and clear them if so.
  87          */
  88         if (fw_feature_is("disabled", "speculation-policy-favor-security", np))
  89                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
  90
  91         if (fw_feature_is("disabled", "needs-l1d-flush-msr-pr-0-to-1", np))
  92                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
  93
  94         if (fw_feature_is("disabled", "needs-l1d-flush-msr-hv-1-to-0", np))
  95                 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
  96
  97         if (fw_feature_is("disabled", "needs-spec-barrier-for-bound-checks", np))
  98                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
  99 }
 100
 101 static void pnv_setup_security_mitigations(void)
 102 {
 103         struct device_node *np, *fw_features;
 104         enum l1d_flush_type type;
 105         bool enable;
 106
 107         /* Default to fallback in case fw-features are not available */
 108         type = L1D_FLUSH_FALLBACK;
 109
 110         np = of_find_node_by_name(NULL, "ibm,opal");
 111         fw_features = of_get_child_by_name(np, "fw-features");
 112         of_node_put(np);
 113
 114         if (fw_features) {
 115                 init_fw_feat_flags(fw_features);
 116                 of_node_put(fw_features);
 117
 118                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
 119                         type = L1D_FLUSH_MTTRIG;
 120
 121                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
 122                         type = L1D_FLUSH_ORI;
 123         }
 124
 125         /*
 126          * If we are non-Power9 bare metal, we don't need to flush on kernel
 127          * entry or after user access: they fix a P9 specific vulnerability.
 128          */
 129         if (!pvr_version_is(PVR_POWER9)) {
 130                 security_ftr_clear(SEC_FTR_L1D_FLUSH_ENTRY);
 131                 security_ftr_clear(SEC_FTR_L1D_FLUSH_UACCESS);
 132         }
 133
 134         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
 135                  (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR)   || \
 136                   security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV));
 137
 138         setup_rfi_flush(type, enable);
 139         setup_count_cache_flush();
 140
 141         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
 142                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_ENTRY);
 143         setup_entry_flush(enable);
 144
 145         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
 146                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS);
 147         setup_uaccess_flush(enable);
 148
 149         setup_stf_barrier();
 150 }
 151
 152 static void __init pnv_check_guarded_cores(void)
 153 {
 154         struct device_node *dn;
 155         int bad_count = 0;
 156
 157         for_each_node_by_type(dn, "cpu") {
 158                 if (of_property_match_string(dn, "status", "bad") >= 0)
 159                         bad_count++;
 160         };
 161
 162         if (bad_count) {
 163                 printk("  _     _______________\n");
 164                 pr_cont(" | |   /               \\\n");
 165                 pr_cont(" | |   |    WARNING!   |\n");
 166                 pr_cont(" | |   |               |\n");
 167                 pr_cont(" | |   | It looks like |\n");
 168                 pr_cont(" |_|   |  you have %*d |\n", 3, bad_count);
 169                 pr_cont("  _    | guarded cores |\n");
 170                 pr_cont(" (_)   \\_______________/\n");
 171         }
 172 }
 173
 174 static void __init pnv_setup_arch(void)
 175 {
 176         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 177
 178         pnv_setup_security_mitigations();
 179
 180         /* Initialize SMP */
 181         pnv_smp_init();
 182
 183         /* Setup PCI */
 184         pnv_pci_init();
 185
 186         /* Setup RTC and NVRAM callbacks */
 187         if (firmware_has_feature(FW_FEATURE_OPAL))
 188                 opal_nvram_init();
 189
 190         /* Enable NAP mode */
 191         powersave_nap = 1;
 192
 193         pnv_check_guarded_cores();
 194
 195         /* XXX PMCS */
 196 }
 197
 198 static void __init pnv_init(void)
 199 {
 200         /*
 201          * Initialize the LPC bus now so that legacy serial
 202          * ports can be found on it
 203          */
 204         opal_lpc_init();
 205
 206 #ifdef CONFIG_HVC_OPAL
 207         if (firmware_has_feature(FW_FEATURE_OPAL))
 208                 hvc_opal_init_early();
 209         else
 210 #endif
 211                 add_preferred_console("hvc", 0, NULL);
 212
 213         if (!radix_enabled()) {
 214                 size_t size = sizeof(struct slb_entry) * mmu_slb_size;
 215                 int i;
 216
 217                 /* Allocate per cpu area to save old slb contents during MCE */
 218                 for_each_possible_cpu(i) {
 219                         paca_ptrs[i]->mce_faulty_slbs =
 220                                         memblock_alloc_node(size,
 221                                                 __alignof__(struct slb_entry),
 222                                                 cpu_to_node(i));
 223                 }
 224         }
 225 }
 226
 227 static void __init pnv_init_IRQ(void)
 228 {
 229         /* Try using a XIVE if available, otherwise use a XICS */
 230         if (!xive_native_init())
 231                 xics_init();
 232
 233         WARN_ON(!ppc_md.get_irq);
 234 }
 235
 236 static void pnv_show_cpuinfo(struct seq_file *m)
 237 {
 238         struct device_node *root;
 239         const char *model = "";
 240
 241         root = of_find_node_by_path("/");
 242         if (root)
 243                 model = of_get_property(root, "model", NULL);
 244         seq_printf(m, "machine\t\t: PowerNV %s\n", model);
 245         if (firmware_has_feature(FW_FEATURE_OPAL))
 246                 seq_printf(m, "firmware\t: OPAL\n");
 247         else
 248                 seq_printf(m, "firmware\t: BML\n");
 249         of_node_put(root);
 250         if (radix_enabled())
 251                 seq_printf(m, "MMU\t\t: Radix\n");
 252         else
 253                 seq_printf(m, "MMU\t\t: Hash\n");
 254 }
 255
 256 static void pnv_prepare_going_down(void)
 257 {
 258         /*
 259          * Disable all notifiers from OPAL, we can't
 260          * service interrupts anymore anyway
 261          */
 262         opal_event_shutdown();
 263
 264         /* Print flash update message if one is scheduled. */
 265         opal_flash_update_print_message();
 266
 267         smp_send_stop();
 268
 269         hard_irq_disable();
 270 }
 271
 272 static void  __noreturn pnv_restart(char *cmd)
 273 {
 274         long rc;
 275
 276         pnv_prepare_going_down();
 277
 278         do {
 279                 if (!cmd || !strlen(cmd))
 280                         rc = opal_cec_reboot();
 281                 else if (strcmp(cmd, "full") == 0)
 282                         rc = opal_cec_reboot2(OPAL_REBOOT_FULL_IPL, NULL);
 283                 else if (strcmp(cmd, "mpipl") == 0)
 284                         rc = opal_cec_reboot2(OPAL_REBOOT_MPIPL, NULL);
 285                 else if (strcmp(cmd, "error") == 0)
 286                         rc = opal_cec_reboot2(OPAL_REBOOT_PLATFORM_ERROR, NULL);
 287                 else if (strcmp(cmd, "fast") == 0)
 288                         rc = opal_cec_reboot2(OPAL_REBOOT_FAST, NULL);
 289                 else
 290                         rc = OPAL_UNSUPPORTED;
 291
 292                 if (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 293                         /* Opal is busy wait for some time and retry */
 294                         opal_poll_events(NULL);
 295                         mdelay(10);
 296
 297                 } else  if (cmd && rc) {
 298                         /* Unknown error while issuing reboot */
 299                         if (rc == OPAL_UNSUPPORTED)
 300                                 pr_err("Unsupported '%s' reboot.\n", cmd);
 301                         else
 302                                 pr_err("Unable to issue '%s' reboot. Err=%ld\n",
 303                                        cmd, rc);
 304                         pr_info("Forcing a cec-reboot\n");
 305                         cmd = NULL;
 306                         rc = OPAL_BUSY;
 307
 308                 } else if (rc != OPAL_SUCCESS) {
 309                         /* Unknown error while issuing cec-reboot */
 310                         pr_err("Unable to reboot. Err=%ld\n", rc);
 311                 }
 312
 313         } while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT);
 314
 315         for (;;)
 316                 opal_poll_events(NULL);
 317 }
 318
 319 static void __noreturn pnv_power_off(void)
 320 {
 321         long rc = OPAL_BUSY;
 322
 323         pnv_prepare_going_down();
 324
 325         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 326                 rc = opal_cec_power_down(0);
 327                 if (rc == OPAL_BUSY_EVENT)
 328                         opal_poll_events(NULL);
 329                 else
 330                         mdelay(10);
 331         }
 332         for (;;)
 333                 opal_poll_events(NULL);
 334 }
 335
 336 static void __noreturn pnv_halt(void)
 337 {
 338         pnv_power_off();
 339 }
 340
 341 static void pnv_progress(char *s, unsigned short hex)
 342 {
 343 }
 344
 345 static void pnv_shutdown(void)
 346 {
 347         /* Let the PCI code clear up IODA tables */
 348         pnv_pci_shutdown();
 349
 350         /*
 351          * Stop OPAL activity: Unregister all OPAL interrupts so they
 352          * don't fire up while we kexec and make sure all potentially
 353          * DMA'ing ops are complete (such as dump retrieval).
 354          */
 355         opal_shutdown();
 356 }
 357
 358 #ifdef CONFIG_KEXEC_CORE
 359 static void pnv_kexec_wait_secondaries_down(void)
 360 {
 361         int my_cpu, i, notified = -1;
 362
 363         my_cpu = get_cpu();
 364
 365         for_each_online_cpu(i) {
 366                 uint8_t status;
 367                 int64_t rc, timeout = 1000;
 368
 369                 if (i == my_cpu)
 370                         continue;
 371
 372                 for (;;) {
 373                         rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
 374                                                    &status);
 375                         if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
 376                                 break;
 377                         barrier();
 378                         if (i != notified) {
 379                                 printk(KERN_INFO "kexec: waiting for cpu %d "
 380                                        "(physical %d) to enter OPAL\n",
 381                                        i, paca_ptrs[i]->hw_cpu_id);
 382                                 notified = i;
 383                         }
 384
 385                         /*
 386                          * On crash secondaries might be unreachable or hung,
 387                          * so timeout if we've waited too long
 388                          * */
 389                         mdelay(1);
 390                         if (timeout-- == 0) {
 391                                 printk(KERN_ERR "kexec: timed out waiting for "
 392                                        "cpu %d (physical %d) to enter OPAL\n",
 393                                        i, paca_ptrs[i]->hw_cpu_id);
 394                                 break;
 395                         }
 396                 }
 397         }
 398 }
 399
 400 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 401 {
 402         u64 reinit_flags;
 403
 404         if (xive_enabled())
 405                 xive_teardown_cpu();
 406         else
 407                 xics_kexec_teardown_cpu(secondary);
 408
 409         /* On OPAL, we return all CPUs to firmware */
 410         if (!firmware_has_feature(FW_FEATURE_OPAL))
 411                 return;
 412
 413         if (secondary) {
 414                 /* Return secondary CPUs to firmware on OPAL v3 */
 415                 mb();
 416                 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
 417                 mb();
 418
 419                 /* Return the CPU to OPAL */
 420                 opal_return_cpu();
 421         } else {
 422                 /* Primary waits for the secondaries to have reached OPAL */
 423                 pnv_kexec_wait_secondaries_down();
 424
 425                 /* Switch XIVE back to emulation mode */
 426                 if (xive_enabled())
 427                         xive_shutdown();
 428
 429                 /*
 430                  * We might be running as little-endian - now that interrupts
 431                  * are disabled, reset the HILE bit to big-endian so we don't
 432                  * take interrupts in the wrong endian later
 433                  *
 434                  * We reinit to enable both radix and hash on P9 to ensure
 435                  * the mode used by the next kernel is always supported.
 436                  */
 437                 reinit_flags = OPAL_REINIT_CPUS_HILE_BE;
 438                 if (cpu_has_feature(CPU_FTR_ARCH_300))
 439                         reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX |
 440                                 OPAL_REINIT_CPUS_MMU_HASH;
 441                 opal_reinit_cpus(reinit_flags);
 442         }
 443 }
 444 #endif /* CONFIG_KEXEC_CORE */
 445
 446 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 447 static unsigned long pnv_memory_block_size(void)
 448 {
 449         /*
 450          * We map the kernel linear region with 1GB large pages on radix. For
 451          * memory hot unplug to work our memory block size must be at least
 452          * this size.
 453          */
 454         if (radix_enabled())
 455                 return radix_mem_block_size;
 456         else
 457                 return 256UL * 1024 * 1024;
 458 }
 459 #endif
 460
 461 static void __init pnv_setup_machdep_opal(void)
 462 {
 463         ppc_md.get_boot_time = opal_get_boot_time;
 464         ppc_md.restart = pnv_restart;
 465         pm_power_off = pnv_power_off;
 466         ppc_md.halt = pnv_halt;
 467         /* ppc_md.system_reset_exception gets filled in by pnv_smp_init() */
 468         ppc_md.machine_check_exception = opal_machine_check;
 469         ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
 470         if (opal_check_token(OPAL_HANDLE_HMI2))
 471                 ppc_md.hmi_exception_early = opal_hmi_exception_early2;
 472         else
 473                 ppc_md.hmi_exception_early = opal_hmi_exception_early;
 474         ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
 475 }
 476
 477 static int __init pnv_probe(void)
 478 {
 479         if (!of_machine_is_compatible("ibm,powernv"))
 480                 return 0;
 481
 482         if (firmware_has_feature(FW_FEATURE_OPAL))
 483                 pnv_setup_machdep_opal();
 484
 485         pr_debug("PowerNV detected !\n");
 486
 487         pnv_init();
 488
 489         return 1;
 490 }
 491
 492 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 493 void __init pnv_tm_init(void)
 494 {
 495         if (!firmware_has_feature(FW_FEATURE_OPAL) ||
 496             !pvr_version_is(PVR_POWER9) ||
 497             early_cpu_has_feature(CPU_FTR_TM))
 498                 return;
 499
 500         if (opal_reinit_cpus(OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED) != OPAL_SUCCESS)
 501                 return;
 502
 503         pr_info("Enabling TM (Transactional Memory) with Suspend Disabled\n");
 504         cur_cpu_spec->cpu_features |= CPU_FTR_TM;
 505         /* Make sure "normal" HTM is off (it should be) */
 506         cur_cpu_spec->cpu_user_features2 &= ~PPC_FEATURE2_HTM;
 507         /* Turn on no suspend mode, and HTM no SC */
 508         cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NO_SUSPEND | \
 509                                             PPC_FEATURE2_HTM_NOSC;
 510         tm_suspend_disabled = true;
 511 }
 512 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
 513
 514 /*
 515  * Returns the cpu frequency for 'cpu' in Hz. This is used by
 516  * /proc/cpuinfo
 517  */
 518 static unsigned long pnv_get_proc_freq(unsigned int cpu)
 519 {
 520         unsigned long ret_freq;
 521
 522         ret_freq = cpufreq_get(cpu) * 1000ul;
 523
 524         /*
 525          * If the backend cpufreq driver does not exist,
 526          * then fallback to old way of reporting the clockrate.
 527          */
 528         if (!ret_freq)
 529                 ret_freq = ppc_proc_freq;
 530         return ret_freq;
 531 }
 532
 533 static long pnv_machine_check_early(struct pt_regs *regs)
 534 {
 535         long handled = 0;
 536
 537         if (cur_cpu_spec && cur_cpu_spec->machine_check_early)
 538                 handled = cur_cpu_spec->machine_check_early(regs);
 539
 540         return handled;
 541 }
 542
 543 define_machine(powernv) {
 544         .name                   = "PowerNV",
 545         .probe                  = pnv_probe,
 546         .setup_arch             = pnv_setup_arch,
 547         .init_IRQ               = pnv_init_IRQ,
 548         .show_cpuinfo           = pnv_show_cpuinfo,
 549         .get_proc_freq          = pnv_get_proc_freq,
 550         .progress               = pnv_progress,
 551         .machine_shutdown       = pnv_shutdown,
 552         .power_save             = NULL,
 553         .calibrate_decr         = generic_calibrate_decr,
 554         .machine_check_early    = pnv_machine_check_early,
 555 #ifdef CONFIG_KEXEC_CORE
 556         .kexec_cpu_down         = pnv_kexec_cpu_down,
 557 #endif
 558 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 559         .memory_block_size      = pnv_memory_block_size,
 560 #endif
 561 };