1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * mtip32xx.h - Header file for the P320 SSD Block Driver
4 * Copyright (C) 2011 Micron Technology, Inc.
6 * Portions of this code were derived from works subjected to the
8 * Copyright (C) 2009 Integrated Device Technology, Inc.
11 #ifndef __MTIP32XX_H__
12 #define __MTIP32XX_H__
14 #include <linux/spinlock.h>
15 #include <linux/rwsem.h>
16 #include <linux/ata.h>
17 #include <linux/interrupt.h>
18 #include <linux/genhd.h>
20 /* Offset of Subsystem Device ID in pci confoguration space */
21 #define PCI_SUBSYSTEM_DEVICEID 0x2E
23 /* offset of Device Control register in PCIe extended capabilites space */
24 #define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET 0x48
26 /* check for erase mode support during secure erase */
27 #define MTIP_SEC_ERASE_MODE 0x2
29 /* # of times to retry timed out/failed IOs */
30 #define MTIP_MAX_RETRIES 2
32 /* Various timeout values in ms */
33 #define MTIP_NCQ_CMD_TIMEOUT_MS 15000
34 #define MTIP_IOCTL_CMD_TIMEOUT_MS 5000
35 #define MTIP_INT_CMD_TIMEOUT_MS 5000
36 #define MTIP_QUIESCE_IO_TIMEOUT_MS (MTIP_NCQ_CMD_TIMEOUT_MS * \
37 (MTIP_MAX_RETRIES + 1))
39 /* check for timeouts every 500ms */
40 #define MTIP_TIMEOUT_CHECK_PERIOD 500
43 #define MTIP_FTL_REBUILD_OFFSET 142
44 #define MTIP_FTL_REBUILD_MAGIC 0xED51
45 #define MTIP_FTL_REBUILD_TIMEOUT_MS 2400000
47 /* unaligned IO handling */
48 #define MTIP_MAX_UNALIGNED_SLOTS 2
50 /* Macro to extract the tag bit number from a tag value. */
51 #define MTIP_TAG_BIT(tag) (tag & 0x1F)
54 * Macro to extract the tag index from a tag value. The index
55 * is used to access the correct s_active/Command Issue register based
58 #define MTIP_TAG_INDEX(tag) (tag >> 5)
61 * Maximum number of scatter gather entries
62 * a single command may have.
64 #define MTIP_MAX_SG 504
67 * Maximum number of slot groups (Command Issue & s_active registers)
68 * NOTE: This is the driver maximum; check dd->slot_groups for actual value.
70 #define MTIP_MAX_SLOT_GROUPS 8
72 /* Internal command tag. */
73 #define MTIP_TAG_INTERNAL 0
75 /* Micron Vendor ID & P320x SSD Device ID */
76 #define PCI_VENDOR_ID_MICRON 0x1344
77 #define P320H_DEVICE_ID 0x5150
78 #define P320M_DEVICE_ID 0x5151
79 #define P320S_DEVICE_ID 0x5152
80 #define P325M_DEVICE_ID 0x5153
81 #define P420H_DEVICE_ID 0x5160
82 #define P420M_DEVICE_ID 0x5161
83 #define P425M_DEVICE_ID 0x5163
85 /* Driver name and version strings */
86 #define MTIP_DRV_NAME "mtip32xx"
87 #define MTIP_DRV_VERSION "1.3.1"
89 /* Maximum number of minor device numbers per device. */
90 #define MTIP_MAX_MINORS 16
92 /* Maximum number of supported command slots. */
93 #define MTIP_MAX_COMMAND_SLOTS (MTIP_MAX_SLOT_GROUPS * 32)
96 * Per-tag bitfield size in longs.
97 * Linux bit manipulation functions
98 * (i.e. test_and_set_bit, find_next_zero_bit)
99 * manipulate memory in longs, so we try to make the math work.
100 * take the slot groups and find the number of longs, rounding up.
101 * Careful! i386 and x86_64 use different size longs!
103 #define U32_PER_LONG (sizeof(long) / sizeof(u32))
104 #define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \
105 (U32_PER_LONG-1))/U32_PER_LONG)
107 /* BAR number used to access the HBA registers. */
111 #define dbg_printk(format, arg...) \
112 printk(pr_fmt(format), ##arg);
114 #define dbg_printk(format, arg...)
117 #define MTIP_DFS_MAX_BUF_SIZE 1024
120 /* below are bit numbers in 'flags' defined in mtip_port */
121 MTIP_PF_IC_ACTIVE_BIT
= 0, /* pio/ioctl */
122 MTIP_PF_EH_ACTIVE_BIT
= 1, /* error handling */
123 MTIP_PF_SE_ACTIVE_BIT
= 2, /* secure erase */
124 MTIP_PF_DM_ACTIVE_BIT
= 3, /* download microcde */
125 MTIP_PF_TO_ACTIVE_BIT
= 9, /* timeout handling */
126 MTIP_PF_PAUSE_IO
= ((1 << MTIP_PF_IC_ACTIVE_BIT
) |
127 (1 << MTIP_PF_EH_ACTIVE_BIT
) |
128 (1 << MTIP_PF_SE_ACTIVE_BIT
) |
129 (1 << MTIP_PF_DM_ACTIVE_BIT
) |
130 (1 << MTIP_PF_TO_ACTIVE_BIT
)),
131 MTIP_PF_HOST_CAP_64
= 10, /* cache HOST_CAP_64 */
133 MTIP_PF_SVC_THD_ACTIVE_BIT
= 4,
134 MTIP_PF_ISSUE_CMDS_BIT
= 5,
135 MTIP_PF_REBUILD_BIT
= 6,
136 MTIP_PF_SVC_THD_STOP_BIT
= 8,
138 MTIP_PF_SVC_THD_WORK
= ((1 << MTIP_PF_EH_ACTIVE_BIT
) |
139 (1 << MTIP_PF_ISSUE_CMDS_BIT
) |
140 (1 << MTIP_PF_REBUILD_BIT
) |
141 (1 << MTIP_PF_SVC_THD_STOP_BIT
) |
142 (1 << MTIP_PF_TO_ACTIVE_BIT
)),
144 /* below are bit numbers in 'dd_flag' defined in driver_data */
145 MTIP_DDF_SEC_LOCK_BIT
= 0,
146 MTIP_DDF_REMOVE_PENDING_BIT
= 1,
147 MTIP_DDF_OVER_TEMP_BIT
= 2,
148 MTIP_DDF_WRITE_PROTECT_BIT
= 3,
149 MTIP_DDF_CLEANUP_BIT
= 5,
150 MTIP_DDF_RESUME_BIT
= 6,
151 MTIP_DDF_INIT_DONE_BIT
= 7,
152 MTIP_DDF_REBUILD_FAILED_BIT
= 8,
153 MTIP_DDF_REMOVAL_BIT
= 9,
155 MTIP_DDF_STOP_IO
= ((1 << MTIP_DDF_REMOVE_PENDING_BIT
) |
156 (1 << MTIP_DDF_SEC_LOCK_BIT
) |
157 (1 << MTIP_DDF_OVER_TEMP_BIT
) |
158 (1 << MTIP_DDF_WRITE_PROTECT_BIT
) |
159 (1 << MTIP_DDF_REBUILD_FAILED_BIT
)),
173 struct work_struct work
;
177 } ____cacheline_aligned_in_smp
;
179 #define DEFINE_HANDLER(group) \
180 void mtip_workq_sdbf##group(struct work_struct *work) \
182 struct mtip_work *w = (struct mtip_work *) work; \
183 mtip_workq_sdbfx(w->port, group, w->completed); \
186 /* Register Frame Information Structure (FIS), host to device. */
187 struct host_to_dev_fis
{
190 * - 27h Register FIS, host to device.
191 * - 34h Register FIS, device to host.
192 * - 39h DMA Activate FIS, device to host.
193 * - 41h DMA Setup FIS, bi-directional.
194 * - 46h Data FIS, bi-directional.
195 * - 58h BIST Activate FIS, bi-directional.
196 * - 5Fh PIO Setup FIS, device to host.
197 * - A1h Set Device Bits FIS, device to host.
201 unsigned char command
;
202 unsigned char features
;
205 unsigned char lba_low
;
206 unsigned char sector
;
209 unsigned char lba_mid
;
210 unsigned char cyl_low
;
213 unsigned char lba_hi
;
214 unsigned char cyl_hi
;
217 unsigned char device
;
222 unsigned char lba_low_ex
;
223 unsigned char sector_ex
;
226 unsigned char lba_mid_ex
;
227 unsigned char cyl_low_ex
;
230 unsigned char lba_hi_ex
;
231 unsigned char cyl_hi_ex
;
233 unsigned char features_ex
;
235 unsigned char sect_count
;
236 unsigned char sect_cnt_ex
;
238 unsigned char control
;
243 /* Command header structure. */
244 struct mtip_cmd_hdr
{
247 * - Bits 31:16 Number of PRD entries.
248 * - Bits 15:8 Unused in this implementation.
249 * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries.
250 * - Bit 6 Write bit, should be set when writing data to the device.
251 * - Bit 5 Unused in this implementation.
252 * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes).
255 /* This field is unsed when using NCQ. */
261 * Lower 32 bits of the command table address associated with this
262 * header. The command table addresses must be 128 byte aligned.
266 * If 64 bit addressing is used this field is the upper 32 bits
267 * of the command table address associated with this command.
270 /* Reserved and unused. */
274 /* Command scatter gather structure (PRD). */
277 * Low 32 bits of the data buffer address. For P320 this
278 * address must be 8 byte aligned signified by bits 2:0 being
283 * When 64 bit addressing is used this field is the upper
284 * 32 bits of the data buffer address.
290 * Bit 31: interrupt when this data block has been transferred.
291 * Bits 30..22: reserved
292 * Bits 21..0: byte count (minus 1). For P320 the byte count must be
293 * 8 byte aligned signified by bits 2:0 being set to 1.
301 /* Structure used to describe a command. */
303 void *command
; /* ptr to command table entry */
305 dma_addr_t command_dma
; /* corresponding physical address */
307 int scatter_ents
; /* Number of scatter list entries used */
309 int unaligned
; /* command is unaligned on 4k boundary */
312 struct scatterlist sg
[MTIP_MAX_SG
]; /* Scatter list entries */
313 struct mtip_int_cmd
*icmd
;
316 int retries
; /* The number of retries left for this command. */
318 int direction
; /* Data transfer direction */
322 /* Structure used to describe a port. */
324 /* Pointer back to the driver data for this port. */
325 struct driver_data
*dd
;
327 * Used to determine if the data pointed to by the
328 * identify field is valid.
330 unsigned long identify_valid
;
331 /* Base address of the memory mapped IO for the port. */
333 /* Array of pointers to the memory mapped s_active registers. */
334 void __iomem
*s_active
[MTIP_MAX_SLOT_GROUPS
];
335 /* Array of pointers to the memory mapped completed registers. */
336 void __iomem
*completed
[MTIP_MAX_SLOT_GROUPS
];
337 /* Array of pointers to the memory mapped Command Issue registers. */
338 void __iomem
*cmd_issue
[MTIP_MAX_SLOT_GROUPS
];
340 * Pointer to the beginning of the command header memory as used
345 * Pointer to the beginning of the command header memory as used
348 dma_addr_t command_list_dma
;
350 * Pointer to the beginning of the RX FIS memory as used
355 * Pointer to the beginning of the RX FIS memory as used
358 dma_addr_t rxfis_dma
;
360 * Pointer to the DMA region for RX Fis, Identify, RLE10, and SMART
364 * DMA address of region for RX Fis, Identify, RLE10, and SMART
366 dma_addr_t block1_dma
;
368 * Pointer to the beginning of the identify data memory as used
373 * Pointer to the beginning of the identify data memory as used
376 dma_addr_t identify_dma
;
378 * Pointer to the beginning of a sector buffer that is used
379 * by the driver when issuing internal commands.
383 * Pointer to the beginning of a sector buffer that is used
384 * by the DMA when the driver issues internal commands.
386 dma_addr_t sector_buffer_dma
;
389 dma_addr_t log_buf_dma
;
392 dma_addr_t smart_buf_dma
;
395 * used to queue commands when an internal command is in progress
396 * or error handling is active
398 unsigned long cmds_to_issue
[SLOTBITS_IN_LONGS
];
399 /* Used by mtip_service_thread to wait for an event */
400 wait_queue_head_t svc_wait
;
402 * indicates the state of the port. Also, helps the service thread
403 * to determine its action on wake up.
407 * Timer used to complete commands that have been active for too long.
409 unsigned long ic_pause_timer
;
411 /* Counter to control queue depth of unaligned IOs */
412 atomic_t cmd_slot_unal
;
414 /* Spinlock for working around command-issue bug. */
415 spinlock_t cmd_issue_lock
[MTIP_MAX_SLOT_GROUPS
];
419 * Driver private data structure.
421 * One structure is allocated per probed device.
424 void __iomem
*mmio
; /* Base address of the HBA registers. */
426 int major
; /* Major device number. */
428 int instance
; /* Instance number. First device probed is 0, ... */
430 struct gendisk
*disk
; /* Pointer to our gendisk structure. */
432 struct pci_dev
*pdev
; /* Pointer to the PCI device structure. */
434 struct request_queue
*queue
; /* Our request queue. */
436 struct blk_mq_tag_set tags
; /* blk_mq tags */
438 struct mtip_port
*port
; /* Pointer to the port data structure. */
440 unsigned product_type
; /* magic value declaring the product type */
442 unsigned slot_groups
; /* number of slot groups the product supports */
444 unsigned long index
; /* Index to determine the disk name */
446 unsigned long dd_flag
; /* NOTE: use atomic bit operations on this */
448 struct task_struct
*mtip_svc_handler
; /* task_struct of svc thd */
450 struct dentry
*dfs_node
;
454 int numa_node
; /* NUMA support */
458 struct workqueue_struct
*isr_workq
;
460 atomic_t irq_workers_active
;
462 struct mtip_work work
[MTIP_MAX_SLOT_GROUPS
];
466 struct list_head online_list
; /* linkage for online list */
468 struct list_head remove_list
; /* linkage for removing list */
470 int unal_qdepth
; /* qdepth of unaligned IO queue */