io_uring: ensure finish_wait() is always called in __io_uring_task_cancel()
[linux/fpc-iii.git] / drivers / thunderbolt / usb4.c
blob67a2867382ed907459e71d62353096033848dfe6
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * USB4 specific functionality
5 * Copyright (C) 2019, Intel Corporation
6 * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
7 * Rajmohan Mani <rajmohan.mani@intel.com>
8 */
10 #include <linux/delay.h>
11 #include <linux/ktime.h>
13 #include "sb_regs.h"
14 #include "tb.h"
16 #define USB4_DATA_DWORDS 16
17 #define USB4_DATA_RETRIES 3
19 enum usb4_sb_target {
20 USB4_SB_TARGET_ROUTER,
21 USB4_SB_TARGET_PARTNER,
22 USB4_SB_TARGET_RETIMER,
25 #define USB4_NVM_READ_OFFSET_MASK GENMASK(23, 2)
26 #define USB4_NVM_READ_OFFSET_SHIFT 2
27 #define USB4_NVM_READ_LENGTH_MASK GENMASK(27, 24)
28 #define USB4_NVM_READ_LENGTH_SHIFT 24
30 #define USB4_NVM_SET_OFFSET_MASK USB4_NVM_READ_OFFSET_MASK
31 #define USB4_NVM_SET_OFFSET_SHIFT USB4_NVM_READ_OFFSET_SHIFT
33 #define USB4_DROM_ADDRESS_MASK GENMASK(14, 2)
34 #define USB4_DROM_ADDRESS_SHIFT 2
35 #define USB4_DROM_SIZE_MASK GENMASK(19, 15)
36 #define USB4_DROM_SIZE_SHIFT 15
38 #define USB4_NVM_SECTOR_SIZE_MASK GENMASK(23, 0)
40 typedef int (*read_block_fn)(void *, unsigned int, void *, size_t);
41 typedef int (*write_block_fn)(void *, const void *, size_t);
43 static int usb4_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit,
44 u32 value, int timeout_msec)
46 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
48 do {
49 u32 val;
50 int ret;
52 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, offset, 1);
53 if (ret)
54 return ret;
56 if ((val & bit) == value)
57 return 0;
59 usleep_range(50, 100);
60 } while (ktime_before(ktime_get(), timeout));
62 return -ETIMEDOUT;
65 static int usb4_do_read_data(u16 address, void *buf, size_t size,
66 read_block_fn read_block, void *read_block_data)
68 unsigned int retries = USB4_DATA_RETRIES;
69 unsigned int offset;
71 offset = address & 3;
72 address = address & ~3;
74 do {
75 size_t nbytes = min_t(size_t, size, USB4_DATA_DWORDS * 4);
76 unsigned int dwaddress, dwords;
77 u8 data[USB4_DATA_DWORDS * 4];
78 int ret;
80 dwaddress = address / 4;
81 dwords = ALIGN(nbytes, 4) / 4;
83 ret = read_block(read_block_data, dwaddress, data, dwords);
84 if (ret) {
85 if (ret != -ENODEV && retries--)
86 continue;
87 return ret;
90 memcpy(buf, data + offset, nbytes);
92 size -= nbytes;
93 address += nbytes;
94 buf += nbytes;
95 } while (size > 0);
97 return 0;
100 static int usb4_do_write_data(unsigned int address, const void *buf, size_t size,
101 write_block_fn write_next_block, void *write_block_data)
103 unsigned int retries = USB4_DATA_RETRIES;
104 unsigned int offset;
106 offset = address & 3;
107 address = address & ~3;
109 do {
110 u32 nbytes = min_t(u32, size, USB4_DATA_DWORDS * 4);
111 u8 data[USB4_DATA_DWORDS * 4];
112 int ret;
114 memcpy(data + offset, buf, nbytes);
116 ret = write_next_block(write_block_data, data, nbytes / 4);
117 if (ret) {
118 if (ret == -ETIMEDOUT) {
119 if (retries--)
120 continue;
121 ret = -EIO;
123 return ret;
126 size -= nbytes;
127 address += nbytes;
128 buf += nbytes;
129 } while (size > 0);
131 return 0;
134 static int usb4_native_switch_op(struct tb_switch *sw, u16 opcode,
135 u32 *metadata, u8 *status,
136 const void *tx_data, size_t tx_dwords,
137 void *rx_data, size_t rx_dwords)
139 u32 val;
140 int ret;
142 if (metadata) {
143 ret = tb_sw_write(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
144 if (ret)
145 return ret;
147 if (tx_dwords) {
148 ret = tb_sw_write(sw, tx_data, TB_CFG_SWITCH, ROUTER_CS_9,
149 tx_dwords);
150 if (ret)
151 return ret;
154 val = opcode | ROUTER_CS_26_OV;
155 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
156 if (ret)
157 return ret;
159 ret = usb4_switch_wait_for_bit(sw, ROUTER_CS_26, ROUTER_CS_26_OV, 0, 500);
160 if (ret)
161 return ret;
163 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
164 if (ret)
165 return ret;
167 if (val & ROUTER_CS_26_ONS)
168 return -EOPNOTSUPP;
170 if (status)
171 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
172 ROUTER_CS_26_STATUS_SHIFT;
174 if (metadata) {
175 ret = tb_sw_read(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
176 if (ret)
177 return ret;
179 if (rx_dwords) {
180 ret = tb_sw_read(sw, rx_data, TB_CFG_SWITCH, ROUTER_CS_9,
181 rx_dwords);
182 if (ret)
183 return ret;
186 return 0;
189 static int __usb4_switch_op(struct tb_switch *sw, u16 opcode, u32 *metadata,
190 u8 *status, const void *tx_data, size_t tx_dwords,
191 void *rx_data, size_t rx_dwords)
193 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
195 if (tx_dwords > USB4_DATA_DWORDS || rx_dwords > USB4_DATA_DWORDS)
196 return -EINVAL;
199 * If the connection manager implementation provides USB4 router
200 * operation proxy callback, call it here instead of running the
201 * operation natively.
203 if (cm_ops->usb4_switch_op) {
204 int ret;
206 ret = cm_ops->usb4_switch_op(sw, opcode, metadata, status,
207 tx_data, tx_dwords, rx_data,
208 rx_dwords);
209 if (ret != -EOPNOTSUPP)
210 return ret;
213 * If the proxy was not supported then run the native
214 * router operation instead.
218 return usb4_native_switch_op(sw, opcode, metadata, status, tx_data,
219 tx_dwords, rx_data, rx_dwords);
222 static inline int usb4_switch_op(struct tb_switch *sw, u16 opcode,
223 u32 *metadata, u8 *status)
225 return __usb4_switch_op(sw, opcode, metadata, status, NULL, 0, NULL, 0);
228 static inline int usb4_switch_op_data(struct tb_switch *sw, u16 opcode,
229 u32 *metadata, u8 *status,
230 const void *tx_data, size_t tx_dwords,
231 void *rx_data, size_t rx_dwords)
233 return __usb4_switch_op(sw, opcode, metadata, status, tx_data,
234 tx_dwords, rx_data, rx_dwords);
237 static void usb4_switch_check_wakes(struct tb_switch *sw)
239 struct tb_port *port;
240 bool wakeup = false;
241 u32 val;
243 if (!device_may_wakeup(&sw->dev))
244 return;
246 if (tb_route(sw)) {
247 if (tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1))
248 return;
250 tb_sw_dbg(sw, "PCIe wake: %s, USB3 wake: %s\n",
251 (val & ROUTER_CS_6_WOPS) ? "yes" : "no",
252 (val & ROUTER_CS_6_WOUS) ? "yes" : "no");
254 wakeup = val & (ROUTER_CS_6_WOPS | ROUTER_CS_6_WOUS);
257 /* Check for any connected downstream ports for USB4 wake */
258 tb_switch_for_each_port(sw, port) {
259 if (!tb_port_has_remote(port))
260 continue;
262 if (tb_port_read(port, &val, TB_CFG_PORT,
263 port->cap_usb4 + PORT_CS_18, 1))
264 break;
266 tb_port_dbg(port, "USB4 wake: %s\n",
267 (val & PORT_CS_18_WOU4S) ? "yes" : "no");
269 if (val & PORT_CS_18_WOU4S)
270 wakeup = true;
273 if (wakeup)
274 pm_wakeup_event(&sw->dev, 0);
277 static bool link_is_usb4(struct tb_port *port)
279 u32 val;
281 if (!port->cap_usb4)
282 return false;
284 if (tb_port_read(port, &val, TB_CFG_PORT,
285 port->cap_usb4 + PORT_CS_18, 1))
286 return false;
288 return !(val & PORT_CS_18_TCM);
292 * usb4_switch_setup() - Additional setup for USB4 device
293 * @sw: USB4 router to setup
295 * USB4 routers need additional settings in order to enable all the
296 * tunneling. This function enables USB and PCIe tunneling if it can be
297 * enabled (e.g the parent switch also supports them). If USB tunneling
298 * is not available for some reason (like that there is Thunderbolt 3
299 * switch upstream) then the internal xHCI controller is enabled
300 * instead.
302 int usb4_switch_setup(struct tb_switch *sw)
304 struct tb_port *downstream_port;
305 struct tb_switch *parent;
306 bool tbt3, xhci;
307 u32 val = 0;
308 int ret;
310 usb4_switch_check_wakes(sw);
312 if (!tb_route(sw))
313 return 0;
315 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1);
316 if (ret)
317 return ret;
319 parent = tb_switch_parent(sw);
320 downstream_port = tb_port_at(tb_route(sw), parent);
321 sw->link_usb4 = link_is_usb4(downstream_port);
322 tb_sw_dbg(sw, "link: %s\n", sw->link_usb4 ? "USB4" : "TBT3");
324 xhci = val & ROUTER_CS_6_HCI;
325 tbt3 = !(val & ROUTER_CS_6_TNS);
327 tb_sw_dbg(sw, "TBT3 support: %s, xHCI: %s\n",
328 tbt3 ? "yes" : "no", xhci ? "yes" : "no");
330 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
331 if (ret)
332 return ret;
334 if (sw->link_usb4 && tb_switch_find_port(parent, TB_TYPE_USB3_DOWN)) {
335 val |= ROUTER_CS_5_UTO;
336 xhci = false;
339 /* Only enable PCIe tunneling if the parent router supports it */
340 if (tb_switch_find_port(parent, TB_TYPE_PCIE_DOWN)) {
341 val |= ROUTER_CS_5_PTO;
343 * xHCI can be enabled if PCIe tunneling is supported
344 * and the parent does not have any USB3 dowstream
345 * adapters (so we cannot do USB 3.x tunneling).
347 if (xhci)
348 val |= ROUTER_CS_5_HCO;
351 /* TBT3 supported by the CM */
352 val |= ROUTER_CS_5_C3S;
353 /* Tunneling configuration is ready now */
354 val |= ROUTER_CS_5_CV;
356 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
357 if (ret)
358 return ret;
360 return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_CR,
361 ROUTER_CS_6_CR, 50);
365 * usb4_switch_read_uid() - Read UID from USB4 router
366 * @sw: USB4 router
367 * @uid: UID is stored here
369 * Reads 64-bit UID from USB4 router config space.
371 int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid)
373 return tb_sw_read(sw, uid, TB_CFG_SWITCH, ROUTER_CS_7, 2);
376 static int usb4_switch_drom_read_block(void *data,
377 unsigned int dwaddress, void *buf,
378 size_t dwords)
380 struct tb_switch *sw = data;
381 u8 status = 0;
382 u32 metadata;
383 int ret;
385 metadata = (dwords << USB4_DROM_SIZE_SHIFT) & USB4_DROM_SIZE_MASK;
386 metadata |= (dwaddress << USB4_DROM_ADDRESS_SHIFT) &
387 USB4_DROM_ADDRESS_MASK;
389 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_DROM_READ, &metadata,
390 &status, NULL, 0, buf, dwords);
391 if (ret)
392 return ret;
394 return status ? -EIO : 0;
398 * usb4_switch_drom_read() - Read arbitrary bytes from USB4 router DROM
399 * @sw: USB4 router
400 * @address: Byte address inside DROM to start reading
401 * @buf: Buffer where the DROM content is stored
402 * @size: Number of bytes to read from DROM
404 * Uses USB4 router operations to read router DROM. For devices this
405 * should always work but for hosts it may return %-EOPNOTSUPP in which
406 * case the host router does not have DROM.
408 int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
409 size_t size)
411 return usb4_do_read_data(address, buf, size,
412 usb4_switch_drom_read_block, sw);
416 * usb4_switch_lane_bonding_possible() - Are conditions met for lane bonding
417 * @sw: USB4 router
419 * Checks whether conditions are met so that lane bonding can be
420 * established with the upstream router. Call only for device routers.
422 bool usb4_switch_lane_bonding_possible(struct tb_switch *sw)
424 struct tb_port *up;
425 int ret;
426 u32 val;
428 up = tb_upstream_port(sw);
429 ret = tb_port_read(up, &val, TB_CFG_PORT, up->cap_usb4 + PORT_CS_18, 1);
430 if (ret)
431 return false;
433 return !!(val & PORT_CS_18_BE);
437 * usb4_switch_set_wake() - Enabled/disable wake
438 * @sw: USB4 router
439 * @flags: Wakeup flags (%0 to disable)
441 * Enables/disables router to wake up from sleep.
443 int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags)
445 struct tb_port *port;
446 u64 route = tb_route(sw);
447 u32 val;
448 int ret;
451 * Enable wakes coming from all USB4 downstream ports (from
452 * child routers). For device routers do this also for the
453 * upstream USB4 port.
455 tb_switch_for_each_port(sw, port) {
456 if (!tb_port_is_null(port))
457 continue;
458 if (!route && tb_is_upstream_port(port))
459 continue;
460 if (!port->cap_usb4)
461 continue;
463 ret = tb_port_read(port, &val, TB_CFG_PORT,
464 port->cap_usb4 + PORT_CS_19, 1);
465 if (ret)
466 return ret;
468 val &= ~(PORT_CS_19_WOC | PORT_CS_19_WOD | PORT_CS_19_WOU4);
470 if (flags & TB_WAKE_ON_CONNECT)
471 val |= PORT_CS_19_WOC;
472 if (flags & TB_WAKE_ON_DISCONNECT)
473 val |= PORT_CS_19_WOD;
474 if (flags & TB_WAKE_ON_USB4)
475 val |= PORT_CS_19_WOU4;
477 ret = tb_port_write(port, &val, TB_CFG_PORT,
478 port->cap_usb4 + PORT_CS_19, 1);
479 if (ret)
480 return ret;
484 * Enable wakes from PCIe and USB 3.x on this router. Only
485 * needed for device routers.
487 if (route) {
488 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
489 if (ret)
490 return ret;
492 val &= ~(ROUTER_CS_5_WOP | ROUTER_CS_5_WOU);
493 if (flags & TB_WAKE_ON_USB3)
494 val |= ROUTER_CS_5_WOU;
495 if (flags & TB_WAKE_ON_PCIE)
496 val |= ROUTER_CS_5_WOP;
498 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
499 if (ret)
500 return ret;
503 return 0;
507 * usb4_switch_set_sleep() - Prepare the router to enter sleep
508 * @sw: USB4 router
510 * Sets sleep bit for the router. Returns when the router sleep ready
511 * bit has been asserted.
513 int usb4_switch_set_sleep(struct tb_switch *sw)
515 int ret;
516 u32 val;
518 /* Set sleep bit and wait for sleep ready to be asserted */
519 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
520 if (ret)
521 return ret;
523 val |= ROUTER_CS_5_SLP;
525 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
526 if (ret)
527 return ret;
529 return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_SLPR,
530 ROUTER_CS_6_SLPR, 500);
534 * usb4_switch_nvm_sector_size() - Return router NVM sector size
535 * @sw: USB4 router
537 * If the router supports NVM operations this function returns the NVM
538 * sector size in bytes. If NVM operations are not supported returns
539 * %-EOPNOTSUPP.
541 int usb4_switch_nvm_sector_size(struct tb_switch *sw)
543 u32 metadata;
544 u8 status;
545 int ret;
547 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SECTOR_SIZE, &metadata,
548 &status);
549 if (ret)
550 return ret;
552 if (status)
553 return status == 0x2 ? -EOPNOTSUPP : -EIO;
555 return metadata & USB4_NVM_SECTOR_SIZE_MASK;
558 static int usb4_switch_nvm_read_block(void *data,
559 unsigned int dwaddress, void *buf, size_t dwords)
561 struct tb_switch *sw = data;
562 u8 status = 0;
563 u32 metadata;
564 int ret;
566 metadata = (dwords << USB4_NVM_READ_LENGTH_SHIFT) &
567 USB4_NVM_READ_LENGTH_MASK;
568 metadata |= (dwaddress << USB4_NVM_READ_OFFSET_SHIFT) &
569 USB4_NVM_READ_OFFSET_MASK;
571 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_READ, &metadata,
572 &status, NULL, 0, buf, dwords);
573 if (ret)
574 return ret;
576 return status ? -EIO : 0;
580 * usb4_switch_nvm_read() - Read arbitrary bytes from router NVM
581 * @sw: USB4 router
582 * @address: Starting address in bytes
583 * @buf: Read data is placed here
584 * @size: How many bytes to read
586 * Reads NVM contents of the router. If NVM is not supported returns
587 * %-EOPNOTSUPP.
589 int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
590 size_t size)
592 return usb4_do_read_data(address, buf, size,
593 usb4_switch_nvm_read_block, sw);
596 static int usb4_switch_nvm_set_offset(struct tb_switch *sw,
597 unsigned int address)
599 u32 metadata, dwaddress;
600 u8 status = 0;
601 int ret;
603 dwaddress = address / 4;
604 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
605 USB4_NVM_SET_OFFSET_MASK;
607 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SET_OFFSET, &metadata,
608 &status);
609 if (ret)
610 return ret;
612 return status ? -EIO : 0;
615 static int usb4_switch_nvm_write_next_block(void *data, const void *buf,
616 size_t dwords)
618 struct tb_switch *sw = data;
619 u8 status;
620 int ret;
622 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_WRITE, NULL, &status,
623 buf, dwords, NULL, 0);
624 if (ret)
625 return ret;
627 return status ? -EIO : 0;
631 * usb4_switch_nvm_write() - Write to the router NVM
632 * @sw: USB4 router
633 * @address: Start address where to write in bytes
634 * @buf: Pointer to the data to write
635 * @size: Size of @buf in bytes
637 * Writes @buf to the router NVM using USB4 router operations. If NVM
638 * write is not supported returns %-EOPNOTSUPP.
640 int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
641 const void *buf, size_t size)
643 int ret;
645 ret = usb4_switch_nvm_set_offset(sw, address);
646 if (ret)
647 return ret;
649 return usb4_do_write_data(address, buf, size,
650 usb4_switch_nvm_write_next_block, sw);
654 * usb4_switch_nvm_authenticate() - Authenticate new NVM
655 * @sw: USB4 router
657 * After the new NVM has been written via usb4_switch_nvm_write(), this
658 * function triggers NVM authentication process. The router gets power
659 * cycled and if the authentication is successful the new NVM starts
660 * running. In case of failure returns negative errno.
662 * The caller should call usb4_switch_nvm_authenticate_status() to read
663 * the status of the authentication after power cycle. It should be the
664 * first router operation to avoid the status being lost.
666 int usb4_switch_nvm_authenticate(struct tb_switch *sw)
668 int ret;
670 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_AUTH, NULL, NULL);
671 switch (ret) {
673 * The router is power cycled once NVM_AUTH is started so it is
674 * expected to get any of the following errors back.
676 case -EACCES:
677 case -ENOTCONN:
678 case -ETIMEDOUT:
679 return 0;
681 default:
682 return ret;
687 * usb4_switch_nvm_authenticate_status() - Read status of last NVM authenticate
688 * @sw: USB4 router
689 * @status: Status code of the operation
691 * The function checks if there is status available from the last NVM
692 * authenticate router operation. If there is status then %0 is returned
693 * and the status code is placed in @status. Returns negative errno in case
694 * of failure.
696 * Must be called before any other router operation.
698 int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status)
700 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
701 u16 opcode;
702 u32 val;
703 int ret;
705 if (cm_ops->usb4_switch_nvm_authenticate_status) {
706 ret = cm_ops->usb4_switch_nvm_authenticate_status(sw, status);
707 if (ret != -EOPNOTSUPP)
708 return ret;
711 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
712 if (ret)
713 return ret;
715 /* Check that the opcode is correct */
716 opcode = val & ROUTER_CS_26_OPCODE_MASK;
717 if (opcode == USB4_SWITCH_OP_NVM_AUTH) {
718 if (val & ROUTER_CS_26_OV)
719 return -EBUSY;
720 if (val & ROUTER_CS_26_ONS)
721 return -EOPNOTSUPP;
723 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
724 ROUTER_CS_26_STATUS_SHIFT;
725 } else {
726 *status = 0;
729 return 0;
733 * usb4_switch_query_dp_resource() - Query availability of DP IN resource
734 * @sw: USB4 router
735 * @in: DP IN adapter
737 * For DP tunneling this function can be used to query availability of
738 * DP IN resource. Returns true if the resource is available for DP
739 * tunneling, false otherwise.
741 bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in)
743 u32 metadata = in->port;
744 u8 status;
745 int ret;
747 ret = usb4_switch_op(sw, USB4_SWITCH_OP_QUERY_DP_RESOURCE, &metadata,
748 &status);
750 * If DP resource allocation is not supported assume it is
751 * always available.
753 if (ret == -EOPNOTSUPP)
754 return true;
755 else if (ret)
756 return false;
758 return !status;
762 * usb4_switch_alloc_dp_resource() - Allocate DP IN resource
763 * @sw: USB4 router
764 * @in: DP IN adapter
766 * Allocates DP IN resource for DP tunneling using USB4 router
767 * operations. If the resource was allocated returns %0. Otherwise
768 * returns negative errno, in particular %-EBUSY if the resource is
769 * already allocated.
771 int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
773 u32 metadata = in->port;
774 u8 status;
775 int ret;
777 ret = usb4_switch_op(sw, USB4_SWITCH_OP_ALLOC_DP_RESOURCE, &metadata,
778 &status);
779 if (ret == -EOPNOTSUPP)
780 return 0;
781 else if (ret)
782 return ret;
784 return status ? -EBUSY : 0;
788 * usb4_switch_dealloc_dp_resource() - Releases allocated DP IN resource
789 * @sw: USB4 router
790 * @in: DP IN adapter
792 * Releases the previously allocated DP IN resource.
794 int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
796 u32 metadata = in->port;
797 u8 status;
798 int ret;
800 ret = usb4_switch_op(sw, USB4_SWITCH_OP_DEALLOC_DP_RESOURCE, &metadata,
801 &status);
802 if (ret == -EOPNOTSUPP)
803 return 0;
804 else if (ret)
805 return ret;
807 return status ? -EIO : 0;
810 static int usb4_port_idx(const struct tb_switch *sw, const struct tb_port *port)
812 struct tb_port *p;
813 int usb4_idx = 0;
815 /* Assume port is primary */
816 tb_switch_for_each_port(sw, p) {
817 if (!tb_port_is_null(p))
818 continue;
819 if (tb_is_upstream_port(p))
820 continue;
821 if (!p->link_nr) {
822 if (p == port)
823 break;
824 usb4_idx++;
828 return usb4_idx;
832 * usb4_switch_map_pcie_down() - Map USB4 port to a PCIe downstream adapter
833 * @sw: USB4 router
834 * @port: USB4 port
836 * USB4 routers have direct mapping between USB4 ports and PCIe
837 * downstream adapters where the PCIe topology is extended. This
838 * function returns the corresponding downstream PCIe adapter or %NULL
839 * if no such mapping was possible.
841 struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
842 const struct tb_port *port)
844 int usb4_idx = usb4_port_idx(sw, port);
845 struct tb_port *p;
846 int pcie_idx = 0;
848 /* Find PCIe down port matching usb4_port */
849 tb_switch_for_each_port(sw, p) {
850 if (!tb_port_is_pcie_down(p))
851 continue;
853 if (pcie_idx == usb4_idx)
854 return p;
856 pcie_idx++;
859 return NULL;
863 * usb4_switch_map_usb3_down() - Map USB4 port to a USB3 downstream adapter
864 * @sw: USB4 router
865 * @port: USB4 port
867 * USB4 routers have direct mapping between USB4 ports and USB 3.x
868 * downstream adapters where the USB 3.x topology is extended. This
869 * function returns the corresponding downstream USB 3.x adapter or
870 * %NULL if no such mapping was possible.
872 struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
873 const struct tb_port *port)
875 int usb4_idx = usb4_port_idx(sw, port);
876 struct tb_port *p;
877 int usb_idx = 0;
879 /* Find USB3 down port matching usb4_port */
880 tb_switch_for_each_port(sw, p) {
881 if (!tb_port_is_usb3_down(p))
882 continue;
884 if (usb_idx == usb4_idx)
885 return p;
887 usb_idx++;
890 return NULL;
894 * usb4_port_unlock() - Unlock USB4 downstream port
895 * @port: USB4 port to unlock
897 * Unlocks USB4 downstream port so that the connection manager can
898 * access the router below this port.
900 int usb4_port_unlock(struct tb_port *port)
902 int ret;
903 u32 val;
905 ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
906 if (ret)
907 return ret;
909 val &= ~ADP_CS_4_LCK;
910 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
913 static int usb4_port_set_configured(struct tb_port *port, bool configured)
915 int ret;
916 u32 val;
918 if (!port->cap_usb4)
919 return -EINVAL;
921 ret = tb_port_read(port, &val, TB_CFG_PORT,
922 port->cap_usb4 + PORT_CS_19, 1);
923 if (ret)
924 return ret;
926 if (configured)
927 val |= PORT_CS_19_PC;
928 else
929 val &= ~PORT_CS_19_PC;
931 return tb_port_write(port, &val, TB_CFG_PORT,
932 port->cap_usb4 + PORT_CS_19, 1);
936 * usb4_port_configure() - Set USB4 port configured
937 * @port: USB4 router
939 * Sets the USB4 link to be configured for power management purposes.
941 int usb4_port_configure(struct tb_port *port)
943 return usb4_port_set_configured(port, true);
947 * usb4_port_unconfigure() - Set USB4 port unconfigured
948 * @port: USB4 router
950 * Sets the USB4 link to be unconfigured for power management purposes.
952 void usb4_port_unconfigure(struct tb_port *port)
954 usb4_port_set_configured(port, false);
957 static int usb4_set_xdomain_configured(struct tb_port *port, bool configured)
959 int ret;
960 u32 val;
962 if (!port->cap_usb4)
963 return -EINVAL;
965 ret = tb_port_read(port, &val, TB_CFG_PORT,
966 port->cap_usb4 + PORT_CS_19, 1);
967 if (ret)
968 return ret;
970 if (configured)
971 val |= PORT_CS_19_PID;
972 else
973 val &= ~PORT_CS_19_PID;
975 return tb_port_write(port, &val, TB_CFG_PORT,
976 port->cap_usb4 + PORT_CS_19, 1);
980 * usb4_port_configure_xdomain() - Configure port for XDomain
981 * @port: USB4 port connected to another host
983 * Marks the USB4 port as being connected to another host. Returns %0 in
984 * success and negative errno in failure.
986 int usb4_port_configure_xdomain(struct tb_port *port)
988 return usb4_set_xdomain_configured(port, true);
992 * usb4_port_unconfigure_xdomain() - Unconfigure port for XDomain
993 * @port: USB4 port that was connected to another host
995 * Clears USB4 port from being marked as XDomain.
997 void usb4_port_unconfigure_xdomain(struct tb_port *port)
999 usb4_set_xdomain_configured(port, false);
1002 static int usb4_port_wait_for_bit(struct tb_port *port, u32 offset, u32 bit,
1003 u32 value, int timeout_msec)
1005 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
1007 do {
1008 u32 val;
1009 int ret;
1011 ret = tb_port_read(port, &val, TB_CFG_PORT, offset, 1);
1012 if (ret)
1013 return ret;
1015 if ((val & bit) == value)
1016 return 0;
1018 usleep_range(50, 100);
1019 } while (ktime_before(ktime_get(), timeout));
1021 return -ETIMEDOUT;
1024 static int usb4_port_read_data(struct tb_port *port, void *data, size_t dwords)
1026 if (dwords > USB4_DATA_DWORDS)
1027 return -EINVAL;
1029 return tb_port_read(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
1030 dwords);
1033 static int usb4_port_write_data(struct tb_port *port, const void *data,
1034 size_t dwords)
1036 if (dwords > USB4_DATA_DWORDS)
1037 return -EINVAL;
1039 return tb_port_write(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
1040 dwords);
1043 static int usb4_port_sb_read(struct tb_port *port, enum usb4_sb_target target,
1044 u8 index, u8 reg, void *buf, u8 size)
1046 size_t dwords = DIV_ROUND_UP(size, 4);
1047 int ret;
1048 u32 val;
1050 if (!port->cap_usb4)
1051 return -EINVAL;
1053 val = reg;
1054 val |= size << PORT_CS_1_LENGTH_SHIFT;
1055 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1056 if (target == USB4_SB_TARGET_RETIMER)
1057 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1058 val |= PORT_CS_1_PND;
1060 ret = tb_port_write(port, &val, TB_CFG_PORT,
1061 port->cap_usb4 + PORT_CS_1, 1);
1062 if (ret)
1063 return ret;
1065 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1066 PORT_CS_1_PND, 0, 500);
1067 if (ret)
1068 return ret;
1070 ret = tb_port_read(port, &val, TB_CFG_PORT,
1071 port->cap_usb4 + PORT_CS_1, 1);
1072 if (ret)
1073 return ret;
1075 if (val & PORT_CS_1_NR)
1076 return -ENODEV;
1077 if (val & PORT_CS_1_RC)
1078 return -EIO;
1080 return buf ? usb4_port_read_data(port, buf, dwords) : 0;
1083 static int usb4_port_sb_write(struct tb_port *port, enum usb4_sb_target target,
1084 u8 index, u8 reg, const void *buf, u8 size)
1086 size_t dwords = DIV_ROUND_UP(size, 4);
1087 int ret;
1088 u32 val;
1090 if (!port->cap_usb4)
1091 return -EINVAL;
1093 if (buf) {
1094 ret = usb4_port_write_data(port, buf, dwords);
1095 if (ret)
1096 return ret;
1099 val = reg;
1100 val |= size << PORT_CS_1_LENGTH_SHIFT;
1101 val |= PORT_CS_1_WNR_WRITE;
1102 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1103 if (target == USB4_SB_TARGET_RETIMER)
1104 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1105 val |= PORT_CS_1_PND;
1107 ret = tb_port_write(port, &val, TB_CFG_PORT,
1108 port->cap_usb4 + PORT_CS_1, 1);
1109 if (ret)
1110 return ret;
1112 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1113 PORT_CS_1_PND, 0, 500);
1114 if (ret)
1115 return ret;
1117 ret = tb_port_read(port, &val, TB_CFG_PORT,
1118 port->cap_usb4 + PORT_CS_1, 1);
1119 if (ret)
1120 return ret;
1122 if (val & PORT_CS_1_NR)
1123 return -ENODEV;
1124 if (val & PORT_CS_1_RC)
1125 return -EIO;
1127 return 0;
1130 static int usb4_port_sb_op(struct tb_port *port, enum usb4_sb_target target,
1131 u8 index, enum usb4_sb_opcode opcode, int timeout_msec)
1133 ktime_t timeout;
1134 u32 val;
1135 int ret;
1137 val = opcode;
1138 ret = usb4_port_sb_write(port, target, index, USB4_SB_OPCODE, &val,
1139 sizeof(val));
1140 if (ret)
1141 return ret;
1143 timeout = ktime_add_ms(ktime_get(), timeout_msec);
1145 do {
1146 /* Check results */
1147 ret = usb4_port_sb_read(port, target, index, USB4_SB_OPCODE,
1148 &val, sizeof(val));
1149 if (ret)
1150 return ret;
1152 switch (val) {
1153 case 0:
1154 return 0;
1156 case USB4_SB_OPCODE_ERR:
1157 return -EAGAIN;
1159 case USB4_SB_OPCODE_ONS:
1160 return -EOPNOTSUPP;
1162 default:
1163 if (val != opcode)
1164 return -EIO;
1165 break;
1167 } while (ktime_before(ktime_get(), timeout));
1169 return -ETIMEDOUT;
1173 * usb4_port_enumerate_retimers() - Send RT broadcast transaction
1174 * @port: USB4 port
1176 * This forces the USB4 port to send broadcast RT transaction which
1177 * makes the retimers on the link to assign index to themselves. Returns
1178 * %0 in case of success and negative errno if there was an error.
1180 int usb4_port_enumerate_retimers(struct tb_port *port)
1182 u32 val;
1184 val = USB4_SB_OPCODE_ENUMERATE_RETIMERS;
1185 return usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1186 USB4_SB_OPCODE, &val, sizeof(val));
1189 static inline int usb4_port_retimer_op(struct tb_port *port, u8 index,
1190 enum usb4_sb_opcode opcode,
1191 int timeout_msec)
1193 return usb4_port_sb_op(port, USB4_SB_TARGET_RETIMER, index, opcode,
1194 timeout_msec);
1198 * usb4_port_retimer_read() - Read from retimer sideband registers
1199 * @port: USB4 port
1200 * @index: Retimer index
1201 * @reg: Sideband register to read
1202 * @buf: Data from @reg is stored here
1203 * @size: Number of bytes to read
1205 * Function reads retimer sideband registers starting from @reg. The
1206 * retimer is connected to @port at @index. Returns %0 in case of
1207 * success, and read data is copied to @buf. If there is no retimer
1208 * present at given @index returns %-ENODEV. In any other failure
1209 * returns negative errno.
1211 int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
1212 u8 size)
1214 return usb4_port_sb_read(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1215 size);
1219 * usb4_port_retimer_write() - Write to retimer sideband registers
1220 * @port: USB4 port
1221 * @index: Retimer index
1222 * @reg: Sideband register to write
1223 * @buf: Data that is written starting from @reg
1224 * @size: Number of bytes to write
1226 * Writes retimer sideband registers starting from @reg. The retimer is
1227 * connected to @port at @index. Returns %0 in case of success. If there
1228 * is no retimer present at given @index returns %-ENODEV. In any other
1229 * failure returns negative errno.
1231 int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
1232 const void *buf, u8 size)
1234 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1235 size);
1239 * usb4_port_retimer_is_last() - Is the retimer last on-board retimer
1240 * @port: USB4 port
1241 * @index: Retimer index
1243 * If the retimer at @index is last one (connected directly to the
1244 * Type-C port) this function returns %1. If it is not returns %0. If
1245 * the retimer is not present returns %-ENODEV. Otherwise returns
1246 * negative errno.
1248 int usb4_port_retimer_is_last(struct tb_port *port, u8 index)
1250 u32 metadata;
1251 int ret;
1253 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_QUERY_LAST_RETIMER,
1254 500);
1255 if (ret)
1256 return ret;
1258 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1259 sizeof(metadata));
1260 return ret ? ret : metadata & 1;
1264 * usb4_port_retimer_nvm_sector_size() - Read retimer NVM sector size
1265 * @port: USB4 port
1266 * @index: Retimer index
1268 * Reads NVM sector size (in bytes) of a retimer at @index. This
1269 * operation can be used to determine whether the retimer supports NVM
1270 * upgrade for example. Returns sector size in bytes or negative errno
1271 * in case of error. Specifically returns %-ENODEV if there is no
1272 * retimer at @index.
1274 int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index)
1276 u32 metadata;
1277 int ret;
1279 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_GET_NVM_SECTOR_SIZE,
1280 500);
1281 if (ret)
1282 return ret;
1284 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1285 sizeof(metadata));
1286 return ret ? ret : metadata & USB4_NVM_SECTOR_SIZE_MASK;
1289 static int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index,
1290 unsigned int address)
1292 u32 metadata, dwaddress;
1293 int ret;
1295 dwaddress = address / 4;
1296 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
1297 USB4_NVM_SET_OFFSET_MASK;
1299 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1300 sizeof(metadata));
1301 if (ret)
1302 return ret;
1304 return usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_SET_OFFSET,
1305 500);
1308 struct retimer_info {
1309 struct tb_port *port;
1310 u8 index;
1313 static int usb4_port_retimer_nvm_write_next_block(void *data, const void *buf,
1314 size_t dwords)
1317 const struct retimer_info *info = data;
1318 struct tb_port *port = info->port;
1319 u8 index = info->index;
1320 int ret;
1322 ret = usb4_port_retimer_write(port, index, USB4_SB_DATA,
1323 buf, dwords * 4);
1324 if (ret)
1325 return ret;
1327 return usb4_port_retimer_op(port, index,
1328 USB4_SB_OPCODE_NVM_BLOCK_WRITE, 1000);
1332 * usb4_port_retimer_nvm_write() - Write to retimer NVM
1333 * @port: USB4 port
1334 * @index: Retimer index
1335 * @address: Byte address where to start the write
1336 * @buf: Data to write
1337 * @size: Size in bytes how much to write
1339 * Writes @size bytes from @buf to the retimer NVM. Used for NVM
1340 * upgrade. Returns %0 if the data was written successfully and negative
1341 * errno in case of failure. Specifically returns %-ENODEV if there is
1342 * no retimer at @index.
1344 int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index, unsigned int address,
1345 const void *buf, size_t size)
1347 struct retimer_info info = { .port = port, .index = index };
1348 int ret;
1350 ret = usb4_port_retimer_nvm_set_offset(port, index, address);
1351 if (ret)
1352 return ret;
1354 return usb4_do_write_data(address, buf, size,
1355 usb4_port_retimer_nvm_write_next_block, &info);
1359 * usb4_port_retimer_nvm_authenticate() - Start retimer NVM upgrade
1360 * @port: USB4 port
1361 * @index: Retimer index
1363 * After the new NVM image has been written via usb4_port_retimer_nvm_write()
1364 * this function can be used to trigger the NVM upgrade process. If
1365 * successful the retimer restarts with the new NVM and may not have the
1366 * index set so one needs to call usb4_port_enumerate_retimers() to
1367 * force index to be assigned.
1369 int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index)
1371 u32 val;
1374 * We need to use the raw operation here because once the
1375 * authentication completes the retimer index is not set anymore
1376 * so we do not get back the status now.
1378 val = USB4_SB_OPCODE_NVM_AUTH_WRITE;
1379 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index,
1380 USB4_SB_OPCODE, &val, sizeof(val));
1384 * usb4_port_retimer_nvm_authenticate_status() - Read status of NVM upgrade
1385 * @port: USB4 port
1386 * @index: Retimer index
1387 * @status: Raw status code read from metadata
1389 * This can be called after usb4_port_retimer_nvm_authenticate() and
1390 * usb4_port_enumerate_retimers() to fetch status of the NVM upgrade.
1392 * Returns %0 if the authentication status was successfully read. The
1393 * completion metadata (the result) is then stored into @status. If
1394 * reading the status fails, returns negative errno.
1396 int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1397 u32 *status)
1399 u32 metadata, val;
1400 int ret;
1402 ret = usb4_port_retimer_read(port, index, USB4_SB_OPCODE, &val,
1403 sizeof(val));
1404 if (ret)
1405 return ret;
1407 switch (val) {
1408 case 0:
1409 *status = 0;
1410 return 0;
1412 case USB4_SB_OPCODE_ERR:
1413 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA,
1414 &metadata, sizeof(metadata));
1415 if (ret)
1416 return ret;
1418 *status = metadata & USB4_SB_METADATA_NVM_AUTH_WRITE_MASK;
1419 return 0;
1421 case USB4_SB_OPCODE_ONS:
1422 return -EOPNOTSUPP;
1424 default:
1425 return -EIO;
1429 static int usb4_port_retimer_nvm_read_block(void *data, unsigned int dwaddress,
1430 void *buf, size_t dwords)
1432 const struct retimer_info *info = data;
1433 struct tb_port *port = info->port;
1434 u8 index = info->index;
1435 u32 metadata;
1436 int ret;
1438 metadata = dwaddress << USB4_NVM_READ_OFFSET_SHIFT;
1439 if (dwords < USB4_DATA_DWORDS)
1440 metadata |= dwords << USB4_NVM_READ_LENGTH_SHIFT;
1442 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1443 sizeof(metadata));
1444 if (ret)
1445 return ret;
1447 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_READ, 500);
1448 if (ret)
1449 return ret;
1451 return usb4_port_retimer_read(port, index, USB4_SB_DATA, buf,
1452 dwords * 4);
1456 * usb4_port_retimer_nvm_read() - Read contents of retimer NVM
1457 * @port: USB4 port
1458 * @index: Retimer index
1459 * @address: NVM address (in bytes) to start reading
1460 * @buf: Data read from NVM is stored here
1461 * @size: Number of bytes to read
1463 * Reads retimer NVM and copies the contents to @buf. Returns %0 if the
1464 * read was successful and negative errno in case of failure.
1465 * Specifically returns %-ENODEV if there is no retimer at @index.
1467 int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
1468 unsigned int address, void *buf, size_t size)
1470 struct retimer_info info = { .port = port, .index = index };
1472 return usb4_do_read_data(address, buf, size,
1473 usb4_port_retimer_nvm_read_block, &info);
1477 * usb4_usb3_port_max_link_rate() - Maximum support USB3 link rate
1478 * @port: USB3 adapter port
1480 * Return maximum supported link rate of a USB3 adapter in Mb/s.
1481 * Negative errno in case of error.
1483 int usb4_usb3_port_max_link_rate(struct tb_port *port)
1485 int ret, lr;
1486 u32 val;
1488 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1489 return -EINVAL;
1491 ret = tb_port_read(port, &val, TB_CFG_PORT,
1492 port->cap_adap + ADP_USB3_CS_4, 1);
1493 if (ret)
1494 return ret;
1496 lr = (val & ADP_USB3_CS_4_MSLR_MASK) >> ADP_USB3_CS_4_MSLR_SHIFT;
1497 return lr == ADP_USB3_CS_4_MSLR_20G ? 20000 : 10000;
1501 * usb4_usb3_port_actual_link_rate() - Established USB3 link rate
1502 * @port: USB3 adapter port
1504 * Return actual established link rate of a USB3 adapter in Mb/s. If the
1505 * link is not up returns %0 and negative errno in case of failure.
1507 int usb4_usb3_port_actual_link_rate(struct tb_port *port)
1509 int ret, lr;
1510 u32 val;
1512 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1513 return -EINVAL;
1515 ret = tb_port_read(port, &val, TB_CFG_PORT,
1516 port->cap_adap + ADP_USB3_CS_4, 1);
1517 if (ret)
1518 return ret;
1520 if (!(val & ADP_USB3_CS_4_ULV))
1521 return 0;
1523 lr = val & ADP_USB3_CS_4_ALR_MASK;
1524 return lr == ADP_USB3_CS_4_ALR_20G ? 20000 : 10000;
1527 static int usb4_usb3_port_cm_request(struct tb_port *port, bool request)
1529 int ret;
1530 u32 val;
1532 if (!tb_port_is_usb3_down(port))
1533 return -EINVAL;
1534 if (tb_route(port->sw))
1535 return -EINVAL;
1537 ret = tb_port_read(port, &val, TB_CFG_PORT,
1538 port->cap_adap + ADP_USB3_CS_2, 1);
1539 if (ret)
1540 return ret;
1542 if (request)
1543 val |= ADP_USB3_CS_2_CMR;
1544 else
1545 val &= ~ADP_USB3_CS_2_CMR;
1547 ret = tb_port_write(port, &val, TB_CFG_PORT,
1548 port->cap_adap + ADP_USB3_CS_2, 1);
1549 if (ret)
1550 return ret;
1553 * We can use val here directly as the CMR bit is in the same place
1554 * as HCA. Just mask out others.
1556 val &= ADP_USB3_CS_2_CMR;
1557 return usb4_port_wait_for_bit(port, port->cap_adap + ADP_USB3_CS_1,
1558 ADP_USB3_CS_1_HCA, val, 1500);
1561 static inline int usb4_usb3_port_set_cm_request(struct tb_port *port)
1563 return usb4_usb3_port_cm_request(port, true);
1566 static inline int usb4_usb3_port_clear_cm_request(struct tb_port *port)
1568 return usb4_usb3_port_cm_request(port, false);
1571 static unsigned int usb3_bw_to_mbps(u32 bw, u8 scale)
1573 unsigned long uframes;
1575 uframes = bw * 512UL << scale;
1576 return DIV_ROUND_CLOSEST(uframes * 8000, 1000 * 1000);
1579 static u32 mbps_to_usb3_bw(unsigned int mbps, u8 scale)
1581 unsigned long uframes;
1583 /* 1 uframe is 1/8 ms (125 us) -> 1 / 8000 s */
1584 uframes = ((unsigned long)mbps * 1000 * 1000) / 8000;
1585 return DIV_ROUND_UP(uframes, 512UL << scale);
1588 static int usb4_usb3_port_read_allocated_bandwidth(struct tb_port *port,
1589 int *upstream_bw,
1590 int *downstream_bw)
1592 u32 val, bw, scale;
1593 int ret;
1595 ret = tb_port_read(port, &val, TB_CFG_PORT,
1596 port->cap_adap + ADP_USB3_CS_2, 1);
1597 if (ret)
1598 return ret;
1600 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1601 port->cap_adap + ADP_USB3_CS_3, 1);
1602 if (ret)
1603 return ret;
1605 scale &= ADP_USB3_CS_3_SCALE_MASK;
1607 bw = val & ADP_USB3_CS_2_AUBW_MASK;
1608 *upstream_bw = usb3_bw_to_mbps(bw, scale);
1610 bw = (val & ADP_USB3_CS_2_ADBW_MASK) >> ADP_USB3_CS_2_ADBW_SHIFT;
1611 *downstream_bw = usb3_bw_to_mbps(bw, scale);
1613 return 0;
1617 * usb4_usb3_port_allocated_bandwidth() - Bandwidth allocated for USB3
1618 * @port: USB3 adapter port
1619 * @upstream_bw: Allocated upstream bandwidth is stored here
1620 * @downstream_bw: Allocated downstream bandwidth is stored here
1622 * Stores currently allocated USB3 bandwidth into @upstream_bw and
1623 * @downstream_bw in Mb/s. Returns %0 in case of success and negative
1624 * errno in failure.
1626 int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
1627 int *downstream_bw)
1629 int ret;
1631 ret = usb4_usb3_port_set_cm_request(port);
1632 if (ret)
1633 return ret;
1635 ret = usb4_usb3_port_read_allocated_bandwidth(port, upstream_bw,
1636 downstream_bw);
1637 usb4_usb3_port_clear_cm_request(port);
1639 return ret;
1642 static int usb4_usb3_port_read_consumed_bandwidth(struct tb_port *port,
1643 int *upstream_bw,
1644 int *downstream_bw)
1646 u32 val, bw, scale;
1647 int ret;
1649 ret = tb_port_read(port, &val, TB_CFG_PORT,
1650 port->cap_adap + ADP_USB3_CS_1, 1);
1651 if (ret)
1652 return ret;
1654 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1655 port->cap_adap + ADP_USB3_CS_3, 1);
1656 if (ret)
1657 return ret;
1659 scale &= ADP_USB3_CS_3_SCALE_MASK;
1661 bw = val & ADP_USB3_CS_1_CUBW_MASK;
1662 *upstream_bw = usb3_bw_to_mbps(bw, scale);
1664 bw = (val & ADP_USB3_CS_1_CDBW_MASK) >> ADP_USB3_CS_1_CDBW_SHIFT;
1665 *downstream_bw = usb3_bw_to_mbps(bw, scale);
1667 return 0;
1670 static int usb4_usb3_port_write_allocated_bandwidth(struct tb_port *port,
1671 int upstream_bw,
1672 int downstream_bw)
1674 u32 val, ubw, dbw, scale;
1675 int ret;
1677 /* Read the used scale, hardware default is 0 */
1678 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1679 port->cap_adap + ADP_USB3_CS_3, 1);
1680 if (ret)
1681 return ret;
1683 scale &= ADP_USB3_CS_3_SCALE_MASK;
1684 ubw = mbps_to_usb3_bw(upstream_bw, scale);
1685 dbw = mbps_to_usb3_bw(downstream_bw, scale);
1687 ret = tb_port_read(port, &val, TB_CFG_PORT,
1688 port->cap_adap + ADP_USB3_CS_2, 1);
1689 if (ret)
1690 return ret;
1692 val &= ~(ADP_USB3_CS_2_AUBW_MASK | ADP_USB3_CS_2_ADBW_MASK);
1693 val |= dbw << ADP_USB3_CS_2_ADBW_SHIFT;
1694 val |= ubw;
1696 return tb_port_write(port, &val, TB_CFG_PORT,
1697 port->cap_adap + ADP_USB3_CS_2, 1);
1701 * usb4_usb3_port_allocate_bandwidth() - Allocate bandwidth for USB3
1702 * @port: USB3 adapter port
1703 * @upstream_bw: New upstream bandwidth
1704 * @downstream_bw: New downstream bandwidth
1706 * This can be used to set how much bandwidth is allocated for the USB3
1707 * tunneled isochronous traffic. @upstream_bw and @downstream_bw are the
1708 * new values programmed to the USB3 adapter allocation registers. If
1709 * the values are lower than what is currently consumed the allocation
1710 * is set to what is currently consumed instead (consumed bandwidth
1711 * cannot be taken away by CM). The actual new values are returned in
1712 * @upstream_bw and @downstream_bw.
1714 * Returns %0 in case of success and negative errno if there was a
1715 * failure.
1717 int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
1718 int *downstream_bw)
1720 int ret, consumed_up, consumed_down, allocate_up, allocate_down;
1722 ret = usb4_usb3_port_set_cm_request(port);
1723 if (ret)
1724 return ret;
1726 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
1727 &consumed_down);
1728 if (ret)
1729 goto err_request;
1731 /* Don't allow it go lower than what is consumed */
1732 allocate_up = max(*upstream_bw, consumed_up);
1733 allocate_down = max(*downstream_bw, consumed_down);
1735 ret = usb4_usb3_port_write_allocated_bandwidth(port, allocate_up,
1736 allocate_down);
1737 if (ret)
1738 goto err_request;
1740 *upstream_bw = allocate_up;
1741 *downstream_bw = allocate_down;
1743 err_request:
1744 usb4_usb3_port_clear_cm_request(port);
1745 return ret;
1749 * usb4_usb3_port_release_bandwidth() - Release allocated USB3 bandwidth
1750 * @port: USB3 adapter port
1751 * @upstream_bw: New allocated upstream bandwidth
1752 * @downstream_bw: New allocated downstream bandwidth
1754 * Releases USB3 allocated bandwidth down to what is actually consumed.
1755 * The new bandwidth is returned in @upstream_bw and @downstream_bw.
1757 * Returns 0% in success and negative errno in case of failure.
1759 int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
1760 int *downstream_bw)
1762 int ret, consumed_up, consumed_down;
1764 ret = usb4_usb3_port_set_cm_request(port);
1765 if (ret)
1766 return ret;
1768 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
1769 &consumed_down);
1770 if (ret)
1771 goto err_request;
1774 * Always keep 1000 Mb/s to make sure xHCI has at least some
1775 * bandwidth available for isochronous traffic.
1777 if (consumed_up < 1000)
1778 consumed_up = 1000;
1779 if (consumed_down < 1000)
1780 consumed_down = 1000;
1782 ret = usb4_usb3_port_write_allocated_bandwidth(port, consumed_up,
1783 consumed_down);
1784 if (ret)
1785 goto err_request;
1787 *upstream_bw = consumed_up;
1788 *downstream_bw = consumed_down;
1790 err_request:
1791 usb4_usb3_port_clear_cm_request(port);
1792 return ret;