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iwlwifi: use rmb/wmb to protect indirect mmio operation
[linux/fpc-iii.git] / drivers / net / atarilance.c
blob2d81f6afcb589075009d6e45bc0db9dcd4b40c00
1 /* atarilance.c: Ethernet driver for VME Lance cards on the Atari */
2 /*
3 Written 1995/96 by Roman Hodek (Roman.Hodek@informatik.uni-erlangen.de)
4
5 This software may be used and distributed according to the terms
6 of the GNU General Public License, incorporated herein by reference.
7
8 This drivers was written with the following sources of reference:
9 - The driver for the Riebl Lance card by the TU Vienna.
10 - The modified TUW driver for PAM's VME cards
11 - The PC-Linux driver for Lance cards (but this is for bus master
12 cards, not the shared memory ones)
13 - The Amiga Ariadne driver
14
15 v1.0: (in 1.2.13pl4/0.9.13)
16 Initial version
17 v1.1: (in 1.2.13pl5)
18 more comments
19 deleted some debugging stuff
20 optimized register access (keep AREG pointing to CSR0)
21 following AMD, CSR0_STRT should be set only after IDON is detected
22 use memcpy() for data transfers, that also employs long word moves
23 better probe procedure for 24-bit systems
24 non-VME-RieblCards need extra delays in memcpy
25 must also do write test, since 0xfxe00000 may hit ROM
26 use 8/32 tx/rx buffers, which should give better NFS performance;
27 this is made possible by shifting the last packet buffer after the
28 RieblCard reserved area
29 v1.2: (in 1.2.13pl8)
30 again fixed probing for the Falcon; 0xfe01000 hits phys. 0x00010000
31 and thus RAM, in case of no Lance found all memory contents have to
32 be restored!
33 Now possible to compile as module.
34 v1.3: 03/30/96 Jes Sorensen, Roman (in 1.3)
35 Several little 1.3 adaptions
36 When the lance is stopped it jumps back into little-endian
37 mode. It is therefore necessary to put it back where it
38 belongs, in big endian mode, in order to make things work.
39 This might be the reason why multicast-mode didn't work
40 before, but I'm not able to test it as I only got an Amiga
41 (we had similar problems with the A2065 driver).
42
43 */
44
45 static char version[] = "atarilance.c: v1.3 04/04/96 "
46 "Roman.Hodek@informatik.uni-erlangen.de\n";
47
48 #include <linux/netdevice.h>
49 #include <linux/etherdevice.h>
50 #include <linux/module.h>
51 #include <linux/stddef.h>
52 #include <linux/kernel.h>
53 #include <linux/string.h>
54 #include <linux/errno.h>
55 #include <linux/skbuff.h>
56 #include <linux/slab.h>
57 #include <linux/interrupt.h>
58 #include <linux/init.h>
59 #include <linux/bitops.h>
60
61 #include <asm/setup.h>
62 #include <asm/irq.h>
63 #include <asm/atarihw.h>
64 #include <asm/atariints.h>
65 #include <asm/io.h>
66
67 /* Debug level:
68 * 0 = silent, print only serious errors
69 * 1 = normal, print error messages
70 * 2 = debug, print debug infos
71 * 3 = debug, print even more debug infos (packet data)
72 */
73
74 #define LANCE_DEBUG 1
75
76 #ifdef LANCE_DEBUG
77 static int lance_debug = LANCE_DEBUG;
78 #else
79 static int lance_debug = 1;
80 #endif
81 module_param(lance_debug, int, 0);
82 MODULE_PARM_DESC(lance_debug, "atarilance debug level (0-3)");
83 MODULE_LICENSE("GPL");
84
85 /* Print debug messages on probing? */
86 #undef LANCE_DEBUG_PROBE
87
88 #define DPRINTK(n,a) \
89 do { \
90 if (lance_debug >= n) \
91 printk a; \
92 } while( 0 )
93
94 #ifdef LANCE_DEBUG_PROBE
95 # define PROBE_PRINT(a) printk a
96 #else
97 # define PROBE_PRINT(a)
98 #endif
99
100 /* These define the number of Rx and Tx buffers as log2. (Only powers
101 * of two are valid)
102 * Much more rx buffers (32) are reserved than tx buffers (8), since receiving
103 * is more time critical then sending and packets may have to remain in the
104 * board's memory when main memory is low.
105 */
106
107 #define TX_LOG_RING_SIZE 3
108 #define RX_LOG_RING_SIZE 5
109
110 /* These are the derived values */
111
112 #define TX_RING_SIZE (1 << TX_LOG_RING_SIZE)
113 #define TX_RING_LEN_BITS (TX_LOG_RING_SIZE << 5)
114 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
115
116 #define RX_RING_SIZE (1 << RX_LOG_RING_SIZE)
117 #define RX_RING_LEN_BITS (RX_LOG_RING_SIZE << 5)
118 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
119
120 #define TX_TIMEOUT 20
121
122 /* The LANCE Rx and Tx ring descriptors. */
123 struct lance_rx_head {
124 unsigned short base; /* Low word of base addr */
125 volatile unsigned char flag;
126 unsigned char base_hi; /* High word of base addr (unused) */
127 short buf_length; /* This length is 2s complement! */
128 volatile short msg_length; /* This length is "normal". */
129 };
130
131 struct lance_tx_head {
132 unsigned short base; /* Low word of base addr */
133 volatile unsigned char flag;
134 unsigned char base_hi; /* High word of base addr (unused) */
135 short length; /* Length is 2s complement! */
136 volatile short misc;
137 };
138
139 struct ringdesc {
140 unsigned short adr_lo; /* Low 16 bits of address */
141 unsigned char len; /* Length bits */
142 unsigned char adr_hi; /* High 8 bits of address (unused) */
143 };
144
145 /* The LANCE initialization block, described in databook. */
146 struct lance_init_block {
147 unsigned short mode; /* Pre-set mode */
148 unsigned char hwaddr[6]; /* Physical ethernet address */
149 unsigned filter[2]; /* Multicast filter (unused). */
150 /* Receive and transmit ring base, along with length bits. */
151 struct ringdesc rx_ring;
152 struct ringdesc tx_ring;
153 };
154
155 /* The whole layout of the Lance shared memory */
156 struct lance_memory {
157 struct lance_init_block init;
158 struct lance_tx_head tx_head[TX_RING_SIZE];
159 struct lance_rx_head rx_head[RX_RING_SIZE];
160 char packet_area[0]; /* packet data follow after the
161 * init block and the ring
162 * descriptors and are located
163 * at runtime */
164 };
165
166 /* RieblCard specifics:
167 * The original TOS driver for these cards reserves the area from offset
168 * 0xee70 to 0xeebb for storing configuration data. Of interest to us is the
169 * Ethernet address there, and the magic for verifying the data's validity.
170 * The reserved area isn't touch by packet buffers. Furthermore, offset 0xfffe
171 * is reserved for the interrupt vector number.
172 */
173 #define RIEBL_RSVD_START 0xee70
174 #define RIEBL_RSVD_END 0xeec0
175 #define RIEBL_MAGIC 0x09051990
176 #define RIEBL_MAGIC_ADDR ((unsigned long *)(((char *)MEM) + 0xee8a))
177 #define RIEBL_HWADDR_ADDR ((unsigned char *)(((char *)MEM) + 0xee8e))
178 #define RIEBL_IVEC_ADDR ((unsigned short *)(((char *)MEM) + 0xfffe))
179
180 /* This is a default address for the old RieblCards without a battery
181 * that have no ethernet address at boot time. 00:00:36:04 is the
182 * prefix for Riebl cards, the 00:00 at the end is arbitrary.
183 */
184
185 static unsigned char OldRieblDefHwaddr[6] = {
186 0x00, 0x00, 0x36, 0x04, 0x00, 0x00
187 };
188
189
190 /* I/O registers of the Lance chip */
191
192 struct lance_ioreg {
193 /* base+0x0 */ volatile unsigned short data;
194 /* base+0x2 */ volatile unsigned short addr;
195 unsigned char _dummy1[3];
196 /* base+0x7 */ volatile unsigned char ivec;
197 unsigned char _dummy2[5];
198 /* base+0xd */ volatile unsigned char eeprom;
199 unsigned char _dummy3;
200 /* base+0xf */ volatile unsigned char mem;
201 };
202
203 /* Types of boards this driver supports */
204
205 enum lance_type {
206 OLD_RIEBL, /* old Riebl card without battery */
207 NEW_RIEBL, /* new Riebl card with battery */
208 PAM_CARD /* PAM card with EEPROM */
209 };
210
211 static char *lance_names[] = {
212 "Riebl-Card (without battery)",
213 "Riebl-Card (with battery)",
214 "PAM intern card"
215 };
216
217 /* The driver's private device structure */
218
219 struct lance_private {
220 enum lance_type cardtype;
221 struct lance_ioreg *iobase;
222 struct lance_memory *mem;
223 int cur_rx, cur_tx; /* The next free ring entry */
224 int dirty_tx; /* Ring entries to be freed. */
225 /* copy function */
226 void *(*memcpy_f)( void *, const void *, size_t );
227 /* This must be long for set_bit() */
228 long tx_full;
229 spinlock_t devlock;
230 };
231
232 /* I/O register access macros */
233
234 #define MEM lp->mem
235 #define DREG IO->data
236 #define AREG IO->addr
237 #define REGA(a) (*( AREG = (a), &DREG ))
238
239 /* Definitions for packet buffer access: */
240 #define PKT_BUF_SZ 1544
241 /* Get the address of a packet buffer corresponding to a given buffer head */
242 #define PKTBUF_ADDR(head) (((unsigned char *)(MEM)) + (head)->base)
243
244 /* Possible memory/IO addresses for probing */
245
246 static struct lance_addr {
247 unsigned long memaddr;
248 unsigned long ioaddr;
249 int slow_flag;
250 } lance_addr_list[] = {
251 { 0xfe010000, 0xfe00fff0, 0 }, /* RieblCard VME in TT */
252 { 0xffc10000, 0xffc0fff0, 0 }, /* RieblCard VME in MegaSTE
253 (highest byte stripped) */
254 { 0xffe00000, 0xffff7000, 1 }, /* RieblCard in ST
255 (highest byte stripped) */
256 { 0xffd00000, 0xffff7000, 1 }, /* RieblCard in ST with hw modif. to
257 avoid conflict with ROM
258 (highest byte stripped) */
259 { 0xffcf0000, 0xffcffff0, 0 }, /* PAMCard VME in TT and MSTE
260 (highest byte stripped) */
261 { 0xfecf0000, 0xfecffff0, 0 }, /* Rhotron's PAMCard VME in TT and MSTE
262 (highest byte stripped) */
263 };
264
265 #define N_LANCE_ADDR ARRAY_SIZE(lance_addr_list)
266
267
268 /* Definitions for the Lance */
269
270 /* tx_head flags */
271 #define TMD1_ENP 0x01 /* end of packet */
272 #define TMD1_STP 0x02 /* start of packet */
273 #define TMD1_DEF 0x04 /* deferred */
274 #define TMD1_ONE 0x08 /* one retry needed */
275 #define TMD1_MORE 0x10 /* more than one retry needed */
276 #define TMD1_ERR 0x40 /* error summary */
277 #define TMD1_OWN 0x80 /* ownership (set: chip owns) */
278
279 #define TMD1_OWN_CHIP TMD1_OWN
280 #define TMD1_OWN_HOST 0
281
282 /* tx_head misc field */
283 #define TMD3_TDR 0x03FF /* Time Domain Reflectometry counter */
284 #define TMD3_RTRY 0x0400 /* failed after 16 retries */
285 #define TMD3_LCAR 0x0800 /* carrier lost */
286 #define TMD3_LCOL 0x1000 /* late collision */
287 #define TMD3_UFLO 0x4000 /* underflow (late memory) */
288 #define TMD3_BUFF 0x8000 /* buffering error (no ENP) */
289
290 /* rx_head flags */
291 #define RMD1_ENP 0x01 /* end of packet */
292 #define RMD1_STP 0x02 /* start of packet */
293 #define RMD1_BUFF 0x04 /* buffer error */
294 #define RMD1_CRC 0x08 /* CRC error */
295 #define RMD1_OFLO 0x10 /* overflow */
296 #define RMD1_FRAM 0x20 /* framing error */
297 #define RMD1_ERR 0x40 /* error summary */
298 #define RMD1_OWN 0x80 /* ownership (set: ship owns) */
299
300 #define RMD1_OWN_CHIP RMD1_OWN
301 #define RMD1_OWN_HOST 0
302
303 /* register names */
304 #define CSR0 0 /* mode/status */
305 #define CSR1 1 /* init block addr (low) */
306 #define CSR2 2 /* init block addr (high) */
307 #define CSR3 3 /* misc */
308 #define CSR8 8 /* address filter */
309 #define CSR15 15 /* promiscuous mode */
310
311 /* CSR0 */
312 /* (R=readable, W=writeable, S=set on write, C=clear on write) */
313 #define CSR0_INIT 0x0001 /* initialize (RS) */
314 #define CSR0_STRT 0x0002 /* start (RS) */
315 #define CSR0_STOP 0x0004 /* stop (RS) */
316 #define CSR0_TDMD 0x0008 /* transmit demand (RS) */
317 #define CSR0_TXON 0x0010 /* transmitter on (R) */
318 #define CSR0_RXON 0x0020 /* receiver on (R) */
319 #define CSR0_INEA 0x0040 /* interrupt enable (RW) */
320 #define CSR0_INTR 0x0080 /* interrupt active (R) */
321 #define CSR0_IDON 0x0100 /* initialization done (RC) */
322 #define CSR0_TINT 0x0200 /* transmitter interrupt (RC) */
323 #define CSR0_RINT 0x0400 /* receiver interrupt (RC) */
324 #define CSR0_MERR 0x0800 /* memory error (RC) */
325 #define CSR0_MISS 0x1000 /* missed frame (RC) */
326 #define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */
327 #define CSR0_BABL 0x4000 /* babble: tx-ed too many bits (RC) */
328 #define CSR0_ERR 0x8000 /* error (RC) */
329
330 /* CSR3 */
331 #define CSR3_BCON 0x0001 /* byte control */
332 #define CSR3_ACON 0x0002 /* ALE control */
333 #define CSR3_BSWP 0x0004 /* byte swap (1=big endian) */
334
335
336
337 /***************************** Prototypes *****************************/
338
339 static unsigned long lance_probe1( struct net_device *dev, struct lance_addr
340 *init_rec );
341 static int lance_open( struct net_device *dev );
342 static void lance_init_ring( struct net_device *dev );
343 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev );
344 static irqreturn_t lance_interrupt( int irq, void *dev_id );
345 static int lance_rx( struct net_device *dev );
346 static int lance_close( struct net_device *dev );
347 static void set_multicast_list( struct net_device *dev );
348 static int lance_set_mac_address( struct net_device *dev, void *addr );
349 static void lance_tx_timeout (struct net_device *dev);
350
351 /************************* End of Prototypes **************************/
352
353
354
355
356
357 static void *slow_memcpy( void *dst, const void *src, size_t len )
358
359 { char *cto = dst;
360 const char *cfrom = src;
361
362 while( len-- ) {
363 *cto++ = *cfrom++;
364 MFPDELAY();
365 }
366 return( dst );
367 }
368
369
370 struct net_device * __init atarilance_probe(int unit)
371 {
372 int i;
373 static int found;
374 struct net_device *dev;
375 int err = -ENODEV;
376
377 if (!MACH_IS_ATARI || found)
378 /* Assume there's only one board possible... That seems true, since
379 * the Riebl/PAM board's address cannot be changed. */
380 return ERR_PTR(-ENODEV);
381
382 dev = alloc_etherdev(sizeof(struct lance_private));
383 if (!dev)
384 return ERR_PTR(-ENOMEM);
385 if (unit >= 0) {
386 sprintf(dev->name, "eth%d", unit);
387 netdev_boot_setup_check(dev);
388 }
389
390 for( i = 0; i < N_LANCE_ADDR; ++i ) {
391 if (lance_probe1( dev, &lance_addr_list[i] )) {
392 found = 1;
393 err = register_netdev(dev);
394 if (!err)
395 return dev;
396 free_irq(dev->irq, dev);
397 break;
398 }
399 }
400 free_netdev(dev);
401 return ERR_PTR(err);
402 }
403
404
405 /* Derived from hwreg_present() in atari/config.c: */
406
407 static noinline int __init addr_accessible(volatile void *regp, int wordflag,
408 int writeflag)
409 {
410 int ret;
411 long flags;
412 long *vbr, save_berr;
413
414 local_irq_save(flags);
415
416 __asm__ __volatile__ ( "movec %/vbr,%0" : "=r" (vbr) : );
417 save_berr = vbr[2];
418
419 __asm__ __volatile__
420 ( "movel %/sp,%/d1\n\t"
421 "movel #Lberr,%2@\n\t"
422 "moveq #0,%0\n\t"
423 "tstl %3\n\t"
424 "bne 1f\n\t"
425 "moveb %1@,%/d0\n\t"
426 "nop \n\t"
427 "bra 2f\n"
428 "1: movew %1@,%/d0\n\t"
429 "nop \n"
430 "2: tstl %4\n\t"
431 "beq 2f\n\t"
432 "tstl %3\n\t"
433 "bne 1f\n\t"
434 "clrb %1@\n\t"
435 "nop \n\t"
436 "moveb %/d0,%1@\n\t"
437 "nop \n\t"
438 "bra 2f\n"
439 "1: clrw %1@\n\t"
440 "nop \n\t"
441 "movew %/d0,%1@\n\t"
442 "nop \n"
443 "2: moveq #1,%0\n"
444 "Lberr: movel %/d1,%/sp"
445 : "=&d" (ret)
446 : "a" (regp), "a" (&vbr[2]), "rm" (wordflag), "rm" (writeflag)
447 : "d0", "d1", "memory"
448 );
449
450 vbr[2] = save_berr;
451 local_irq_restore(flags);
452
453 return( ret );
454 }
455
456
457 static unsigned long __init lance_probe1( struct net_device *dev,
458 struct lance_addr *init_rec )
459 {
460 volatile unsigned short *memaddr =
461 (volatile unsigned short *)init_rec->memaddr;
462 volatile unsigned short *ioaddr =
463 (volatile unsigned short *)init_rec->ioaddr;
464 struct lance_private *lp;
465 struct lance_ioreg *IO;
466 int i;
467 static int did_version;
468 unsigned short save1, save2;
469
470 PROBE_PRINT(( "Probing for Lance card at mem %#lx io %#lx\n",
471 (long)memaddr, (long)ioaddr ));
472
473 /* Test whether memory readable and writable */
474 PROBE_PRINT(( "lance_probe1: testing memory to be accessible\n" ));
475 if (!addr_accessible( memaddr, 1, 1 )) goto probe_fail;
476
477 /* Written values should come back... */
478 PROBE_PRINT(( "lance_probe1: testing memory to be writable (1)\n" ));
479 save1 = *memaddr;
480 *memaddr = 0x0001;
481 if (*memaddr != 0x0001) goto probe_fail;
482 PROBE_PRINT(( "lance_probe1: testing memory to be writable (2)\n" ));
483 *memaddr = 0x0000;
484 if (*memaddr != 0x0000) goto probe_fail;
485 *memaddr = save1;
486
487 /* First port should be readable and writable */
488 PROBE_PRINT(( "lance_probe1: testing ioport to be accessible\n" ));
489 if (!addr_accessible( ioaddr, 1, 1 )) goto probe_fail;
490
491 /* and written values should be readable */
492 PROBE_PRINT(( "lance_probe1: testing ioport to be writeable\n" ));
493 save2 = ioaddr[1];
494 ioaddr[1] = 0x0001;
495 if (ioaddr[1] != 0x0001) goto probe_fail;
496
497 /* The CSR0_INIT bit should not be readable */
498 PROBE_PRINT(( "lance_probe1: testing CSR0 register function (1)\n" ));
499 save1 = ioaddr[0];
500 ioaddr[1] = CSR0;
501 ioaddr[0] = CSR0_INIT | CSR0_STOP;
502 if (ioaddr[0] != CSR0_STOP) {
503 ioaddr[0] = save1;
504 ioaddr[1] = save2;
505 goto probe_fail;
506 }
507 PROBE_PRINT(( "lance_probe1: testing CSR0 register function (2)\n" ));
508 ioaddr[0] = CSR0_STOP;
509 if (ioaddr[0] != CSR0_STOP) {
510 ioaddr[0] = save1;
511 ioaddr[1] = save2;
512 goto probe_fail;
513 }
514
515 /* Now ok... */
516 PROBE_PRINT(( "lance_probe1: Lance card detected\n" ));
517 goto probe_ok;
518
519 probe_fail:
520 return( 0 );
521
522 probe_ok:
523 lp = netdev_priv(dev);
524 MEM = (struct lance_memory *)memaddr;
525 IO = lp->iobase = (struct lance_ioreg *)ioaddr;
526 dev->base_addr = (unsigned long)ioaddr; /* informational only */
527 lp->memcpy_f = init_rec->slow_flag ? slow_memcpy : memcpy;
528
529 REGA( CSR0 ) = CSR0_STOP;
530
531 /* Now test for type: If the eeprom I/O port is readable, it is a
532 * PAM card */
533 if (addr_accessible( &(IO->eeprom), 0, 0 )) {
534 /* Switch back to Ram */
535 i = IO->mem;
536 lp->cardtype = PAM_CARD;
537 }
538 else if (*RIEBL_MAGIC_ADDR == RIEBL_MAGIC) {
539 lp->cardtype = NEW_RIEBL;
540 }
541 else
542 lp->cardtype = OLD_RIEBL;
543
544 if (lp->cardtype == PAM_CARD ||
545 memaddr == (unsigned short *)0xffe00000) {
546 /* PAMs card and Riebl on ST use level 5 autovector */
547 if (request_irq(IRQ_AUTO_5, lance_interrupt, IRQ_TYPE_PRIO,
548 "PAM/Riebl-ST Ethernet", dev)) {
549 printk( "Lance: request for irq %d failed\n", IRQ_AUTO_5 );
550 return( 0 );
551 }
552 dev->irq = (unsigned short)IRQ_AUTO_5;
553 }
554 else {
555 /* For VME-RieblCards, request a free VME int;
556 * (This must be unsigned long, since dev->irq is short and the
557 * IRQ_MACHSPEC bit would be cut off...)
558 */
559 unsigned long irq = atari_register_vme_int();
560 if (!irq) {
561 printk( "Lance: request for VME interrupt failed\n" );
562 return( 0 );
563 }
564 if (request_irq(irq, lance_interrupt, IRQ_TYPE_PRIO,
565 "Riebl-VME Ethernet", dev)) {
566 printk( "Lance: request for irq %ld failed\n", irq );
567 return( 0 );
568 }
569 dev->irq = irq;
570 }
571
572 printk("%s: %s at io %#lx, mem %#lx, irq %d%s, hwaddr ",
573 dev->name, lance_names[lp->cardtype],
574 (unsigned long)ioaddr,
575 (unsigned long)memaddr,
576 dev->irq,
577 init_rec->slow_flag ? " (slow memcpy)" : "" );
578
579 /* Get the ethernet address */
580 switch( lp->cardtype ) {
581 case OLD_RIEBL:
582 /* No ethernet address! (Set some default address) */
583 memcpy( dev->dev_addr, OldRieblDefHwaddr, 6 );
584 break;
585 case NEW_RIEBL:
586 lp->memcpy_f( dev->dev_addr, RIEBL_HWADDR_ADDR, 6 );
587 break;
588 case PAM_CARD:
589 i = IO->eeprom;
590 for( i = 0; i < 6; ++i )
591 dev->dev_addr[i] =
592 ((((unsigned short *)MEM)[i*2] & 0x0f) << 4) |
593 ((((unsigned short *)MEM)[i*2+1] & 0x0f));
594 i = IO->mem;
595 break;
596 }
597 printk("%pM\n", dev->dev_addr);
598 if (lp->cardtype == OLD_RIEBL) {
599 printk( "%s: Warning: This is a default ethernet address!\n",
600 dev->name );
601 printk( " Use \"ifconfig hw ether ...\" to set the address.\n" );
602 }
603
604 spin_lock_init(&lp->devlock);
605
606 MEM->init.mode = 0x0000; /* Disable Rx and Tx. */
607 for( i = 0; i < 6; i++ )
608 MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
609 MEM->init.filter[0] = 0x00000000;
610 MEM->init.filter[1] = 0x00000000;
611 MEM->init.rx_ring.adr_lo = offsetof( struct lance_memory, rx_head );
612 MEM->init.rx_ring.adr_hi = 0;
613 MEM->init.rx_ring.len = RX_RING_LEN_BITS;
614 MEM->init.tx_ring.adr_lo = offsetof( struct lance_memory, tx_head );
615 MEM->init.tx_ring.adr_hi = 0;
616 MEM->init.tx_ring.len = TX_RING_LEN_BITS;
617
618 if (lp->cardtype == PAM_CARD)
619 IO->ivec = IRQ_SOURCE_TO_VECTOR(dev->irq);
620 else
621 *RIEBL_IVEC_ADDR = IRQ_SOURCE_TO_VECTOR(dev->irq);
622
623 if (did_version++ == 0)
624 DPRINTK( 1, ( version ));
625
626 /* The LANCE-specific entries in the device structure. */
627 dev->open = &lance_open;
628 dev->hard_start_xmit = &lance_start_xmit;
629 dev->stop = &lance_close;
630 dev->set_multicast_list = &set_multicast_list;
631 dev->set_mac_address = &lance_set_mac_address;
632
633 /* XXX MSch */
634 dev->tx_timeout = lance_tx_timeout;
635 dev->watchdog_timeo = TX_TIMEOUT;
636
637 return( 1 );
638 }
639
640
641 static int lance_open( struct net_device *dev )
642 {
643 struct lance_private *lp = netdev_priv(dev);
644 struct lance_ioreg *IO = lp->iobase;
645 int i;
646
647 DPRINTK( 2, ( "%s: lance_open()\n", dev->name ));
648
649 lance_init_ring(dev);
650 /* Re-initialize the LANCE, and start it when done. */
651
652 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
653 REGA( CSR2 ) = 0;
654 REGA( CSR1 ) = 0;
655 REGA( CSR0 ) = CSR0_INIT;
656 /* From now on, AREG is kept to point to CSR0 */
657
658 i = 1000000;
659 while (--i > 0)
660 if (DREG & CSR0_IDON)
661 break;
662 if (i < 0 || (DREG & CSR0_ERR)) {
663 DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n",
664 dev->name, i, DREG ));
665 DREG = CSR0_STOP;
666 return( -EIO );
667 }
668 DREG = CSR0_IDON;
669 DREG = CSR0_STRT;
670 DREG = CSR0_INEA;
671
672 netif_start_queue (dev);
673
674 DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG ));
675
676 return( 0 );
677 }
678
679
680 /* Initialize the LANCE Rx and Tx rings. */
681
682 static void lance_init_ring( struct net_device *dev )
683 {
684 struct lance_private *lp = netdev_priv(dev);
685 int i;
686 unsigned offset;
687
688 lp->tx_full = 0;
689 lp->cur_rx = lp->cur_tx = 0;
690 lp->dirty_tx = 0;
691
692 offset = offsetof( struct lance_memory, packet_area );
693
694 /* If the packet buffer at offset 'o' would conflict with the reserved area
695 * of RieblCards, advance it */
696 #define CHECK_OFFSET(o) \
697 do { \
698 if (lp->cardtype == OLD_RIEBL || lp->cardtype == NEW_RIEBL) { \
699 if (((o) < RIEBL_RSVD_START) ? (o)+PKT_BUF_SZ > RIEBL_RSVD_START \
700 : (o) < RIEBL_RSVD_END) \
701 (o) = RIEBL_RSVD_END; \
702 } \
703 } while(0)
704
705 for( i = 0; i < TX_RING_SIZE; i++ ) {
706 CHECK_OFFSET(offset);
707 MEM->tx_head[i].base = offset;
708 MEM->tx_head[i].flag = TMD1_OWN_HOST;
709 MEM->tx_head[i].base_hi = 0;
710 MEM->tx_head[i].length = 0;
711 MEM->tx_head[i].misc = 0;
712 offset += PKT_BUF_SZ;
713 }
714
715 for( i = 0; i < RX_RING_SIZE; i++ ) {
716 CHECK_OFFSET(offset);
717 MEM->rx_head[i].base = offset;
718 MEM->rx_head[i].flag = TMD1_OWN_CHIP;
719 MEM->rx_head[i].base_hi = 0;
720 MEM->rx_head[i].buf_length = -PKT_BUF_SZ;
721 MEM->rx_head[i].msg_length = 0;
722 offset += PKT_BUF_SZ;
723 }
724 }
725
726
727 /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
728
729
730 static void lance_tx_timeout (struct net_device *dev)
731 {
732 struct lance_private *lp = netdev_priv(dev);
733 struct lance_ioreg *IO = lp->iobase;
734
735 AREG = CSR0;
736 DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n",
737 dev->name, DREG ));
738 DREG = CSR0_STOP;
739 /*
740 * Always set BSWP after a STOP as STOP puts it back into
741 * little endian mode.
742 */
743 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
744 dev->stats.tx_errors++;
745 #ifndef final_version
746 { int i;
747 DPRINTK( 2, ( "Ring data: dirty_tx %d cur_tx %d%s cur_rx %d\n",
748 lp->dirty_tx, lp->cur_tx,
749 lp->tx_full ? " (full)" : "",
750 lp->cur_rx ));
751 for( i = 0 ; i < RX_RING_SIZE; i++ )
752 DPRINTK( 2, ( "rx #%d: base=%04x blen=%04x mlen=%04x\n",
753 i, MEM->rx_head[i].base,
754 -MEM->rx_head[i].buf_length,
755 MEM->rx_head[i].msg_length ));
756 for( i = 0 ; i < TX_RING_SIZE; i++ )
757 DPRINTK( 2, ( "tx #%d: base=%04x len=%04x misc=%04x\n",
758 i, MEM->tx_head[i].base,
759 -MEM->tx_head[i].length,
760 MEM->tx_head[i].misc ));
761 }
762 #endif
763 /* XXX MSch: maybe purge/reinit ring here */
764 /* lance_restart, essentially */
765 lance_init_ring(dev);
766 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;
767 dev->trans_start = jiffies;
768 netif_wake_queue (dev);
769 }
770
771 /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
772
773 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev )
774 {
775 struct lance_private *lp = netdev_priv(dev);
776 struct lance_ioreg *IO = lp->iobase;
777 int entry, len;
778 struct lance_tx_head *head;
779 unsigned long flags;
780
781 DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n",
782 dev->name, DREG ));
783
784
785 /* The old LANCE chips doesn't automatically pad buffers to min. size. */
786 len = skb->len;
787 if (len < ETH_ZLEN)
788 len = ETH_ZLEN;
789 /* PAM-Card has a bug: Can only send packets with even number of bytes! */
790 else if (lp->cardtype == PAM_CARD && (len & 1))
791 ++len;
792
793 if (len > skb->len) {
794 if (skb_padto(skb, len))
795 return 0;
796 }
797
798 netif_stop_queue (dev);
799
800 /* Fill in a Tx ring entry */
801 if (lance_debug >= 3) {
802 printk( "%s: TX pkt type 0x%04x from %pM to %pM"
803 " data at 0x%08x len %d\n",
804 dev->name, ((u_short *)skb->data)[6],
805 &skb->data[6], skb->data,
806 (int)skb->data, (int)skb->len );
807 }
808
809 /* We're not prepared for the int until the last flags are set/reset. And
810 * the int may happen already after setting the OWN_CHIP... */
811 spin_lock_irqsave (&lp->devlock, flags);
812
813 /* Mask to ring buffer boundary. */
814 entry = lp->cur_tx & TX_RING_MOD_MASK;
815 head = &(MEM->tx_head[entry]);
816
817 /* Caution: the write order is important here, set the "ownership" bits
818 * last.
819 */
820
821
822 head->length = -len;
823 head->misc = 0;
824 lp->memcpy_f( PKTBUF_ADDR(head), (void *)skb->data, skb->len );
825 head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP;
826 dev->stats.tx_bytes += skb->len;
827 dev_kfree_skb( skb );
828 lp->cur_tx++;
829 while( lp->cur_tx >= TX_RING_SIZE && lp->dirty_tx >= TX_RING_SIZE ) {
830 lp->cur_tx -= TX_RING_SIZE;
831 lp->dirty_tx -= TX_RING_SIZE;
832 }
833
834 /* Trigger an immediate send poll. */
835 DREG = CSR0_INEA | CSR0_TDMD;
836 dev->trans_start = jiffies;
837
838 if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) ==
839 TMD1_OWN_HOST)
840 netif_start_queue (dev);
841 else
842 lp->tx_full = 1;
843 spin_unlock_irqrestore (&lp->devlock, flags);
844
845 return 0;
846 }
847
848 /* The LANCE interrupt handler. */
849
850 static irqreturn_t lance_interrupt( int irq, void *dev_id )
851 {
852 struct net_device *dev = dev_id;
853 struct lance_private *lp;
854 struct lance_ioreg *IO;
855 int csr0, boguscnt = 10;
856 int handled = 0;
857
858 if (dev == NULL) {
859 DPRINTK( 1, ( "lance_interrupt(): interrupt for unknown device.\n" ));
860 return IRQ_NONE;
861 }
862
863 lp = netdev_priv(dev);
864 IO = lp->iobase;
865 spin_lock (&lp->devlock);
866
867 AREG = CSR0;
868
869 while( ((csr0 = DREG) & (CSR0_ERR | CSR0_TINT | CSR0_RINT)) &&
870 --boguscnt >= 0) {
871 handled = 1;
872 /* Acknowledge all of the current interrupt sources ASAP. */
873 DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP |
874 CSR0_TDMD | CSR0_INEA);
875
876 DPRINTK( 2, ( "%s: interrupt csr0=%04x new csr=%04x.\n",
877 dev->name, csr0, DREG ));
878
879 if (csr0 & CSR0_RINT) /* Rx interrupt */
880 lance_rx( dev );
881
882 if (csr0 & CSR0_TINT) { /* Tx-done interrupt */
883 int dirty_tx = lp->dirty_tx;
884
885 while( dirty_tx < lp->cur_tx) {
886 int entry = dirty_tx & TX_RING_MOD_MASK;
887 int status = MEM->tx_head[entry].flag;
888
889 if (status & TMD1_OWN_CHIP)
890 break; /* It still hasn't been Txed */
891
892 MEM->tx_head[entry].flag = 0;
893
894 if (status & TMD1_ERR) {
895 /* There was an major error, log it. */
896 int err_status = MEM->tx_head[entry].misc;
897 dev->stats.tx_errors++;
898 if (err_status & TMD3_RTRY) dev->stats.tx_aborted_errors++;
899 if (err_status & TMD3_LCAR) dev->stats.tx_carrier_errors++;
900 if (err_status & TMD3_LCOL) dev->stats.tx_window_errors++;
901 if (err_status & TMD3_UFLO) {
902 /* Ackk! On FIFO errors the Tx unit is turned off! */
903 dev->stats.tx_fifo_errors++;
904 /* Remove this verbosity later! */
905 DPRINTK( 1, ( "%s: Tx FIFO error! Status %04x\n",
906 dev->name, csr0 ));
907 /* Restart the chip. */
908 DREG = CSR0_STRT;
909 }
910 } else {
911 if (status & (TMD1_MORE | TMD1_ONE | TMD1_DEF))
912 dev->stats.collisions++;
913 dev->stats.tx_packets++;
914 }
915
916 /* XXX MSch: free skb?? */
917 dirty_tx++;
918 }
919
920 #ifndef final_version
921 if (lp->cur_tx - dirty_tx >= TX_RING_SIZE) {
922 DPRINTK( 0, ( "out-of-sync dirty pointer,"
923 " %d vs. %d, full=%ld.\n",
924 dirty_tx, lp->cur_tx, lp->tx_full ));
925 dirty_tx += TX_RING_SIZE;
926 }
927 #endif
928
929 if (lp->tx_full && (netif_queue_stopped(dev))
930 && dirty_tx > lp->cur_tx - TX_RING_SIZE + 2) {
931 /* The ring is no longer full, clear tbusy. */
932 lp->tx_full = 0;
933 netif_wake_queue (dev);
934 }
935
936 lp->dirty_tx = dirty_tx;
937 }
938
939 /* Log misc errors. */
940 if (csr0 & CSR0_BABL) dev->stats.tx_errors++; /* Tx babble. */
941 if (csr0 & CSR0_MISS) dev->stats.rx_errors++; /* Missed a Rx frame. */
942 if (csr0 & CSR0_MERR) {
943 DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), "
944 "status %04x.\n", dev->name, csr0 ));
945 /* Restart the chip. */
946 DREG = CSR0_STRT;
947 }
948 }
949
950 /* Clear any other interrupt, and set interrupt enable. */
951 DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
952 CSR0_IDON | CSR0_INEA;
953
954 DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n",
955 dev->name, DREG ));
956
957 spin_unlock (&lp->devlock);
958 return IRQ_RETVAL(handled);
959 }
960
961
962 static int lance_rx( struct net_device *dev )
963 {
964 struct lance_private *lp = netdev_priv(dev);
965 int entry = lp->cur_rx & RX_RING_MOD_MASK;
966 int i;
967
968 DPRINTK( 2, ( "%s: rx int, flag=%04x\n", dev->name,
969 MEM->rx_head[entry].flag ));
970
971 /* If we own the next entry, it's a new packet. Send it up. */
972 while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) {
973 struct lance_rx_head *head = &(MEM->rx_head[entry]);
974 int status = head->flag;
975
976 if (status != (RMD1_ENP|RMD1_STP)) { /* There was an error. */
977 /* There is a tricky error noted by John Murphy,
978 <murf@perftech.com> to Russ Nelson: Even with full-sized
979 buffers it's possible for a jabber packet to use two
980 buffers, with only the last correctly noting the error. */
981 if (status & RMD1_ENP) /* Only count a general error at the */
982 dev->stats.rx_errors++; /* end of a packet.*/
983 if (status & RMD1_FRAM) dev->stats.rx_frame_errors++;
984 if (status & RMD1_OFLO) dev->stats.rx_over_errors++;
985 if (status & RMD1_CRC) dev->stats.rx_crc_errors++;
986 if (status & RMD1_BUFF) dev->stats.rx_fifo_errors++;
987 head->flag &= (RMD1_ENP|RMD1_STP);
988 } else {
989 /* Malloc up new buffer, compatible with net-3. */
990 short pkt_len = head->msg_length & 0xfff;
991 struct sk_buff *skb;
992
993 if (pkt_len < 60) {
994 printk( "%s: Runt packet!\n", dev->name );
995 dev->stats.rx_errors++;
996 }
997 else {
998 skb = dev_alloc_skb( pkt_len+2 );
999 if (skb == NULL) {
1000 DPRINTK( 1, ( "%s: Memory squeeze, deferring packet.\n",
1001 dev->name ));
1002 for( i = 0; i < RX_RING_SIZE; i++ )
1003 if (MEM->rx_head[(entry+i) & RX_RING_MOD_MASK].flag &
1004 RMD1_OWN_CHIP)
1005 break;
1006
1007 if (i > RX_RING_SIZE - 2) {
1008 dev->stats.rx_dropped++;
1009 head->flag |= RMD1_OWN_CHIP;
1010 lp->cur_rx++;
1011 }
1012 break;
1013 }
1014
1015 if (lance_debug >= 3) {
1016 u_char *data = PKTBUF_ADDR(head);
1017
1018 printk(KERN_DEBUG "%s: RX pkt type 0x%04x from %pM to %pM "
1019 "data %02x %02x %02x %02x %02x %02x %02x %02x "
1020 "len %d\n",
1021 dev->name, ((u_short *)data)[6],
1022 &data[6], data,
1023 data[15], data[16], data[17], data[18],
1024 data[19], data[20], data[21], data[22],
1025 pkt_len);
1026 }
1027
1028 skb_reserve( skb, 2 ); /* 16 byte align */
1029 skb_put( skb, pkt_len ); /* Make room */
1030 lp->memcpy_f( skb->data, PKTBUF_ADDR(head), pkt_len );
1031 skb->protocol = eth_type_trans( skb, dev );
1032 netif_rx( skb );
1033 dev->stats.rx_packets++;
1034 dev->stats.rx_bytes += pkt_len;
1035 }
1036 }
1037
1038 head->flag |= RMD1_OWN_CHIP;
1039 entry = (++lp->cur_rx) & RX_RING_MOD_MASK;
1040 }
1041 lp->cur_rx &= RX_RING_MOD_MASK;
1042
1043 /* From lance.c (Donald Becker): */
1044 /* We should check that at least two ring entries are free. If not,
1045 we should free one and mark stats->rx_dropped++. */
1046
1047 return 0;
1048 }
1049
1050
1051 static int lance_close( struct net_device *dev )
1052 {
1053 struct lance_private *lp = netdev_priv(dev);
1054 struct lance_ioreg *IO = lp->iobase;
1055
1056 netif_stop_queue (dev);
1057
1058 AREG = CSR0;
1059
1060 DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n",
1061 dev->name, DREG ));
1062
1063 /* We stop the LANCE here -- it occasionally polls
1064 memory if we don't. */
1065 DREG = CSR0_STOP;
1066
1067 return 0;
1068 }
1069
1070
1071 /* Set or clear the multicast filter for this adaptor.
1072 num_addrs == -1 Promiscuous mode, receive all packets
1073 num_addrs == 0 Normal mode, clear multicast list
1074 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1075 best-effort filtering.
1076 */
1077
1078 static void set_multicast_list( struct net_device *dev )
1079 {
1080 struct lance_private *lp = netdev_priv(dev);
1081 struct lance_ioreg *IO = lp->iobase;
1082
1083 if (netif_running(dev))
1084 /* Only possible if board is already started */
1085 return;
1086
1087 /* We take the simple way out and always enable promiscuous mode. */
1088 DREG = CSR0_STOP; /* Temporarily stop the lance. */
1089
1090 if (dev->flags & IFF_PROMISC) {
1091 /* Log any net taps. */
1092 DPRINTK( 2, ( "%s: Promiscuous mode enabled.\n", dev->name ));
1093 REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */
1094 } else {
1095 short multicast_table[4];
1096 int num_addrs = dev->mc_count;
1097 int i;
1098 /* We don't use the multicast table, but rely on upper-layer
1099 * filtering. */
1100 memset( multicast_table, (num_addrs == 0) ? 0 : -1,
1101 sizeof(multicast_table) );
1102 for( i = 0; i < 4; i++ )
1103 REGA( CSR8+i ) = multicast_table[i];
1104 REGA( CSR15 ) = 0; /* Unset promiscuous mode */
1105 }
1106
1107 /*
1108 * Always set BSWP after a STOP as STOP puts it back into
1109 * little endian mode.
1110 */
1111 REGA( CSR3 ) = CSR3_BSWP | (lp->cardtype == PAM_CARD ? CSR3_ACON : 0);
1112
1113 /* Resume normal operation and reset AREG to CSR0 */
1114 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT;
1115 }
1116
1117
1118 /* This is needed for old RieblCards and possible for new RieblCards */
1119
1120 static int lance_set_mac_address( struct net_device *dev, void *addr )
1121 {
1122 struct lance_private *lp = netdev_priv(dev);
1123 struct sockaddr *saddr = addr;
1124 int i;
1125
1126 if (lp->cardtype != OLD_RIEBL && lp->cardtype != NEW_RIEBL)
1127 return( -EOPNOTSUPP );
1128
1129 if (netif_running(dev)) {
1130 /* Only possible while card isn't started */
1131 DPRINTK( 1, ( "%s: hwaddr can be set only while card isn't open.\n",
1132 dev->name ));
1133 return( -EIO );
1134 }
1135
1136 memcpy( dev->dev_addr, saddr->sa_data, dev->addr_len );
1137 for( i = 0; i < 6; i++ )
1138 MEM->init.hwaddr[i] = dev->dev_addr[i^1]; /* <- 16 bit swap! */
1139 lp->memcpy_f( RIEBL_HWADDR_ADDR, dev->dev_addr, 6 );
1140 /* set also the magic for future sessions */
1141 *RIEBL_MAGIC_ADDR = RIEBL_MAGIC;
1142
1143 return( 0 );
1144 }
1145
1146
1147 #ifdef MODULE
1148 static struct net_device *atarilance_dev;
1149
1150 static int __init atarilance_module_init(void)
1151 {
1152 atarilance_dev = atarilance_probe(-1);
1153 if (IS_ERR(atarilance_dev))
1154 return PTR_ERR(atarilance_dev);
1155 return 0;
1156 }
1157
1158 static void __exit atarilance_module_exit(void)
1159 {
1160 unregister_netdev(atarilance_dev);
1161 free_irq(atarilance_dev->irq, atarilance_dev);
1162 free_netdev(atarilance_dev);
1163 }
1164 module_init(atarilance_module_init);
1165 module_exit(atarilance_module_exit);
1166 #endif /* MODULE */
1167
1168
1169 /*
1170 * Local variables:
1171 * c-indent-level: 4
1172 * tab-width: 4
1173 * End:
1174 */
Linux with added FPC-III support