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[PATCH] g_file_storage: fix obscure race condition
[linux/fpc-iii.git] / drivers / isdn / hisax / isar.c
blob642a87c51295c70055509678fa71a370a766f9f2
1 /* $Id: isar.c,v 1.22.2.6 2004/02/11 13:21:34 keil Exp $
2 *
3 * isar.c ISAR (Siemens PSB 7110) specific routines
4 *
5 * Author Karsten Keil (keil@isdn4linux.de)
6 *
7 * This file is (c) under GNU General Public License
8 *
9 */
10
11 #include <linux/init.h>
12 #include "hisax.h"
13 #include "isar.h"
14 #include "isdnl1.h"
15 #include <linux/interrupt.h>
16
17 #define DBG_LOADFIRM 0
18 #define DUMP_MBOXFRAME 2
19
20 #define DLE 0x10
21 #define ETX 0x03
22
23 #define FAXMODCNT 13
24 static const u_char faxmodulation[] = {3,24,48,72,73,74,96,97,98,121,122,145,146};
25 static u_int modmask = 0x1fff;
26 static int frm_extra_delay = 2;
27 static int para_TOA = 6;
28 static const u_char *FC1_CMD[] = {"FAE", "FTS", "FRS", "FTM", "FRM", "FTH", "FRH", "CTRL" };
29
30 static void isar_setup(struct IsdnCardState *cs);
31 static void isar_pump_cmd(struct BCState *bcs, u_char cmd, u_char para);
32 static void ll_deliver_faxstat(struct BCState *bcs, u_char status);
33
34 static inline int
35 waitforHIA(struct IsdnCardState *cs, int timeout)
36 {
37
38 while ((cs->BC_Read_Reg(cs, 0, ISAR_HIA) & 1) && timeout) {
39 udelay(1);
40 timeout--;
41 }
42 if (!timeout)
43 printk(KERN_WARNING "HiSax: ISAR waitforHIA timeout\n");
44 return(timeout);
45 }
46
47
48 static int
49 sendmsg(struct IsdnCardState *cs, u_char his, u_char creg, u_char len,
50 u_char *msg)
51 {
52 int i;
53
54 if (!waitforHIA(cs, 4000))
55 return(0);
56 #if DUMP_MBOXFRAME
57 if (cs->debug & L1_DEB_HSCX)
58 debugl1(cs, "sendmsg(%02x,%02x,%d)", his, creg, len);
59 #endif
60 cs->BC_Write_Reg(cs, 0, ISAR_CTRL_H, creg);
61 cs->BC_Write_Reg(cs, 0, ISAR_CTRL_L, len);
62 cs->BC_Write_Reg(cs, 0, ISAR_WADR, 0);
63 if (msg && len) {
64 cs->BC_Write_Reg(cs, 1, ISAR_MBOX, msg[0]);
65 for (i=1; i<len; i++)
66 cs->BC_Write_Reg(cs, 2, ISAR_MBOX, msg[i]);
67 #if DUMP_MBOXFRAME>1
68 if (cs->debug & L1_DEB_HSCX_FIFO) {
69 char tmp[256], *t;
70
71 i = len;
72 while (i>0) {
73 t = tmp;
74 t += sprintf(t, "sendmbox cnt %d", len);
75 QuickHex(t, &msg[len-i], (i>64) ? 64:i);
76 debugl1(cs, tmp);
77 i -= 64;
78 }
79 }
80 #endif
81 }
82 cs->BC_Write_Reg(cs, 1, ISAR_HIS, his);
83 waitforHIA(cs, 10000);
84 return(1);
85 }
86
87 /* Call only with IRQ disabled !!! */
88 static inline void
89 rcv_mbox(struct IsdnCardState *cs, struct isar_reg *ireg, u_char *msg)
90 {
91 int i;
92
93 cs->BC_Write_Reg(cs, 1, ISAR_RADR, 0);
94 if (msg && ireg->clsb) {
95 msg[0] = cs->BC_Read_Reg(cs, 1, ISAR_MBOX);
96 for (i=1; i < ireg->clsb; i++)
97 msg[i] = cs->BC_Read_Reg(cs, 2, ISAR_MBOX);
98 #if DUMP_MBOXFRAME>1
99 if (cs->debug & L1_DEB_HSCX_FIFO) {
100 char tmp[256], *t;
101
102 i = ireg->clsb;
103 while (i>0) {
104 t = tmp;
105 t += sprintf(t, "rcv_mbox cnt %d", ireg->clsb);
106 QuickHex(t, &msg[ireg->clsb-i], (i>64) ? 64:i);
107 debugl1(cs, tmp);
108 i -= 64;
109 }
110 }
111 #endif
112 }
113 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
114 }
115
116 /* Call only with IRQ disabled !!! */
117 static inline void
118 get_irq_infos(struct IsdnCardState *cs, struct isar_reg *ireg)
119 {
120 ireg->iis = cs->BC_Read_Reg(cs, 1, ISAR_IIS);
121 ireg->cmsb = cs->BC_Read_Reg(cs, 1, ISAR_CTRL_H);
122 ireg->clsb = cs->BC_Read_Reg(cs, 1, ISAR_CTRL_L);
123 #if DUMP_MBOXFRAME
124 if (cs->debug & L1_DEB_HSCX)
125 debugl1(cs, "irq_stat(%02x,%02x,%d)", ireg->iis, ireg->cmsb,
126 ireg->clsb);
127 #endif
128 }
129
130 static int
131 waitrecmsg(struct IsdnCardState *cs, u_char *len,
132 u_char *msg, int maxdelay)
133 {
134 int timeout = 0;
135 struct isar_reg *ir = cs->bcs[0].hw.isar.reg;
136
137
138 while((!(cs->BC_Read_Reg(cs, 0, ISAR_IRQBIT) & ISAR_IRQSTA)) &&
139 (timeout++ < maxdelay))
140 udelay(1);
141 if (timeout >= maxdelay) {
142 printk(KERN_WARNING"isar recmsg IRQSTA timeout\n");
143 return(0);
144 }
145 get_irq_infos(cs, ir);
146 rcv_mbox(cs, ir, msg);
147 *len = ir->clsb;
148 return(1);
149 }
150
151 int
152 ISARVersion(struct IsdnCardState *cs, char *s)
153 {
154 int ver;
155 u_char msg[] = ISAR_MSG_HWVER;
156 u_char tmp[64];
157 u_char len;
158 u_long flags;
159 int debug;
160
161 cs->cardmsg(cs, CARD_RESET, NULL);
162 spin_lock_irqsave(&cs->lock, flags);
163 /* disable ISAR IRQ */
164 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, 0);
165 debug = cs->debug;
166 cs->debug &= ~(L1_DEB_HSCX | L1_DEB_HSCX_FIFO);
167 if (!sendmsg(cs, ISAR_HIS_VNR, 0, 3, msg)) {
168 spin_unlock_irqrestore(&cs->lock, flags);
169 return(-1);
170 }
171 if (!waitrecmsg(cs, &len, tmp, 100000)) {
172 spin_unlock_irqrestore(&cs->lock, flags);
173 return(-2);
174 }
175 cs->debug = debug;
176 if (cs->bcs[0].hw.isar.reg->iis == ISAR_IIS_VNR) {
177 if (len == 1) {
178 ver = tmp[0] & 0xf;
179 printk(KERN_INFO "%s ISAR version %d\n", s, ver);
180 } else
181 ver = -3;
182 } else
183 ver = -4;
184 spin_unlock_irqrestore(&cs->lock, flags);
185 return(ver);
186 }
187
188 static int
189 isar_load_firmware(struct IsdnCardState *cs, u_char __user *buf)
190 {
191 int ret, size, cnt, debug;
192 u_char len, nom, noc;
193 u_short sadr, left, *sp;
194 u_char __user *p = buf;
195 u_char *msg, *tmpmsg, *mp, tmp[64];
196 u_long flags;
197 struct isar_reg *ireg = cs->bcs[0].hw.isar.reg;
198
199 struct {u_short sadr;
200 u_short len;
201 u_short d_key;
202 } blk_head;
203
204 #define BLK_HEAD_SIZE 6
205 if (1 != (ret = ISARVersion(cs, "Testing"))) {
206 printk(KERN_ERR"isar_load_firmware wrong isar version %d\n", ret);
207 return(1);
208 }
209 debug = cs->debug;
210 #if DBG_LOADFIRM<2
211 cs->debug &= ~(L1_DEB_HSCX | L1_DEB_HSCX_FIFO);
212 #endif
213
214 if ((ret = copy_from_user(&size, p, sizeof(int)))) {
215 printk(KERN_ERR"isar_load_firmware copy_from_user ret %d\n", ret);
216 return ret;
217 }
218 p += sizeof(int);
219 printk(KERN_DEBUG"isar_load_firmware size: %d\n", size);
220 cnt = 0;
221 /* disable ISAR IRQ */
222 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, 0);
223 if (!(msg = kmalloc(256, GFP_KERNEL))) {
224 printk(KERN_ERR"isar_load_firmware no buffer\n");
225 return (1);
226 }
227 if (!(tmpmsg = kmalloc(256, GFP_KERNEL))) {
228 printk(KERN_ERR"isar_load_firmware no tmp buffer\n");
229 kfree(msg);
230 return (1);
231 }
232 spin_lock_irqsave(&cs->lock, flags);
233 /* disable ISAR IRQ */
234 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, 0);
235 spin_unlock_irqrestore(&cs->lock, flags);
236 while (cnt < size) {
237 if ((ret = copy_from_user(&blk_head, p, BLK_HEAD_SIZE))) {
238 printk(KERN_ERR"isar_load_firmware copy_from_user ret %d\n", ret);
239 goto reterror;
240 }
241 #ifdef __BIG_ENDIAN
242 sadr = (blk_head.sadr & 0xff)*256 + blk_head.sadr/256;
243 blk_head.sadr = sadr;
244 sadr = (blk_head.len & 0xff)*256 + blk_head.len/256;
245 blk_head.len = sadr;
246 sadr = (blk_head.d_key & 0xff)*256 + blk_head.d_key/256;
247 blk_head.d_key = sadr;
248 #endif /* __BIG_ENDIAN */
249 cnt += BLK_HEAD_SIZE;
250 p += BLK_HEAD_SIZE;
251 printk(KERN_DEBUG"isar firmware block (%#x,%5d,%#x)\n",
252 blk_head.sadr, blk_head.len, blk_head.d_key & 0xff);
253 sadr = blk_head.sadr;
254 left = blk_head.len;
255 spin_lock_irqsave(&cs->lock, flags);
256 if (!sendmsg(cs, ISAR_HIS_DKEY, blk_head.d_key & 0xff, 0, NULL)) {
257 printk(KERN_ERR"isar sendmsg dkey failed\n");
258 ret = 1;goto reterr_unlock;
259 }
260 if (!waitrecmsg(cs, &len, tmp, 100000)) {
261 printk(KERN_ERR"isar waitrecmsg dkey failed\n");
262 ret = 1;goto reterr_unlock;
263 }
264 if ((ireg->iis != ISAR_IIS_DKEY) || ireg->cmsb || len) {
265 printk(KERN_ERR"isar wrong dkey response (%x,%x,%x)\n",
266 ireg->iis, ireg->cmsb, len);
267 ret = 1;goto reterr_unlock;
268 }
269 spin_unlock_irqrestore(&cs->lock, flags);
270 while (left>0) {
271 if (left > 126)
272 noc = 126;
273 else
274 noc = left;
275 nom = 2*noc;
276 mp = msg;
277 *mp++ = sadr / 256;
278 *mp++ = sadr % 256;
279 left -= noc;
280 *mp++ = noc;
281 if ((ret = copy_from_user(tmpmsg, p, nom))) {
282 printk(KERN_ERR"isar_load_firmware copy_from_user ret %d\n", ret);
283 goto reterror;
284 }
285 p += nom;
286 cnt += nom;
287 nom += 3;
288 sp = (u_short *)tmpmsg;
289 #if DBG_LOADFIRM
290 printk(KERN_DEBUG"isar: load %3d words at %04x left %d\n",
291 noc, sadr, left);
292 #endif
293 sadr += noc;
294 while(noc) {
295 #ifdef __BIG_ENDIAN
296 *mp++ = *sp % 256;
297 *mp++ = *sp / 256;
298 #else
299 *mp++ = *sp / 256;
300 *mp++ = *sp % 256;
301 #endif /* __BIG_ENDIAN */
302 sp++;
303 noc--;
304 }
305 spin_lock_irqsave(&cs->lock, flags);
306 if (!sendmsg(cs, ISAR_HIS_FIRM, 0, nom, msg)) {
307 printk(KERN_ERR"isar sendmsg prog failed\n");
308 ret = 1;goto reterr_unlock;
309 }
310 if (!waitrecmsg(cs, &len, tmp, 100000)) {
311 printk(KERN_ERR"isar waitrecmsg prog failed\n");
312 ret = 1;goto reterr_unlock;
313 }
314 if ((ireg->iis != ISAR_IIS_FIRM) || ireg->cmsb || len) {
315 printk(KERN_ERR"isar wrong prog response (%x,%x,%x)\n",
316 ireg->iis, ireg->cmsb, len);
317 ret = 1;goto reterr_unlock;
318 }
319 spin_unlock_irqrestore(&cs->lock, flags);
320 }
321 printk(KERN_DEBUG"isar firmware block %5d words loaded\n",
322 blk_head.len);
323 }
324 /* 10ms delay */
325 cnt = 10;
326 while (cnt--)
327 udelay(1000);
328 msg[0] = 0xff;
329 msg[1] = 0xfe;
330 ireg->bstat = 0;
331 spin_lock_irqsave(&cs->lock, flags);
332 if (!sendmsg(cs, ISAR_HIS_STDSP, 0, 2, msg)) {
333 printk(KERN_ERR"isar sendmsg start dsp failed\n");
334 ret = 1;goto reterr_unlock;
335 }
336 if (!waitrecmsg(cs, &len, tmp, 100000)) {
337 printk(KERN_ERR"isar waitrecmsg start dsp failed\n");
338 ret = 1;goto reterr_unlock;
339 }
340 if ((ireg->iis != ISAR_IIS_STDSP) || ireg->cmsb || len) {
341 printk(KERN_ERR"isar wrong start dsp response (%x,%x,%x)\n",
342 ireg->iis, ireg->cmsb, len);
343 ret = 1;goto reterr_unlock;
344 } else
345 printk(KERN_DEBUG"isar start dsp success\n");
346 /* NORMAL mode entered */
347 /* Enable IRQs of ISAR */
348 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, ISAR_IRQSTA);
349 spin_unlock_irqrestore(&cs->lock, flags);
350 cnt = 1000; /* max 1s */
351 while ((!ireg->bstat) && cnt) {
352 udelay(1000);
353 cnt--;
354 }
355 if (!cnt) {
356 printk(KERN_ERR"isar no general status event received\n");
357 ret = 1;goto reterror;
358 } else {
359 printk(KERN_DEBUG"isar general status event %x\n",
360 ireg->bstat);
361 }
362 /* 10ms delay */
363 cnt = 10;
364 while (cnt--)
365 udelay(1000);
366 spin_lock_irqsave(&cs->lock, flags);
367 ireg->iis = 0;
368 if (!sendmsg(cs, ISAR_HIS_DIAG, ISAR_CTRL_STST, 0, NULL)) {
369 printk(KERN_ERR"isar sendmsg self tst failed\n");
370 ret = 1;goto reterr_unlock;
371 }
372 cnt = 10000; /* max 100 ms */
373 spin_unlock_irqrestore(&cs->lock, flags);
374 while ((ireg->iis != ISAR_IIS_DIAG) && cnt) {
375 udelay(10);
376 cnt--;
377 }
378 udelay(1000);
379 if (!cnt) {
380 printk(KERN_ERR"isar no self tst response\n");
381 ret = 1;goto reterror;
382 }
383 if ((ireg->cmsb == ISAR_CTRL_STST) && (ireg->clsb == 1)
384 && (ireg->par[0] == 0)) {
385 printk(KERN_DEBUG"isar selftest OK\n");
386 } else {
387 printk(KERN_DEBUG"isar selftest not OK %x/%x/%x\n",
388 ireg->cmsb, ireg->clsb, ireg->par[0]);
389 ret = 1;goto reterror;
390 }
391 spin_lock_irqsave(&cs->lock, flags);
392 ireg->iis = 0;
393 if (!sendmsg(cs, ISAR_HIS_DIAG, ISAR_CTRL_SWVER, 0, NULL)) {
394 printk(KERN_ERR"isar RQST SVN failed\n");
395 ret = 1;goto reterr_unlock;
396 }
397 spin_unlock_irqrestore(&cs->lock, flags);
398 cnt = 30000; /* max 300 ms */
399 while ((ireg->iis != ISAR_IIS_DIAG) && cnt) {
400 udelay(10);
401 cnt--;
402 }
403 udelay(1000);
404 if (!cnt) {
405 printk(KERN_ERR"isar no SVN response\n");
406 ret = 1;goto reterror;
407 } else {
408 if ((ireg->cmsb == ISAR_CTRL_SWVER) && (ireg->clsb == 1))
409 printk(KERN_DEBUG"isar software version %#x\n",
410 ireg->par[0]);
411 else {
412 printk(KERN_ERR"isar wrong swver response (%x,%x) cnt(%d)\n",
413 ireg->cmsb, ireg->clsb, cnt);
414 ret = 1;goto reterror;
415 }
416 }
417 spin_lock_irqsave(&cs->lock, flags);
418 cs->debug = debug;
419 isar_setup(cs);
420
421 ret = 0;
422 reterr_unlock:
423 spin_unlock_irqrestore(&cs->lock, flags);
424 reterror:
425 cs->debug = debug;
426 if (ret)
427 /* disable ISAR IRQ */
428 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, 0);
429 kfree(msg);
430 kfree(tmpmsg);
431 return(ret);
432 }
433
434 extern void BChannel_bh(struct BCState *);
435 #define B_LL_NOCARRIER 8
436 #define B_LL_CONNECT 9
437 #define B_LL_OK 10
438
439 static void
440 isar_bh(struct BCState *bcs)
441 {
442 BChannel_bh(bcs);
443 if (test_and_clear_bit(B_LL_NOCARRIER, &bcs->event))
444 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_NOCARR);
445 if (test_and_clear_bit(B_LL_CONNECT, &bcs->event))
446 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
447 if (test_and_clear_bit(B_LL_OK, &bcs->event))
448 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_OK);
449 }
450
451 static void
452 send_DLE_ETX(struct BCState *bcs)
453 {
454 u_char dleetx[2] = {DLE,ETX};
455 struct sk_buff *skb;
456
457 if ((skb = dev_alloc_skb(2))) {
458 memcpy(skb_put(skb, 2), dleetx, 2);
459 skb_queue_tail(&bcs->rqueue, skb);
460 schedule_event(bcs, B_RCVBUFREADY);
461 } else {
462 printk(KERN_WARNING "HiSax: skb out of memory\n");
463 }
464 }
465
466 static inline int
467 dle_count(unsigned char *buf, int len)
468 {
469 int count = 0;
470
471 while (len--)
472 if (*buf++ == DLE)
473 count++;
474 return count;
475 }
476
477 static inline void
478 insert_dle(unsigned char *dest, unsigned char *src, int count) {
479 /* <DLE> in input stream have to be flagged as <DLE><DLE> */
480 while (count--) {
481 *dest++ = *src;
482 if (*src++ == DLE)
483 *dest++ = DLE;
484 }
485 }
486
487 static void
488 isar_rcv_frame(struct IsdnCardState *cs, struct BCState *bcs)
489 {
490 u_char *ptr;
491 struct sk_buff *skb;
492 struct isar_reg *ireg = bcs->hw.isar.reg;
493
494 if (!ireg->clsb) {
495 debugl1(cs, "isar zero len frame");
496 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
497 return;
498 }
499 switch (bcs->mode) {
500 case L1_MODE_NULL:
501 debugl1(cs, "isar mode 0 spurious IIS_RDATA %x/%x/%x",
502 ireg->iis, ireg->cmsb, ireg->clsb);
503 printk(KERN_WARNING"isar mode 0 spurious IIS_RDATA %x/%x/%x\n",
504 ireg->iis, ireg->cmsb, ireg->clsb);
505 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
506 break;
507 case L1_MODE_TRANS:
508 case L1_MODE_V32:
509 if ((skb = dev_alloc_skb(ireg->clsb))) {
510 rcv_mbox(cs, ireg, (u_char *)skb_put(skb, ireg->clsb));
511 skb_queue_tail(&bcs->rqueue, skb);
512 schedule_event(bcs, B_RCVBUFREADY);
513 } else {
514 printk(KERN_WARNING "HiSax: skb out of memory\n");
515 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
516 }
517 break;
518 case L1_MODE_HDLC:
519 if ((bcs->hw.isar.rcvidx + ireg->clsb) > HSCX_BUFMAX) {
520 if (cs->debug & L1_DEB_WARN)
521 debugl1(cs, "isar_rcv_frame: incoming packet too large");
522 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
523 bcs->hw.isar.rcvidx = 0;
524 } else if (ireg->cmsb & HDLC_ERROR) {
525 if (cs->debug & L1_DEB_WARN)
526 debugl1(cs, "isar frame error %x len %d",
527 ireg->cmsb, ireg->clsb);
528 #ifdef ERROR_STATISTIC
529 if (ireg->cmsb & HDLC_ERR_RER)
530 bcs->err_inv++;
531 if (ireg->cmsb & HDLC_ERR_CER)
532 bcs->err_crc++;
533 #endif
534 bcs->hw.isar.rcvidx = 0;
535 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
536 } else {
537 if (ireg->cmsb & HDLC_FSD)
538 bcs->hw.isar.rcvidx = 0;
539 ptr = bcs->hw.isar.rcvbuf + bcs->hw.isar.rcvidx;
540 bcs->hw.isar.rcvidx += ireg->clsb;
541 rcv_mbox(cs, ireg, ptr);
542 if (ireg->cmsb & HDLC_FED) {
543 if (bcs->hw.isar.rcvidx < 3) { /* last 2 bytes are the FCS */
544 if (cs->debug & L1_DEB_WARN)
545 debugl1(cs, "isar frame to short %d",
546 bcs->hw.isar.rcvidx);
547 } else if (!(skb = dev_alloc_skb(bcs->hw.isar.rcvidx-2))) {
548 printk(KERN_WARNING "ISAR: receive out of memory\n");
549 } else {
550 memcpy(skb_put(skb, bcs->hw.isar.rcvidx-2),
551 bcs->hw.isar.rcvbuf, bcs->hw.isar.rcvidx-2);
552 skb_queue_tail(&bcs->rqueue, skb);
553 schedule_event(bcs, B_RCVBUFREADY);
554 }
555 bcs->hw.isar.rcvidx = 0;
556 }
557 }
558 break;
559 case L1_MODE_FAX:
560 if (bcs->hw.isar.state != STFAX_ACTIV) {
561 if (cs->debug & L1_DEB_WARN)
562 debugl1(cs, "isar_rcv_frame: not ACTIV");
563 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
564 bcs->hw.isar.rcvidx = 0;
565 break;
566 }
567 if (bcs->hw.isar.cmd == PCTRL_CMD_FRM) {
568 rcv_mbox(cs, ireg, bcs->hw.isar.rcvbuf);
569 bcs->hw.isar.rcvidx = ireg->clsb +
570 dle_count(bcs->hw.isar.rcvbuf, ireg->clsb);
571 if (cs->debug & L1_DEB_HSCX)
572 debugl1(cs, "isar_rcv_frame: raw(%d) dle(%d)",
573 ireg->clsb, bcs->hw.isar.rcvidx);
574 if ((skb = dev_alloc_skb(bcs->hw.isar.rcvidx))) {
575 insert_dle((u_char *)skb_put(skb, bcs->hw.isar.rcvidx),
576 bcs->hw.isar.rcvbuf, ireg->clsb);
577 skb_queue_tail(&bcs->rqueue, skb);
578 schedule_event(bcs, B_RCVBUFREADY);
579 if (ireg->cmsb & SART_NMD) { /* ABORT */
580 if (cs->debug & L1_DEB_WARN)
581 debugl1(cs, "isar_rcv_frame: no more data");
582 bcs->hw.isar.rcvidx = 0;
583 send_DLE_ETX(bcs);
584 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) |
585 ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC,
586 0, NULL);
587 bcs->hw.isar.state = STFAX_ESCAPE;
588 schedule_event(bcs, B_LL_NOCARRIER);
589 }
590 } else {
591 printk(KERN_WARNING "HiSax: skb out of memory\n");
592 }
593 break;
594 }
595 if (bcs->hw.isar.cmd != PCTRL_CMD_FRH) {
596 if (cs->debug & L1_DEB_WARN)
597 debugl1(cs, "isar_rcv_frame: unknown fax mode %x",
598 bcs->hw.isar.cmd);
599 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
600 bcs->hw.isar.rcvidx = 0;
601 break;
602 }
603 /* PCTRL_CMD_FRH */
604 if ((bcs->hw.isar.rcvidx + ireg->clsb) > HSCX_BUFMAX) {
605 if (cs->debug & L1_DEB_WARN)
606 debugl1(cs, "isar_rcv_frame: incoming packet too large");
607 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
608 bcs->hw.isar.rcvidx = 0;
609 } else if (ireg->cmsb & HDLC_ERROR) {
610 if (cs->debug & L1_DEB_WARN)
611 debugl1(cs, "isar frame error %x len %d",
612 ireg->cmsb, ireg->clsb);
613 bcs->hw.isar.rcvidx = 0;
614 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
615 } else {
616 if (ireg->cmsb & HDLC_FSD) {
617 bcs->hw.isar.rcvidx = 0;
618 }
619 ptr = bcs->hw.isar.rcvbuf + bcs->hw.isar.rcvidx;
620 bcs->hw.isar.rcvidx += ireg->clsb;
621 rcv_mbox(cs, ireg, ptr);
622 if (ireg->cmsb & HDLC_FED) {
623 int len = bcs->hw.isar.rcvidx +
624 dle_count(bcs->hw.isar.rcvbuf, bcs->hw.isar.rcvidx);
625 if (bcs->hw.isar.rcvidx < 3) { /* last 2 bytes are the FCS */
626 if (cs->debug & L1_DEB_WARN)
627 debugl1(cs, "isar frame to short %d",
628 bcs->hw.isar.rcvidx);
629 printk(KERN_WARNING "ISAR: frame to short %d\n",
630 bcs->hw.isar.rcvidx);
631 } else if (!(skb = dev_alloc_skb(len))) {
632 printk(KERN_WARNING "ISAR: receive out of memory\n");
633 } else {
634 insert_dle((u_char *)skb_put(skb, len),
635 bcs->hw.isar.rcvbuf,
636 bcs->hw.isar.rcvidx);
637 skb_queue_tail(&bcs->rqueue, skb);
638 schedule_event(bcs, B_RCVBUFREADY);
639 send_DLE_ETX(bcs);
640 schedule_event(bcs, B_LL_OK);
641 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag);
642 }
643 bcs->hw.isar.rcvidx = 0;
644 }
645 }
646 if (ireg->cmsb & SART_NMD) { /* ABORT */
647 if (cs->debug & L1_DEB_WARN)
648 debugl1(cs, "isar_rcv_frame: no more data");
649 bcs->hw.isar.rcvidx = 0;
650 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) |
651 ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 0, NULL);
652 bcs->hw.isar.state = STFAX_ESCAPE;
653 if (test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag)) {
654 send_DLE_ETX(bcs);
655 schedule_event(bcs, B_LL_NOCARRIER);
656 }
657 }
658 break;
659 default:
660 printk(KERN_ERR"isar_rcv_frame mode (%x)error\n", bcs->mode);
661 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
662 break;
663 }
664 }
665
666 void
667 isar_fill_fifo(struct BCState *bcs)
668 {
669 struct IsdnCardState *cs = bcs->cs;
670 int count;
671 u_char msb;
672 u_char *ptr;
673
674 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
675 debugl1(cs, "isar_fill_fifo");
676 if (!bcs->tx_skb)
677 return;
678 if (bcs->tx_skb->len <= 0)
679 return;
680 if (!(bcs->hw.isar.reg->bstat &
681 (bcs->hw.isar.dpath == 1 ? BSTAT_RDM1 : BSTAT_RDM2)))
682 return;
683 if (bcs->tx_skb->len > bcs->hw.isar.mml) {
684 msb = 0;
685 count = bcs->hw.isar.mml;
686 } else {
687 count = bcs->tx_skb->len;
688 msb = HDLC_FED;
689 }
690 ptr = bcs->tx_skb->data;
691 if (!bcs->hw.isar.txcnt) {
692 msb |= HDLC_FST;
693 if ((bcs->mode == L1_MODE_FAX) &&
694 (bcs->hw.isar.cmd == PCTRL_CMD_FTH)) {
695 if (bcs->tx_skb->len > 1) {
696 if ((ptr[0]== 0xff) && (ptr[1] == 0x13))
697 /* last frame */
698 test_and_set_bit(BC_FLG_LASTDATA,
699 &bcs->Flag);
700 }
701 }
702 }
703 skb_pull(bcs->tx_skb, count);
704 bcs->tx_cnt -= count;
705 bcs->hw.isar.txcnt += count;
706 switch (bcs->mode) {
707 case L1_MODE_NULL:
708 printk(KERN_ERR"isar_fill_fifo wrong mode 0\n");
709 break;
710 case L1_MODE_TRANS:
711 case L1_MODE_V32:
712 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA,
713 0, count, ptr);
714 break;
715 case L1_MODE_HDLC:
716 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA,
717 msb, count, ptr);
718 break;
719 case L1_MODE_FAX:
720 if (bcs->hw.isar.state != STFAX_ACTIV) {
721 if (cs->debug & L1_DEB_WARN)
722 debugl1(cs, "isar_fill_fifo: not ACTIV");
723 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FTH) {
724 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA,
725 msb, count, ptr);
726 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FTM) {
727 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA,
728 0, count, ptr);
729 } else {
730 if (cs->debug & L1_DEB_WARN)
731 debugl1(cs, "isar_fill_fifo: not FTH/FTM");
732 }
733 break;
734 default:
735 if (cs->debug)
736 debugl1(cs, "isar_fill_fifo mode(%x) error", bcs->mode);
737 printk(KERN_ERR"isar_fill_fifo mode(%x) error\n", bcs->mode);
738 break;
739 }
740 }
741
742 static inline
743 struct BCState *sel_bcs_isar(struct IsdnCardState *cs, u_char dpath)
744 {
745 if ((!dpath) || (dpath == 3))
746 return(NULL);
747 if (cs->bcs[0].hw.isar.dpath == dpath)
748 return(&cs->bcs[0]);
749 if (cs->bcs[1].hw.isar.dpath == dpath)
750 return(&cs->bcs[1]);
751 return(NULL);
752 }
753
754 static void
755 send_frames(struct BCState *bcs)
756 {
757 if (bcs->tx_skb) {
758 if (bcs->tx_skb->len) {
759 isar_fill_fifo(bcs);
760 return;
761 } else {
762 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) &&
763 (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
764 u_long flags;
765 spin_lock_irqsave(&bcs->aclock, flags);
766 bcs->ackcnt += bcs->hw.isar.txcnt;
767 spin_unlock_irqrestore(&bcs->aclock, flags);
768 schedule_event(bcs, B_ACKPENDING);
769 }
770 if (bcs->mode == L1_MODE_FAX) {
771 if (bcs->hw.isar.cmd == PCTRL_CMD_FTH) {
772 if (test_bit(BC_FLG_LASTDATA, &bcs->Flag)) {
773 test_and_set_bit(BC_FLG_NMD_DATA, &bcs->Flag);
774 }
775 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FTM) {
776 if (test_bit(BC_FLG_DLEETX, &bcs->Flag)) {
777 test_and_set_bit(BC_FLG_LASTDATA, &bcs->Flag);
778 test_and_set_bit(BC_FLG_NMD_DATA, &bcs->Flag);
779 }
780 }
781 }
782 dev_kfree_skb_any(bcs->tx_skb);
783 bcs->hw.isar.txcnt = 0;
784 bcs->tx_skb = NULL;
785 }
786 }
787 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
788 bcs->hw.isar.txcnt = 0;
789 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
790 isar_fill_fifo(bcs);
791 } else {
792 if (test_and_clear_bit(BC_FLG_DLEETX, &bcs->Flag)) {
793 if (test_and_clear_bit(BC_FLG_LASTDATA, &bcs->Flag)) {
794 if (test_and_clear_bit(BC_FLG_NMD_DATA, &bcs->Flag)) {
795 u_char dummy = 0;
796 sendmsg(bcs->cs, SET_DPS(bcs->hw.isar.dpath) |
797 ISAR_HIS_SDATA, 0x01, 1, &dummy);
798 }
799 test_and_set_bit(BC_FLG_LL_OK, &bcs->Flag);
800 } else {
801 schedule_event(bcs, B_LL_CONNECT);
802 }
803 }
804 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
805 schedule_event(bcs, B_XMTBUFREADY);
806 }
807 }
808
809 static inline void
810 check_send(struct IsdnCardState *cs, u_char rdm)
811 {
812 struct BCState *bcs;
813
814 if (rdm & BSTAT_RDM1) {
815 if ((bcs = sel_bcs_isar(cs, 1))) {
816 if (bcs->mode) {
817 send_frames(bcs);
818 }
819 }
820 }
821 if (rdm & BSTAT_RDM2) {
822 if ((bcs = sel_bcs_isar(cs, 2))) {
823 if (bcs->mode) {
824 send_frames(bcs);
825 }
826 }
827 }
828
829 }
830
831 static const char *dmril[] = {"NO SPEED", "1200/75", "NODEF2", "75/1200",
832 "NODEF4", "300", "600", "1200", "2400",
833 "4800", "7200", "9600nt", "9600t", "12000",
834 "14400", "WRONG"};
835 static const char *dmrim[] = {"NO MOD", "NO DEF", "V32/V32b", "V22", "V21",
836 "Bell103", "V23", "Bell202", "V17", "V29",
837 "V27ter"};
838
839 static void
840 isar_pump_status_rsp(struct BCState *bcs, struct isar_reg *ireg) {
841 struct IsdnCardState *cs = bcs->cs;
842 u_char ril = ireg->par[0];
843 u_char rim;
844
845 if (!test_and_clear_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags))
846 return;
847 if (ril > 14) {
848 if (cs->debug & L1_DEB_WARN)
849 debugl1(cs, "wrong pstrsp ril=%d",ril);
850 ril = 15;
851 }
852 switch(ireg->par[1]) {
853 case 0:
854 rim = 0;
855 break;
856 case 0x20:
857 rim = 2;
858 break;
859 case 0x40:
860 rim = 3;
861 break;
862 case 0x41:
863 rim = 4;
864 break;
865 case 0x51:
866 rim = 5;
867 break;
868 case 0x61:
869 rim = 6;
870 break;
871 case 0x71:
872 rim = 7;
873 break;
874 case 0x82:
875 rim = 8;
876 break;
877 case 0x92:
878 rim = 9;
879 break;
880 case 0xa2:
881 rim = 10;
882 break;
883 default:
884 rim = 1;
885 break;
886 }
887 sprintf(bcs->hw.isar.conmsg,"%s %s", dmril[ril], dmrim[rim]);
888 bcs->conmsg = bcs->hw.isar.conmsg;
889 if (cs->debug & L1_DEB_HSCX)
890 debugl1(cs, "pump strsp %s", bcs->conmsg);
891 }
892
893 static void
894 isar_pump_statev_modem(struct BCState *bcs, u_char devt) {
895 struct IsdnCardState *cs = bcs->cs;
896 u_char dps = SET_DPS(bcs->hw.isar.dpath);
897
898 switch(devt) {
899 case PSEV_10MS_TIMER:
900 if (cs->debug & L1_DEB_HSCX)
901 debugl1(cs, "pump stev TIMER");
902 break;
903 case PSEV_CON_ON:
904 if (cs->debug & L1_DEB_HSCX)
905 debugl1(cs, "pump stev CONNECT");
906 l1_msg_b(bcs->st, PH_ACTIVATE | REQUEST, NULL);
907 break;
908 case PSEV_CON_OFF:
909 if (cs->debug & L1_DEB_HSCX)
910 debugl1(cs, "pump stev NO CONNECT");
911 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
912 l1_msg_b(bcs->st, PH_DEACTIVATE | REQUEST, NULL);
913 break;
914 case PSEV_V24_OFF:
915 if (cs->debug & L1_DEB_HSCX)
916 debugl1(cs, "pump stev V24 OFF");
917 break;
918 case PSEV_CTS_ON:
919 if (cs->debug & L1_DEB_HSCX)
920 debugl1(cs, "pump stev CTS ON");
921 break;
922 case PSEV_CTS_OFF:
923 if (cs->debug & L1_DEB_HSCX)
924 debugl1(cs, "pump stev CTS OFF");
925 break;
926 case PSEV_DCD_ON:
927 if (cs->debug & L1_DEB_HSCX)
928 debugl1(cs, "pump stev CARRIER ON");
929 test_and_set_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags);
930 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
931 break;
932 case PSEV_DCD_OFF:
933 if (cs->debug & L1_DEB_HSCX)
934 debugl1(cs, "pump stev CARRIER OFF");
935 break;
936 case PSEV_DSR_ON:
937 if (cs->debug & L1_DEB_HSCX)
938 debugl1(cs, "pump stev DSR ON");
939 break;
940 case PSEV_DSR_OFF:
941 if (cs->debug & L1_DEB_HSCX)
942 debugl1(cs, "pump stev DSR_OFF");
943 break;
944 case PSEV_REM_RET:
945 if (cs->debug & L1_DEB_HSCX)
946 debugl1(cs, "pump stev REMOTE RETRAIN");
947 break;
948 case PSEV_REM_REN:
949 if (cs->debug & L1_DEB_HSCX)
950 debugl1(cs, "pump stev REMOTE RENEGOTIATE");
951 break;
952 case PSEV_GSTN_CLR:
953 if (cs->debug & L1_DEB_HSCX)
954 debugl1(cs, "pump stev GSTN CLEAR", devt);
955 break;
956 default:
957 if (cs->debug & L1_DEB_HSCX)
958 debugl1(cs, "unknown pump stev %x", devt);
959 break;
960 }
961 }
962
963 static void
964 ll_deliver_faxstat(struct BCState *bcs, u_char status)
965 {
966 isdn_ctrl ic;
967 struct Channel *chanp = (struct Channel *) bcs->st->lli.userdata;
968
969 if (bcs->cs->debug & L1_DEB_HSCX)
970 debugl1(bcs->cs, "HL->LL FAXIND %x", status);
971 ic.driver = bcs->cs->myid;
972 ic.command = ISDN_STAT_FAXIND;
973 ic.arg = chanp->chan;
974 ic.parm.aux.cmd = status;
975 bcs->cs->iif.statcallb(&ic);
976 }
977
978 static void
979 isar_pump_statev_fax(struct BCState *bcs, u_char devt) {
980 struct IsdnCardState *cs = bcs->cs;
981 u_char dps = SET_DPS(bcs->hw.isar.dpath);
982 u_char p1;
983
984 switch(devt) {
985 case PSEV_10MS_TIMER:
986 if (cs->debug & L1_DEB_HSCX)
987 debugl1(cs, "pump stev TIMER");
988 break;
989 case PSEV_RSP_READY:
990 if (cs->debug & L1_DEB_HSCX)
991 debugl1(cs, "pump stev RSP_READY");
992 bcs->hw.isar.state = STFAX_READY;
993 l1_msg_b(bcs->st, PH_ACTIVATE | REQUEST, NULL);
994 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) {
995 isar_pump_cmd(bcs, ISDN_FAX_CLASS1_FRH, 3);
996 } else {
997 isar_pump_cmd(bcs, ISDN_FAX_CLASS1_FTH, 3);
998 }
999 break;
1000 case PSEV_LINE_TX_H:
1001 if (bcs->hw.isar.state == STFAX_LINE) {
1002 if (cs->debug & L1_DEB_HSCX)
1003 debugl1(cs, "pump stev LINE_TX_H");
1004 bcs->hw.isar.state = STFAX_CONT;
1005 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1006 } else {
1007 if (cs->debug & L1_DEB_WARN)
1008 debugl1(cs, "pump stev LINE_TX_H wrong st %x",
1009 bcs->hw.isar.state);
1010 }
1011 break;
1012 case PSEV_LINE_RX_H:
1013 if (bcs->hw.isar.state == STFAX_LINE) {
1014 if (cs->debug & L1_DEB_HSCX)
1015 debugl1(cs, "pump stev LINE_RX_H");
1016 bcs->hw.isar.state = STFAX_CONT;
1017 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1018 } else {
1019 if (cs->debug & L1_DEB_WARN)
1020 debugl1(cs, "pump stev LINE_RX_H wrong st %x",
1021 bcs->hw.isar.state);
1022 }
1023 break;
1024 case PSEV_LINE_TX_B:
1025 if (bcs->hw.isar.state == STFAX_LINE) {
1026 if (cs->debug & L1_DEB_HSCX)
1027 debugl1(cs, "pump stev LINE_TX_B");
1028 bcs->hw.isar.state = STFAX_CONT;
1029 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1030 } else {
1031 if (cs->debug & L1_DEB_WARN)
1032 debugl1(cs, "pump stev LINE_TX_B wrong st %x",
1033 bcs->hw.isar.state);
1034 }
1035 break;
1036 case PSEV_LINE_RX_B:
1037 if (bcs->hw.isar.state == STFAX_LINE) {
1038 if (cs->debug & L1_DEB_HSCX)
1039 debugl1(cs, "pump stev LINE_RX_B");
1040 bcs->hw.isar.state = STFAX_CONT;
1041 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1042 } else {
1043 if (cs->debug & L1_DEB_WARN)
1044 debugl1(cs, "pump stev LINE_RX_B wrong st %x",
1045 bcs->hw.isar.state);
1046 }
1047 break;
1048 case PSEV_RSP_CONN:
1049 if (bcs->hw.isar.state == STFAX_CONT) {
1050 if (cs->debug & L1_DEB_HSCX)
1051 debugl1(cs, "pump stev RSP_CONN");
1052 bcs->hw.isar.state = STFAX_ACTIV;
1053 test_and_set_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags);
1054 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
1055 if (bcs->hw.isar.cmd == PCTRL_CMD_FTH) {
1056 /* 1s Flags before data */
1057 if (test_and_set_bit(BC_FLG_FTI_RUN, &bcs->Flag))
1058 del_timer(&bcs->hw.isar.ftimer);
1059 /* 1000 ms */
1060 bcs->hw.isar.ftimer.expires =
1061 jiffies + ((1000 * HZ)/1000);
1062 test_and_set_bit(BC_FLG_LL_CONN,
1063 &bcs->Flag);
1064 add_timer(&bcs->hw.isar.ftimer);
1065 } else {
1066 schedule_event(bcs, B_LL_CONNECT);
1067 }
1068 } else {
1069 if (cs->debug & L1_DEB_WARN)
1070 debugl1(cs, "pump stev RSP_CONN wrong st %x",
1071 bcs->hw.isar.state);
1072 }
1073 break;
1074 case PSEV_FLAGS_DET:
1075 if (cs->debug & L1_DEB_HSCX)
1076 debugl1(cs, "pump stev FLAGS_DET");
1077 break;
1078 case PSEV_RSP_DISC:
1079 if (cs->debug & L1_DEB_HSCX)
1080 debugl1(cs, "pump stev RSP_DISC");
1081 if (bcs->hw.isar.state == STFAX_ESCAPE) {
1082 p1 = 5;
1083 switch(bcs->hw.isar.newcmd) {
1084 case 0:
1085 bcs->hw.isar.state = STFAX_READY;
1086 break;
1087 case PCTRL_CMD_FTM:
1088 p1 = 2;
1089 case PCTRL_CMD_FTH:
1090 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL,
1091 PCTRL_CMD_SILON, 1, &p1);
1092 bcs->hw.isar.state = STFAX_SILDET;
1093 break;
1094 case PCTRL_CMD_FRM:
1095 if (frm_extra_delay)
1096 mdelay(frm_extra_delay);
1097 case PCTRL_CMD_FRH:
1098 p1 = bcs->hw.isar.mod = bcs->hw.isar.newmod;
1099 bcs->hw.isar.newmod = 0;
1100 bcs->hw.isar.cmd = bcs->hw.isar.newcmd;
1101 bcs->hw.isar.newcmd = 0;
1102 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL,
1103 bcs->hw.isar.cmd, 1, &p1);
1104 bcs->hw.isar.state = STFAX_LINE;
1105 bcs->hw.isar.try_mod = 3;
1106 break;
1107 default:
1108 if (cs->debug & L1_DEB_HSCX)
1109 debugl1(cs, "RSP_DISC unknown newcmd %x", bcs->hw.isar.newcmd);
1110 break;
1111 }
1112 } else if (bcs->hw.isar.state == STFAX_ACTIV) {
1113 if (test_and_clear_bit(BC_FLG_LL_OK, &bcs->Flag)) {
1114 schedule_event(bcs, B_LL_OK);
1115 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FRM) {
1116 send_DLE_ETX(bcs);
1117 schedule_event(bcs, B_LL_NOCARRIER);
1118 } else {
1119 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR);
1120 }
1121 bcs->hw.isar.state = STFAX_READY;
1122 } else {
1123 bcs->hw.isar.state = STFAX_READY;
1124 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR);
1125 }
1126 break;
1127 case PSEV_RSP_SILDET:
1128 if (cs->debug & L1_DEB_HSCX)
1129 debugl1(cs, "pump stev RSP_SILDET");
1130 if (bcs->hw.isar.state == STFAX_SILDET) {
1131 p1 = bcs->hw.isar.mod = bcs->hw.isar.newmod;
1132 bcs->hw.isar.newmod = 0;
1133 bcs->hw.isar.cmd = bcs->hw.isar.newcmd;
1134 bcs->hw.isar.newcmd = 0;
1135 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL,
1136 bcs->hw.isar.cmd, 1, &p1);
1137 bcs->hw.isar.state = STFAX_LINE;
1138 bcs->hw.isar.try_mod = 3;
1139 }
1140 break;
1141 case PSEV_RSP_SILOFF:
1142 if (cs->debug & L1_DEB_HSCX)
1143 debugl1(cs, "pump stev RSP_SILOFF");
1144 break;
1145 case PSEV_RSP_FCERR:
1146 if (bcs->hw.isar.state == STFAX_LINE) {
1147 if (cs->debug & L1_DEB_HSCX)
1148 debugl1(cs, "pump stev RSP_FCERR try %d",
1149 bcs->hw.isar.try_mod);
1150 if (bcs->hw.isar.try_mod--) {
1151 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL,
1152 bcs->hw.isar.cmd, 1,
1153 &bcs->hw.isar.mod);
1154 break;
1155 }
1156 }
1157 if (cs->debug & L1_DEB_HSCX)
1158 debugl1(cs, "pump stev RSP_FCERR");
1159 bcs->hw.isar.state = STFAX_ESCAPE;
1160 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 0, NULL);
1161 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR);
1162 break;
1163 default:
1164 break;
1165 }
1166 }
1167
1168 static char debbuf[128];
1169
1170 void
1171 isar_int_main(struct IsdnCardState *cs)
1172 {
1173 struct isar_reg *ireg = cs->bcs[0].hw.isar.reg;
1174 struct BCState *bcs;
1175
1176 get_irq_infos(cs, ireg);
1177 switch (ireg->iis & ISAR_IIS_MSCMSD) {
1178 case ISAR_IIS_RDATA:
1179 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) {
1180 isar_rcv_frame(cs, bcs);
1181 } else {
1182 debugl1(cs, "isar spurious IIS_RDATA %x/%x/%x",
1183 ireg->iis, ireg->cmsb, ireg->clsb);
1184 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1185 }
1186 break;
1187 case ISAR_IIS_GSTEV:
1188 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1189 ireg->bstat |= ireg->cmsb;
1190 check_send(cs, ireg->cmsb);
1191 break;
1192 case ISAR_IIS_BSTEV:
1193 #ifdef ERROR_STATISTIC
1194 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) {
1195 if (ireg->cmsb == BSTEV_TBO)
1196 bcs->err_tx++;
1197 if (ireg->cmsb == BSTEV_RBO)
1198 bcs->err_rdo++;
1199 }
1200 #endif
1201 if (cs->debug & L1_DEB_WARN)
1202 debugl1(cs, "Buffer STEV dpath%d msb(%x)",
1203 ireg->iis>>6, ireg->cmsb);
1204 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1205 break;
1206 case ISAR_IIS_PSTEV:
1207 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) {
1208 rcv_mbox(cs, ireg, (u_char *)ireg->par);
1209 if (bcs->mode == L1_MODE_V32) {
1210 isar_pump_statev_modem(bcs, ireg->cmsb);
1211 } else if (bcs->mode == L1_MODE_FAX) {
1212 isar_pump_statev_fax(bcs, ireg->cmsb);
1213 } else if (ireg->cmsb == PSEV_10MS_TIMER) {
1214 if (cs->debug & L1_DEB_HSCX)
1215 debugl1(cs, "pump stev TIMER");
1216 } else {
1217 if (cs->debug & L1_DEB_WARN)
1218 debugl1(cs, "isar IIS_PSTEV pmode %d stat %x",
1219 bcs->mode, ireg->cmsb);
1220 }
1221 } else {
1222 debugl1(cs, "isar spurious IIS_PSTEV %x/%x/%x",
1223 ireg->iis, ireg->cmsb, ireg->clsb);
1224 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1225 }
1226 break;
1227 case ISAR_IIS_PSTRSP:
1228 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) {
1229 rcv_mbox(cs, ireg, (u_char *)ireg->par);
1230 isar_pump_status_rsp(bcs, ireg);
1231 } else {
1232 debugl1(cs, "isar spurious IIS_PSTRSP %x/%x/%x",
1233 ireg->iis, ireg->cmsb, ireg->clsb);
1234 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1235 }
1236 break;
1237 case ISAR_IIS_DIAG:
1238 case ISAR_IIS_BSTRSP:
1239 case ISAR_IIS_IOM2RSP:
1240 rcv_mbox(cs, ireg, (u_char *)ireg->par);
1241 if ((cs->debug & (L1_DEB_HSCX | L1_DEB_HSCX_FIFO))
1242 == L1_DEB_HSCX) {
1243 u_char *tp=debbuf;
1244
1245 tp += sprintf(debbuf, "msg iis(%x) msb(%x)",
1246 ireg->iis, ireg->cmsb);
1247 QuickHex(tp, (u_char *)ireg->par, ireg->clsb);
1248 debugl1(cs, debbuf);
1249 }
1250 break;
1251 case ISAR_IIS_INVMSG:
1252 rcv_mbox(cs, ireg, debbuf);
1253 if (cs->debug & L1_DEB_WARN)
1254 debugl1(cs, "invalid msg his:%x",
1255 ireg->cmsb);
1256 break;
1257 default:
1258 rcv_mbox(cs, ireg, debbuf);
1259 if (cs->debug & L1_DEB_WARN)
1260 debugl1(cs, "unhandled msg iis(%x) ctrl(%x/%x)",
1261 ireg->iis, ireg->cmsb, ireg->clsb);
1262 break;
1263 }
1264 }
1265
1266 static void
1267 ftimer_handler(struct BCState *bcs) {
1268 if (bcs->cs->debug)
1269 debugl1(bcs->cs, "ftimer flags %04x",
1270 bcs->Flag);
1271 test_and_clear_bit(BC_FLG_FTI_RUN, &bcs->Flag);
1272 if (test_and_clear_bit(BC_FLG_LL_CONN, &bcs->Flag)) {
1273 schedule_event(bcs, B_LL_CONNECT);
1274 }
1275 if (test_and_clear_bit(BC_FLG_FTI_FTS, &bcs->Flag)) {
1276 schedule_event(bcs, B_LL_OK);
1277 }
1278 }
1279
1280 static void
1281 setup_pump(struct BCState *bcs) {
1282 struct IsdnCardState *cs = bcs->cs;
1283 u_char dps = SET_DPS(bcs->hw.isar.dpath);
1284 u_char ctrl, param[6];
1285
1286 switch (bcs->mode) {
1287 case L1_MODE_NULL:
1288 case L1_MODE_TRANS:
1289 case L1_MODE_HDLC:
1290 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, PMOD_BYPASS, 0, NULL);
1291 break;
1292 case L1_MODE_V32:
1293 ctrl = PMOD_DATAMODEM;
1294 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) {
1295 ctrl |= PCTRL_ORIG;
1296 param[5] = PV32P6_CTN;
1297 } else {
1298 param[5] = PV32P6_ATN;
1299 }
1300 param[0] = para_TOA; /* 6 db */
1301 param[1] = PV32P2_V23R | PV32P2_V22A | PV32P2_V22B |
1302 PV32P2_V22C | PV32P2_V21 | PV32P2_BEL;
1303 param[2] = PV32P3_AMOD | PV32P3_V32B | PV32P3_V23B;
1304 param[3] = PV32P4_UT144;
1305 param[4] = PV32P5_UT144;
1306 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, ctrl, 6, param);
1307 break;
1308 case L1_MODE_FAX:
1309 ctrl = PMOD_FAX;
1310 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) {
1311 ctrl |= PCTRL_ORIG;
1312 param[1] = PFAXP2_CTN;
1313 } else {
1314 param[1] = PFAXP2_ATN;
1315 }
1316 param[0] = para_TOA; /* 6 db */
1317 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, ctrl, 2, param);
1318 bcs->hw.isar.state = STFAX_NULL;
1319 bcs->hw.isar.newcmd = 0;
1320 bcs->hw.isar.newmod = 0;
1321 test_and_set_bit(BC_FLG_FTI_RUN, &bcs->Flag);
1322 break;
1323 }
1324 udelay(1000);
1325 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
1326 udelay(1000);
1327 }
1328
1329 static void
1330 setup_sart(struct BCState *bcs) {
1331 struct IsdnCardState *cs = bcs->cs;
1332 u_char dps = SET_DPS(bcs->hw.isar.dpath);
1333 u_char ctrl, param[2];
1334
1335 switch (bcs->mode) {
1336 case L1_MODE_NULL:
1337 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_DISABLE, 0,
1338 NULL);
1339 break;
1340 case L1_MODE_TRANS:
1341 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_BINARY, 2,
1342 "\0\0");
1343 break;
1344 case L1_MODE_HDLC:
1345 param[0] = 0;
1346 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_HDLC, 1,
1347 param);
1348 break;
1349 case L1_MODE_V32:
1350 ctrl = SMODE_V14 | SCTRL_HDMC_BOTH;
1351 param[0] = S_P1_CHS_8;
1352 param[1] = S_P2_BFT_DEF;
1353 sendmsg(cs, dps | ISAR_HIS_SARTCFG, ctrl, 2,
1354 param);
1355 break;
1356 case L1_MODE_FAX:
1357 /* SART must not configured with FAX */
1358 break;
1359 }
1360 udelay(1000);
1361 sendmsg(cs, dps | ISAR_HIS_BSTREQ, 0, 0, NULL);
1362 udelay(1000);
1363 }
1364
1365 static void
1366 setup_iom2(struct BCState *bcs) {
1367 struct IsdnCardState *cs = bcs->cs;
1368 u_char dps = SET_DPS(bcs->hw.isar.dpath);
1369 u_char cmsb = IOM_CTRL_ENA, msg[5] = {IOM_P1_TXD,0,0,0,0};
1370
1371 if (bcs->channel)
1372 msg[1] = msg[3] = 1;
1373 switch (bcs->mode) {
1374 case L1_MODE_NULL:
1375 cmsb = 0;
1376 /* dummy slot */
1377 msg[1] = msg[3] = bcs->hw.isar.dpath + 2;
1378 break;
1379 case L1_MODE_TRANS:
1380 case L1_MODE_HDLC:
1381 break;
1382 case L1_MODE_V32:
1383 case L1_MODE_FAX:
1384 cmsb |= IOM_CTRL_ALAW | IOM_CTRL_RCV;
1385 break;
1386 }
1387 sendmsg(cs, dps | ISAR_HIS_IOM2CFG, cmsb, 5, msg);
1388 udelay(1000);
1389 sendmsg(cs, dps | ISAR_HIS_IOM2REQ, 0, 0, NULL);
1390 udelay(1000);
1391 }
1392
1393 static int
1394 modeisar(struct BCState *bcs, int mode, int bc)
1395 {
1396 struct IsdnCardState *cs = bcs->cs;
1397
1398 /* Here we are selecting the best datapath for requested mode */
1399 if(bcs->mode == L1_MODE_NULL) { /* New Setup */
1400 bcs->channel = bc;
1401 switch (mode) {
1402 case L1_MODE_NULL: /* init */
1403 if (!bcs->hw.isar.dpath)
1404 /* no init for dpath 0 */
1405 return(0);
1406 break;
1407 case L1_MODE_TRANS:
1408 case L1_MODE_HDLC:
1409 /* best is datapath 2 */
1410 if (!test_and_set_bit(ISAR_DP2_USE,
1411 &bcs->hw.isar.reg->Flags))
1412 bcs->hw.isar.dpath = 2;
1413 else if (!test_and_set_bit(ISAR_DP1_USE,
1414 &bcs->hw.isar.reg->Flags))
1415 bcs->hw.isar.dpath = 1;
1416 else {
1417 printk(KERN_WARNING"isar modeisar both pathes in use\n");
1418 return(1);
1419 }
1420 break;
1421 case L1_MODE_V32:
1422 case L1_MODE_FAX:
1423 /* only datapath 1 */
1424 if (!test_and_set_bit(ISAR_DP1_USE,
1425 &bcs->hw.isar.reg->Flags))
1426 bcs->hw.isar.dpath = 1;
1427 else {
1428 printk(KERN_WARNING"isar modeisar analog funktions only with DP1\n");
1429 debugl1(cs, "isar modeisar analog funktions only with DP1");
1430 return(1);
1431 }
1432 break;
1433 }
1434 }
1435 if (cs->debug & L1_DEB_HSCX)
1436 debugl1(cs, "isar dp%d mode %d->%d ichan %d",
1437 bcs->hw.isar.dpath, bcs->mode, mode, bc);
1438 bcs->mode = mode;
1439 setup_pump(bcs);
1440 setup_iom2(bcs);
1441 setup_sart(bcs);
1442 if (bcs->mode == L1_MODE_NULL) {
1443 /* Clear resources */
1444 if (bcs->hw.isar.dpath == 1)
1445 test_and_clear_bit(ISAR_DP1_USE, &bcs->hw.isar.reg->Flags);
1446 else if (bcs->hw.isar.dpath == 2)
1447 test_and_clear_bit(ISAR_DP2_USE, &bcs->hw.isar.reg->Flags);
1448 bcs->hw.isar.dpath = 0;
1449 }
1450 return(0);
1451 }
1452
1453 static void
1454 isar_pump_cmd(struct BCState *bcs, u_char cmd, u_char para)
1455 {
1456 struct IsdnCardState *cs = bcs->cs;
1457 u_char dps = SET_DPS(bcs->hw.isar.dpath);
1458 u_char ctrl = 0, nom = 0, p1 = 0;
1459
1460 switch(cmd) {
1461 case ISDN_FAX_CLASS1_FTM:
1462 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag);
1463 if (bcs->hw.isar.state == STFAX_READY) {
1464 p1 = para;
1465 ctrl = PCTRL_CMD_FTM;
1466 nom = 1;
1467 bcs->hw.isar.state = STFAX_LINE;
1468 bcs->hw.isar.cmd = ctrl;
1469 bcs->hw.isar.mod = para;
1470 bcs->hw.isar.newmod = 0;
1471 bcs->hw.isar.newcmd = 0;
1472 bcs->hw.isar.try_mod = 3;
1473 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1474 (bcs->hw.isar.cmd == PCTRL_CMD_FTM) &&
1475 (bcs->hw.isar.mod == para)) {
1476 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1477 } else {
1478 bcs->hw.isar.newmod = para;
1479 bcs->hw.isar.newcmd = PCTRL_CMD_FTM;
1480 nom = 0;
1481 ctrl = PCTRL_CMD_ESC;
1482 bcs->hw.isar.state = STFAX_ESCAPE;
1483 }
1484 break;
1485 case ISDN_FAX_CLASS1_FTH:
1486 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag);
1487 if (bcs->hw.isar.state == STFAX_READY) {
1488 p1 = para;
1489 ctrl = PCTRL_CMD_FTH;
1490 nom = 1;
1491 bcs->hw.isar.state = STFAX_LINE;
1492 bcs->hw.isar.cmd = ctrl;
1493 bcs->hw.isar.mod = para;
1494 bcs->hw.isar.newmod = 0;
1495 bcs->hw.isar.newcmd = 0;
1496 bcs->hw.isar.try_mod = 3;
1497 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1498 (bcs->hw.isar.cmd == PCTRL_CMD_FTH) &&
1499 (bcs->hw.isar.mod == para)) {
1500 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1501 } else {
1502 bcs->hw.isar.newmod = para;
1503 bcs->hw.isar.newcmd = PCTRL_CMD_FTH;
1504 nom = 0;
1505 ctrl = PCTRL_CMD_ESC;
1506 bcs->hw.isar.state = STFAX_ESCAPE;
1507 }
1508 break;
1509 case ISDN_FAX_CLASS1_FRM:
1510 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag);
1511 if (bcs->hw.isar.state == STFAX_READY) {
1512 p1 = para;
1513 ctrl = PCTRL_CMD_FRM;
1514 nom = 1;
1515 bcs->hw.isar.state = STFAX_LINE;
1516 bcs->hw.isar.cmd = ctrl;
1517 bcs->hw.isar.mod = para;
1518 bcs->hw.isar.newmod = 0;
1519 bcs->hw.isar.newcmd = 0;
1520 bcs->hw.isar.try_mod = 3;
1521 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1522 (bcs->hw.isar.cmd == PCTRL_CMD_FRM) &&
1523 (bcs->hw.isar.mod == para)) {
1524 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1525 } else {
1526 bcs->hw.isar.newmod = para;
1527 bcs->hw.isar.newcmd = PCTRL_CMD_FRM;
1528 nom = 0;
1529 ctrl = PCTRL_CMD_ESC;
1530 bcs->hw.isar.state = STFAX_ESCAPE;
1531 }
1532 break;
1533 case ISDN_FAX_CLASS1_FRH:
1534 test_and_set_bit(BC_FLG_FRH_WAIT, &bcs->Flag);
1535 if (bcs->hw.isar.state == STFAX_READY) {
1536 p1 = para;
1537 ctrl = PCTRL_CMD_FRH;
1538 nom = 1;
1539 bcs->hw.isar.state = STFAX_LINE;
1540 bcs->hw.isar.cmd = ctrl;
1541 bcs->hw.isar.mod = para;
1542 bcs->hw.isar.newmod = 0;
1543 bcs->hw.isar.newcmd = 0;
1544 bcs->hw.isar.try_mod = 3;
1545 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1546 (bcs->hw.isar.cmd == PCTRL_CMD_FRH) &&
1547 (bcs->hw.isar.mod == para)) {
1548 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1549 } else {
1550 bcs->hw.isar.newmod = para;
1551 bcs->hw.isar.newcmd = PCTRL_CMD_FRH;
1552 nom = 0;
1553 ctrl = PCTRL_CMD_ESC;
1554 bcs->hw.isar.state = STFAX_ESCAPE;
1555 }
1556 break;
1557 case ISDN_FAXPUMP_HALT:
1558 bcs->hw.isar.state = STFAX_NULL;
1559 nom = 0;
1560 ctrl = PCTRL_CMD_HALT;
1561 break;
1562 }
1563 if (ctrl)
1564 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, ctrl, nom, &p1);
1565 }
1566
1567 static void
1568 isar_setup(struct IsdnCardState *cs)
1569 {
1570 u_char msg;
1571 int i;
1572
1573 /* Dpath 1, 2 */
1574 msg = 61;
1575 for (i=0; i<2; i++) {
1576 /* Buffer Config */
1577 sendmsg(cs, (i ? ISAR_HIS_DPS2 : ISAR_HIS_DPS1) |
1578 ISAR_HIS_P12CFG, 4, 1, &msg);
1579 cs->bcs[i].hw.isar.mml = msg;
1580 cs->bcs[i].mode = 0;
1581 cs->bcs[i].hw.isar.dpath = i + 1;
1582 modeisar(&cs->bcs[i], 0, 0);
1583 INIT_WORK(&cs->bcs[i].tqueue, (void *)(void *) isar_bh, &cs->bcs[i]);
1584 }
1585 }
1586
1587 static void
1588 isar_l2l1(struct PStack *st, int pr, void *arg)
1589 {
1590 struct BCState *bcs = st->l1.bcs;
1591 struct sk_buff *skb = arg;
1592 int ret;
1593 u_long flags;
1594
1595 switch (pr) {
1596 case (PH_DATA | REQUEST):
1597 spin_lock_irqsave(&bcs->cs->lock, flags);
1598 if (bcs->tx_skb) {
1599 skb_queue_tail(&bcs->squeue, skb);
1600 } else {
1601 bcs->tx_skb = skb;
1602 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
1603 if (bcs->cs->debug & L1_DEB_HSCX)
1604 debugl1(bcs->cs, "DRQ set BC_FLG_BUSY");
1605 bcs->hw.isar.txcnt = 0;
1606 bcs->cs->BC_Send_Data(bcs);
1607 }
1608 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1609 break;
1610 case (PH_PULL | INDICATION):
1611 spin_lock_irqsave(&bcs->cs->lock, flags);
1612 if (bcs->tx_skb) {
1613 printk(KERN_WARNING "isar_l2l1: this shouldn't happen\n");
1614 } else {
1615 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
1616 if (bcs->cs->debug & L1_DEB_HSCX)
1617 debugl1(bcs->cs, "PUI set BC_FLG_BUSY");
1618 bcs->tx_skb = skb;
1619 bcs->hw.isar.txcnt = 0;
1620 bcs->cs->BC_Send_Data(bcs);
1621 }
1622 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1623 break;
1624 case (PH_PULL | REQUEST):
1625 if (!bcs->tx_skb) {
1626 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
1627 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
1628 } else
1629 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
1630 break;
1631 case (PH_ACTIVATE | REQUEST):
1632 spin_lock_irqsave(&bcs->cs->lock, flags);
1633 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
1634 bcs->hw.isar.conmsg[0] = 0;
1635 if (test_bit(FLG_ORIG, &st->l2.flag))
1636 test_and_set_bit(BC_FLG_ORIG, &bcs->Flag);
1637 else
1638 test_and_clear_bit(BC_FLG_ORIG, &bcs->Flag);
1639 switch(st->l1.mode) {
1640 case L1_MODE_TRANS:
1641 case L1_MODE_HDLC:
1642 ret = modeisar(bcs, st->l1.mode, st->l1.bc);
1643 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1644 if (ret)
1645 l1_msg_b(st, PH_DEACTIVATE | REQUEST, arg);
1646 else
1647 l1_msg_b(st, PH_ACTIVATE | REQUEST, arg);
1648 break;
1649 case L1_MODE_V32:
1650 case L1_MODE_FAX:
1651 ret = modeisar(bcs, st->l1.mode, st->l1.bc);
1652 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1653 if (ret)
1654 l1_msg_b(st, PH_DEACTIVATE | REQUEST, arg);
1655 break;
1656 default:
1657 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1658 break;
1659 }
1660 break;
1661 case (PH_DEACTIVATE | REQUEST):
1662 l1_msg_b(st, pr, arg);
1663 break;
1664 case (PH_DEACTIVATE | CONFIRM):
1665 spin_lock_irqsave(&bcs->cs->lock, flags);
1666 switch(st->l1.mode) {
1667 case L1_MODE_TRANS:
1668 case L1_MODE_HDLC:
1669 case L1_MODE_V32:
1670 break;
1671 case L1_MODE_FAX:
1672 isar_pump_cmd(bcs, ISDN_FAXPUMP_HALT, 0);
1673 break;
1674 }
1675 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
1676 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
1677 if (bcs->cs->debug & L1_DEB_HSCX)
1678 debugl1(bcs->cs, "PDAC clear BC_FLG_BUSY");
1679 modeisar(bcs, 0, st->l1.bc);
1680 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1681 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
1682 break;
1683 }
1684 }
1685
1686 static void
1687 close_isarstate(struct BCState *bcs)
1688 {
1689 modeisar(bcs, 0, bcs->channel);
1690 if (test_and_clear_bit(BC_FLG_INIT, &bcs->Flag)) {
1691 if (bcs->hw.isar.rcvbuf) {
1692 kfree(bcs->hw.isar.rcvbuf);
1693 bcs->hw.isar.rcvbuf = NULL;
1694 }
1695 skb_queue_purge(&bcs->rqueue);
1696 skb_queue_purge(&bcs->squeue);
1697 if (bcs->tx_skb) {
1698 dev_kfree_skb_any(bcs->tx_skb);
1699 bcs->tx_skb = NULL;
1700 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
1701 if (bcs->cs->debug & L1_DEB_HSCX)
1702 debugl1(bcs->cs, "closeisar clear BC_FLG_BUSY");
1703 }
1704 }
1705 del_timer(&bcs->hw.isar.ftimer);
1706 }
1707
1708 static int
1709 open_isarstate(struct IsdnCardState *cs, struct BCState *bcs)
1710 {
1711 if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
1712 if (!(bcs->hw.isar.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) {
1713 printk(KERN_WARNING
1714 "HiSax: No memory for isar.rcvbuf\n");
1715 return (1);
1716 }
1717 skb_queue_head_init(&bcs->rqueue);
1718 skb_queue_head_init(&bcs->squeue);
1719 }
1720 bcs->tx_skb = NULL;
1721 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
1722 if (cs->debug & L1_DEB_HSCX)
1723 debugl1(cs, "openisar clear BC_FLG_BUSY");
1724 bcs->event = 0;
1725 bcs->hw.isar.rcvidx = 0;
1726 bcs->tx_cnt = 0;
1727 return (0);
1728 }
1729
1730 static int
1731 setstack_isar(struct PStack *st, struct BCState *bcs)
1732 {
1733 bcs->channel = st->l1.bc;
1734 if (open_isarstate(st->l1.hardware, bcs))
1735 return (-1);
1736 st->l1.bcs = bcs;
1737 st->l2.l2l1 = isar_l2l1;
1738 setstack_manager(st);
1739 bcs->st = st;
1740 setstack_l1_B(st);
1741 return (0);
1742 }
1743
1744 int
1745 isar_auxcmd(struct IsdnCardState *cs, isdn_ctrl *ic) {
1746 u_long adr;
1747 int features, i;
1748 struct BCState *bcs;
1749
1750 if (cs->debug & L1_DEB_HSCX)
1751 debugl1(cs, "isar_auxcmd cmd/ch %x/%d", ic->command, ic->arg);
1752 switch (ic->command) {
1753 case (ISDN_CMD_FAXCMD):
1754 bcs = cs->channel[ic->arg].bcs;
1755 if (cs->debug & L1_DEB_HSCX)
1756 debugl1(cs, "isar_auxcmd cmd/subcmd %d/%d",
1757 ic->parm.aux.cmd, ic->parm.aux.subcmd);
1758 switch(ic->parm.aux.cmd) {
1759 case ISDN_FAX_CLASS1_CTRL:
1760 if (ic->parm.aux.subcmd == ETX)
1761 test_and_set_bit(BC_FLG_DLEETX,
1762 &bcs->Flag);
1763 break;
1764 case ISDN_FAX_CLASS1_FTS:
1765 if (ic->parm.aux.subcmd == AT_QUERY) {
1766 ic->command = ISDN_STAT_FAXIND;
1767 ic->parm.aux.cmd = ISDN_FAX_CLASS1_OK;
1768 cs->iif.statcallb(ic);
1769 return(0);
1770 } else if (ic->parm.aux.subcmd == AT_EQ_QUERY) {
1771 strcpy(ic->parm.aux.para, "0-255");
1772 ic->command = ISDN_STAT_FAXIND;
1773 ic->parm.aux.cmd = ISDN_FAX_CLASS1_QUERY;
1774 cs->iif.statcallb(ic);
1775 return(0);
1776 } else if (ic->parm.aux.subcmd == AT_EQ_VALUE) {
1777 if (cs->debug & L1_DEB_HSCX)
1778 debugl1(cs, "isar_auxcmd %s=%d",
1779 FC1_CMD[ic->parm.aux.cmd], ic->parm.aux.para[0]);
1780 if (bcs->hw.isar.state == STFAX_READY) {
1781 if (! ic->parm.aux.para[0]) {
1782 ic->command = ISDN_STAT_FAXIND;
1783 ic->parm.aux.cmd = ISDN_FAX_CLASS1_OK;
1784 cs->iif.statcallb(ic);
1785 return(0);
1786 }
1787 if (! test_and_set_bit(BC_FLG_FTI_RUN, &bcs->Flag)) {
1788 /* n*10 ms */
1789 bcs->hw.isar.ftimer.expires =
1790 jiffies + ((ic->parm.aux.para[0] * 10 * HZ)/1000);
1791 test_and_set_bit(BC_FLG_FTI_FTS, &bcs->Flag);
1792 add_timer(&bcs->hw.isar.ftimer);
1793 return(0);
1794 } else {
1795 if (cs->debug)
1796 debugl1(cs, "isar FTS=%d and FTI busy",
1797 ic->parm.aux.para[0]);
1798 }
1799 } else {
1800 if (cs->debug)
1801 debugl1(cs, "isar FTS=%d and isar.state not ready(%x)",
1802 ic->parm.aux.para[0],bcs->hw.isar.state);
1803 }
1804 ic->command = ISDN_STAT_FAXIND;
1805 ic->parm.aux.cmd = ISDN_FAX_CLASS1_ERROR;
1806 cs->iif.statcallb(ic);
1807 }
1808 break;
1809 case ISDN_FAX_CLASS1_FRM:
1810 case ISDN_FAX_CLASS1_FRH:
1811 case ISDN_FAX_CLASS1_FTM:
1812 case ISDN_FAX_CLASS1_FTH:
1813 if (ic->parm.aux.subcmd == AT_QUERY) {
1814 sprintf(ic->parm.aux.para,
1815 "%d", bcs->hw.isar.mod);
1816 ic->command = ISDN_STAT_FAXIND;
1817 ic->parm.aux.cmd = ISDN_FAX_CLASS1_QUERY;
1818 cs->iif.statcallb(ic);
1819 return(0);
1820 } else if (ic->parm.aux.subcmd == AT_EQ_QUERY) {
1821 char *p = ic->parm.aux.para;
1822 for(i=0;i<FAXMODCNT;i++)
1823 if ((1<<i) & modmask)
1824 p += sprintf(p, "%d,", faxmodulation[i]);
1825 p--;
1826 *p=0;
1827 ic->command = ISDN_STAT_FAXIND;
1828 ic->parm.aux.cmd = ISDN_FAX_CLASS1_QUERY;
1829 cs->iif.statcallb(ic);
1830 return(0);
1831 } else if (ic->parm.aux.subcmd == AT_EQ_VALUE) {
1832 if (cs->debug & L1_DEB_HSCX)
1833 debugl1(cs, "isar_auxcmd %s=%d",
1834 FC1_CMD[ic->parm.aux.cmd], ic->parm.aux.para[0]);
1835 for(i=0;i<FAXMODCNT;i++)
1836 if (faxmodulation[i]==ic->parm.aux.para[0])
1837 break;
1838 if ((i < FAXMODCNT) && ((1<<i) & modmask) &&
1839 test_bit(BC_FLG_INIT, &bcs->Flag)) {
1840 isar_pump_cmd(bcs,
1841 ic->parm.aux.cmd,
1842 ic->parm.aux.para[0]);
1843 return(0);
1844 }
1845 }
1846 /* wrong modulation or not activ */
1847 /* fall through */
1848 default:
1849 ic->command = ISDN_STAT_FAXIND;
1850 ic->parm.aux.cmd = ISDN_FAX_CLASS1_ERROR;
1851 cs->iif.statcallb(ic);
1852 }
1853 break;
1854 case (ISDN_CMD_IOCTL):
1855 switch (ic->arg) {
1856 case 9: /* load firmware */
1857 features = ISDN_FEATURE_L2_MODEM |
1858 ISDN_FEATURE_L2_FAX |
1859 ISDN_FEATURE_L3_FCLASS1;
1860 memcpy(&adr, ic->parm.num, sizeof(ulong));
1861 if (isar_load_firmware(cs, (u_char __user *)adr))
1862 return(1);
1863 else
1864 ll_run(cs, features);
1865 break;
1866 case 20:
1867 features = *(unsigned int *) ic->parm.num;
1868 printk(KERN_DEBUG "HiSax: max modulation old(%04x) new(%04x)\n",
1869 modmask, features);
1870 modmask = features;
1871 break;
1872 case 21:
1873 features = *(unsigned int *) ic->parm.num;
1874 printk(KERN_DEBUG "HiSax: FRM extra delay old(%d) new(%d) ms\n",
1875 frm_extra_delay, features);
1876 if (features >= 0)
1877 frm_extra_delay = features;
1878 break;
1879 case 22:
1880 features = *(unsigned int *) ic->parm.num;
1881 printk(KERN_DEBUG "HiSax: TOA old(%d) new(%d) db\n",
1882 para_TOA, features);
1883 if (features >= 0 && features < 32)
1884 para_TOA = features;
1885 break;
1886 default:
1887 printk(KERN_DEBUG "HiSax: invalid ioctl %d\n",
1888 (int) ic->arg);
1889 return(-EINVAL);
1890 }
1891 break;
1892 default:
1893 return(-EINVAL);
1894 }
1895 return(0);
1896 }
1897
1898 void __devinit
1899 initisar(struct IsdnCardState *cs)
1900 {
1901 cs->bcs[0].BC_SetStack = setstack_isar;
1902 cs->bcs[1].BC_SetStack = setstack_isar;
1903 cs->bcs[0].BC_Close = close_isarstate;
1904 cs->bcs[1].BC_Close = close_isarstate;
1905 cs->bcs[0].hw.isar.ftimer.function = (void *) ftimer_handler;
1906 cs->bcs[0].hw.isar.ftimer.data = (long) &cs->bcs[0];
1907 init_timer(&cs->bcs[0].hw.isar.ftimer);
1908 cs->bcs[1].hw.isar.ftimer.function = (void *) ftimer_handler;
1909 cs->bcs[1].hw.isar.ftimer.data = (long) &cs->bcs[1];
1910 init_timer(&cs->bcs[1].hw.isar.ftimer);
1911 }
Linux with added FPC-III support