staging: rtl8188eu: rename HalSetBrateCfg() - style
[linux/fpc-iii.git] / drivers / crypto / ccree / cc_fips.h
blob645e096a7a823a5e8dbd3ea57b257cd868aef311
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (C) 2012-2018 ARM Limited or its affiliates. */
4 #ifndef __CC_FIPS_H__
5 #define __CC_FIPS_H__
7 #ifdef CONFIG_CRYPTO_FIPS
9 enum cc_fips_status {
10 CC_FIPS_SYNC_MODULE_OK = 0x0,
11 CC_FIPS_SYNC_MODULE_ERROR = 0x1,
12 CC_FIPS_SYNC_REE_STATUS = 0x4,
13 CC_FIPS_SYNC_TEE_STATUS = 0x8,
14 CC_FIPS_SYNC_STATUS_RESERVE32B = S32_MAX
17 int cc_fips_init(struct cc_drvdata *p_drvdata);
18 void cc_fips_fini(struct cc_drvdata *drvdata);
19 void fips_handler(struct cc_drvdata *drvdata);
20 void cc_set_ree_fips_status(struct cc_drvdata *drvdata, bool ok);
22 #else /* CONFIG_CRYPTO_FIPS */
24 static inline int cc_fips_init(struct cc_drvdata *p_drvdata)
26 return 0;
29 static inline void cc_fips_fini(struct cc_drvdata *drvdata) {}
30 static inline void cc_set_ree_fips_status(struct cc_drvdata *drvdata,
31 bool ok) {}
32 static inline void fips_handler(struct cc_drvdata *drvdata) {}
34 #endif /* CONFIG_CRYPTO_FIPS */
36 #endif /*__CC_FIPS_H__*/