staging: rtl8188eu: rename HalSetBrateCfg() - style
[linux/fpc-iii.git] / drivers / crypto / ccree / cc_sram_mgr.c
blobc8c276f6dee9619dad7b6eef9049f7ed05d0ff17
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2012-2018 ARM Limited or its affiliates. */
4 #include "cc_driver.h"
5 #include "cc_sram_mgr.h"
7 /**
8 * struct cc_sram_ctx -Internal RAM context manager
9 * @sram_free_offset: the offset to the non-allocated area
11 struct cc_sram_ctx {
12 cc_sram_addr_t sram_free_offset;
15 /**
16 * cc_sram_mgr_fini() - Cleanup SRAM pool.
18 * @drvdata: Associated device driver context
20 void cc_sram_mgr_fini(struct cc_drvdata *drvdata)
22 /* Free "this" context */
23 kfree(drvdata->sram_mgr_handle);
26 /**
27 * cc_sram_mgr_init() - Initializes SRAM pool.
28 * The pool starts right at the beginning of SRAM.
29 * Returns zero for success, negative value otherwise.
31 * @drvdata: Associated device driver context
33 int cc_sram_mgr_init(struct cc_drvdata *drvdata)
35 struct cc_sram_ctx *ctx;
36 dma_addr_t start = 0;
37 struct device *dev = drvdata_to_dev(drvdata);
39 if (drvdata->hw_rev < CC_HW_REV_712) {
40 /* Pool starts after ROM bytes */
41 start = (dma_addr_t)cc_ioread(drvdata,
42 CC_REG(HOST_SEP_SRAM_THRESHOLD));
44 if ((start & 0x3) != 0) {
45 dev_err(dev, "Invalid SRAM offset %pad\n", &start);
46 return -EINVAL;
50 /* Allocate "this" context */
51 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
53 if (!ctx)
54 return -ENOMEM;
56 ctx->sram_free_offset = start;
57 drvdata->sram_mgr_handle = ctx;
59 return 0;
62 /*!
63 * Allocated buffer from SRAM pool.
64 * Note: Caller is responsible to free the LAST allocated buffer.
65 * This function does not taking care of any fragmentation may occur
66 * by the order of calls to alloc/free.
68 * \param drvdata
69 * \param size The requested bytes to allocate
71 cc_sram_addr_t cc_sram_alloc(struct cc_drvdata *drvdata, u32 size)
73 struct cc_sram_ctx *smgr_ctx = drvdata->sram_mgr_handle;
74 struct device *dev = drvdata_to_dev(drvdata);
75 cc_sram_addr_t p;
77 if ((size & 0x3)) {
78 dev_err(dev, "Requested buffer size (%u) is not multiple of 4",
79 size);
80 return NULL_SRAM_ADDR;
82 if (size > (CC_CC_SRAM_SIZE - smgr_ctx->sram_free_offset)) {
83 dev_err(dev, "Not enough space to allocate %u B (at offset %llu)\n",
84 size, smgr_ctx->sram_free_offset);
85 return NULL_SRAM_ADDR;
88 p = smgr_ctx->sram_free_offset;
89 smgr_ctx->sram_free_offset += size;
90 dev_dbg(dev, "Allocated %u B @ %u\n", size, (unsigned int)p);
91 return p;
94 /**
95 * cc_set_sram_desc() - Create const descriptors sequence to
96 * set values in given array into SRAM.
97 * Note: each const value can't exceed word size.
99 * @src: A pointer to array of words to set as consts.
100 * @dst: The target SRAM buffer to set into
101 * @nelements: The number of words in "src" array
102 * @seq: A pointer to the given IN/OUT descriptor sequence
103 * @seq_len: A pointer to the given IN/OUT sequence length
105 void cc_set_sram_desc(const u32 *src, cc_sram_addr_t dst,
106 unsigned int nelement, struct cc_hw_desc *seq,
107 unsigned int *seq_len)
109 u32 i;
110 unsigned int idx = *seq_len;
112 for (i = 0; i < nelement; i++, idx++) {
113 hw_desc_init(&seq[idx]);
114 set_din_const(&seq[idx], src[i], sizeof(u32));
115 set_dout_sram(&seq[idx], dst + (i * sizeof(u32)), sizeof(u32));
116 set_flow_mode(&seq[idx], BYPASS);
119 *seq_len = idx;