staging: rtl8188eu: rename HalSetBrateCfg() - style
[linux/fpc-iii.git] / drivers / iio / adc / ad7266.c
blob605eb5e7e8291215e65f3d54b811e7b23cae44b1
1 /*
2 * AD7266/65 SPI ADC driver
4 * Copyright 2012 Analog Devices Inc.
6 * Licensed under the GPL-2.
7 */
9 #include <linux/device.h>
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
12 #include <linux/spi/spi.h>
13 #include <linux/regulator/consumer.h>
14 #include <linux/err.h>
15 #include <linux/gpio.h>
16 #include <linux/module.h>
18 #include <linux/interrupt.h>
20 #include <linux/iio/iio.h>
21 #include <linux/iio/buffer.h>
22 #include <linux/iio/trigger_consumer.h>
23 #include <linux/iio/triggered_buffer.h>
25 #include <linux/platform_data/ad7266.h>
27 struct ad7266_state {
28 struct spi_device *spi;
29 struct regulator *reg;
30 unsigned long vref_mv;
32 struct spi_transfer single_xfer[3];
33 struct spi_message single_msg;
35 enum ad7266_range range;
36 enum ad7266_mode mode;
37 bool fixed_addr;
38 struct gpio gpios[3];
41 * DMA (thus cache coherency maintenance) requires the
42 * transfer buffers to live in their own cache lines.
43 * The buffer needs to be large enough to hold two samples (4 bytes) and
44 * the naturally aligned timestamp (8 bytes).
46 struct {
47 __be16 sample[2];
48 s64 timestamp;
49 } data ____cacheline_aligned;
52 static int ad7266_wakeup(struct ad7266_state *st)
54 /* Any read with >= 2 bytes will wake the device */
55 return spi_read(st->spi, &st->data.sample[0], 2);
58 static int ad7266_powerdown(struct ad7266_state *st)
60 /* Any read with < 2 bytes will powerdown the device */
61 return spi_read(st->spi, &st->data.sample[0], 1);
64 static int ad7266_preenable(struct iio_dev *indio_dev)
66 struct ad7266_state *st = iio_priv(indio_dev);
67 return ad7266_wakeup(st);
70 static int ad7266_postdisable(struct iio_dev *indio_dev)
72 struct ad7266_state *st = iio_priv(indio_dev);
73 return ad7266_powerdown(st);
76 static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = {
77 .preenable = &ad7266_preenable,
78 .postenable = &iio_triggered_buffer_postenable,
79 .predisable = &iio_triggered_buffer_predisable,
80 .postdisable = &ad7266_postdisable,
83 static irqreturn_t ad7266_trigger_handler(int irq, void *p)
85 struct iio_poll_func *pf = p;
86 struct iio_dev *indio_dev = pf->indio_dev;
87 struct ad7266_state *st = iio_priv(indio_dev);
88 int ret;
90 ret = spi_read(st->spi, st->data.sample, 4);
91 if (ret == 0) {
92 iio_push_to_buffers_with_timestamp(indio_dev, &st->data,
93 pf->timestamp);
96 iio_trigger_notify_done(indio_dev->trig);
98 return IRQ_HANDLED;
101 static void ad7266_select_input(struct ad7266_state *st, unsigned int nr)
103 unsigned int i;
105 if (st->fixed_addr)
106 return;
108 switch (st->mode) {
109 case AD7266_MODE_SINGLE_ENDED:
110 nr >>= 1;
111 break;
112 case AD7266_MODE_PSEUDO_DIFF:
113 nr |= 1;
114 break;
115 case AD7266_MODE_DIFF:
116 nr &= ~1;
117 break;
120 for (i = 0; i < 3; ++i)
121 gpio_set_value(st->gpios[i].gpio, (bool)(nr & BIT(i)));
124 static int ad7266_update_scan_mode(struct iio_dev *indio_dev,
125 const unsigned long *scan_mask)
127 struct ad7266_state *st = iio_priv(indio_dev);
128 unsigned int nr = find_first_bit(scan_mask, indio_dev->masklength);
130 ad7266_select_input(st, nr);
132 return 0;
135 static int ad7266_read_single(struct ad7266_state *st, int *val,
136 unsigned int address)
138 int ret;
140 ad7266_select_input(st, address);
142 ret = spi_sync(st->spi, &st->single_msg);
143 *val = be16_to_cpu(st->data.sample[address % 2]);
145 return ret;
148 static int ad7266_read_raw(struct iio_dev *indio_dev,
149 struct iio_chan_spec const *chan, int *val, int *val2, long m)
151 struct ad7266_state *st = iio_priv(indio_dev);
152 unsigned long scale_mv;
153 int ret;
155 switch (m) {
156 case IIO_CHAN_INFO_RAW:
157 ret = iio_device_claim_direct_mode(indio_dev);
158 if (ret)
159 return ret;
160 ret = ad7266_read_single(st, val, chan->address);
161 iio_device_release_direct_mode(indio_dev);
163 *val = (*val >> 2) & 0xfff;
164 if (chan->scan_type.sign == 's')
165 *val = sign_extend32(*val, 11);
167 return IIO_VAL_INT;
168 case IIO_CHAN_INFO_SCALE:
169 scale_mv = st->vref_mv;
170 if (st->mode == AD7266_MODE_DIFF)
171 scale_mv *= 2;
172 if (st->range == AD7266_RANGE_2VREF)
173 scale_mv *= 2;
175 *val = scale_mv;
176 *val2 = chan->scan_type.realbits;
177 return IIO_VAL_FRACTIONAL_LOG2;
178 case IIO_CHAN_INFO_OFFSET:
179 if (st->range == AD7266_RANGE_2VREF &&
180 st->mode != AD7266_MODE_DIFF)
181 *val = 2048;
182 else
183 *val = 0;
184 return IIO_VAL_INT;
186 return -EINVAL;
189 #define AD7266_CHAN(_chan, _sign) { \
190 .type = IIO_VOLTAGE, \
191 .indexed = 1, \
192 .channel = (_chan), \
193 .address = (_chan), \
194 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
195 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
196 | BIT(IIO_CHAN_INFO_OFFSET), \
197 .scan_index = (_chan), \
198 .scan_type = { \
199 .sign = (_sign), \
200 .realbits = 12, \
201 .storagebits = 16, \
202 .shift = 2, \
203 .endianness = IIO_BE, \
204 }, \
207 #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS(_name, _sign) \
208 const struct iio_chan_spec ad7266_channels_##_name[] = { \
209 AD7266_CHAN(0, (_sign)), \
210 AD7266_CHAN(1, (_sign)), \
211 AD7266_CHAN(2, (_sign)), \
212 AD7266_CHAN(3, (_sign)), \
213 AD7266_CHAN(4, (_sign)), \
214 AD7266_CHAN(5, (_sign)), \
215 AD7266_CHAN(6, (_sign)), \
216 AD7266_CHAN(7, (_sign)), \
217 AD7266_CHAN(8, (_sign)), \
218 AD7266_CHAN(9, (_sign)), \
219 AD7266_CHAN(10, (_sign)), \
220 AD7266_CHAN(11, (_sign)), \
221 IIO_CHAN_SOFT_TIMESTAMP(13), \
224 #define AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(_name, _sign) \
225 const struct iio_chan_spec ad7266_channels_##_name##_fixed[] = { \
226 AD7266_CHAN(0, (_sign)), \
227 AD7266_CHAN(1, (_sign)), \
228 IIO_CHAN_SOFT_TIMESTAMP(2), \
231 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(u, 'u');
232 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(s, 's');
233 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(u, 'u');
234 static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(s, 's');
236 #define AD7266_CHAN_DIFF(_chan, _sign) { \
237 .type = IIO_VOLTAGE, \
238 .indexed = 1, \
239 .channel = (_chan) * 2, \
240 .channel2 = (_chan) * 2 + 1, \
241 .address = (_chan), \
242 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
243 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
244 | BIT(IIO_CHAN_INFO_OFFSET), \
245 .scan_index = (_chan), \
246 .scan_type = { \
247 .sign = _sign, \
248 .realbits = 12, \
249 .storagebits = 16, \
250 .shift = 2, \
251 .endianness = IIO_BE, \
252 }, \
253 .differential = 1, \
256 #define AD7266_DECLARE_DIFF_CHANNELS(_name, _sign) \
257 const struct iio_chan_spec ad7266_channels_diff_##_name[] = { \
258 AD7266_CHAN_DIFF(0, (_sign)), \
259 AD7266_CHAN_DIFF(1, (_sign)), \
260 AD7266_CHAN_DIFF(2, (_sign)), \
261 AD7266_CHAN_DIFF(3, (_sign)), \
262 AD7266_CHAN_DIFF(4, (_sign)), \
263 AD7266_CHAN_DIFF(5, (_sign)), \
264 IIO_CHAN_SOFT_TIMESTAMP(6), \
267 static AD7266_DECLARE_DIFF_CHANNELS(s, 's');
268 static AD7266_DECLARE_DIFF_CHANNELS(u, 'u');
270 #define AD7266_DECLARE_DIFF_CHANNELS_FIXED(_name, _sign) \
271 const struct iio_chan_spec ad7266_channels_diff_fixed_##_name[] = { \
272 AD7266_CHAN_DIFF(0, (_sign)), \
273 AD7266_CHAN_DIFF(1, (_sign)), \
274 IIO_CHAN_SOFT_TIMESTAMP(2), \
277 static AD7266_DECLARE_DIFF_CHANNELS_FIXED(s, 's');
278 static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');
280 static const struct iio_info ad7266_info = {
281 .read_raw = &ad7266_read_raw,
282 .update_scan_mode = &ad7266_update_scan_mode,
285 static const unsigned long ad7266_available_scan_masks[] = {
286 0x003,
287 0x00c,
288 0x030,
289 0x0c0,
290 0x300,
291 0xc00,
292 0x000,
295 static const unsigned long ad7266_available_scan_masks_diff[] = {
296 0x003,
297 0x00c,
298 0x030,
299 0x000,
302 static const unsigned long ad7266_available_scan_masks_fixed[] = {
303 0x003,
304 0x000,
307 struct ad7266_chan_info {
308 const struct iio_chan_spec *channels;
309 unsigned int num_channels;
310 const unsigned long *scan_masks;
313 #define AD7266_CHAN_INFO_INDEX(_differential, _signed, _fixed) \
314 (((_differential) << 2) | ((_signed) << 1) | ((_fixed) << 0))
316 static const struct ad7266_chan_info ad7266_chan_infos[] = {
317 [AD7266_CHAN_INFO_INDEX(0, 0, 0)] = {
318 .channels = ad7266_channels_u,
319 .num_channels = ARRAY_SIZE(ad7266_channels_u),
320 .scan_masks = ad7266_available_scan_masks,
322 [AD7266_CHAN_INFO_INDEX(0, 0, 1)] = {
323 .channels = ad7266_channels_u_fixed,
324 .num_channels = ARRAY_SIZE(ad7266_channels_u_fixed),
325 .scan_masks = ad7266_available_scan_masks_fixed,
327 [AD7266_CHAN_INFO_INDEX(0, 1, 0)] = {
328 .channels = ad7266_channels_s,
329 .num_channels = ARRAY_SIZE(ad7266_channels_s),
330 .scan_masks = ad7266_available_scan_masks,
332 [AD7266_CHAN_INFO_INDEX(0, 1, 1)] = {
333 .channels = ad7266_channels_s_fixed,
334 .num_channels = ARRAY_SIZE(ad7266_channels_s_fixed),
335 .scan_masks = ad7266_available_scan_masks_fixed,
337 [AD7266_CHAN_INFO_INDEX(1, 0, 0)] = {
338 .channels = ad7266_channels_diff_u,
339 .num_channels = ARRAY_SIZE(ad7266_channels_diff_u),
340 .scan_masks = ad7266_available_scan_masks_diff,
342 [AD7266_CHAN_INFO_INDEX(1, 0, 1)] = {
343 .channels = ad7266_channels_diff_fixed_u,
344 .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_u),
345 .scan_masks = ad7266_available_scan_masks_fixed,
347 [AD7266_CHAN_INFO_INDEX(1, 1, 0)] = {
348 .channels = ad7266_channels_diff_s,
349 .num_channels = ARRAY_SIZE(ad7266_channels_diff_s),
350 .scan_masks = ad7266_available_scan_masks_diff,
352 [AD7266_CHAN_INFO_INDEX(1, 1, 1)] = {
353 .channels = ad7266_channels_diff_fixed_s,
354 .num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_s),
355 .scan_masks = ad7266_available_scan_masks_fixed,
359 static void ad7266_init_channels(struct iio_dev *indio_dev)
361 struct ad7266_state *st = iio_priv(indio_dev);
362 bool is_differential, is_signed;
363 const struct ad7266_chan_info *chan_info;
364 int i;
366 is_differential = st->mode != AD7266_MODE_SINGLE_ENDED;
367 is_signed = (st->range == AD7266_RANGE_2VREF) |
368 (st->mode == AD7266_MODE_DIFF);
370 i = AD7266_CHAN_INFO_INDEX(is_differential, is_signed, st->fixed_addr);
371 chan_info = &ad7266_chan_infos[i];
373 indio_dev->channels = chan_info->channels;
374 indio_dev->num_channels = chan_info->num_channels;
375 indio_dev->available_scan_masks = chan_info->scan_masks;
376 indio_dev->masklength = chan_info->num_channels - 1;
379 static const char * const ad7266_gpio_labels[] = {
380 "AD0", "AD1", "AD2",
383 static int ad7266_probe(struct spi_device *spi)
385 struct ad7266_platform_data *pdata = spi->dev.platform_data;
386 struct iio_dev *indio_dev;
387 struct ad7266_state *st;
388 unsigned int i;
389 int ret;
391 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
392 if (indio_dev == NULL)
393 return -ENOMEM;
395 st = iio_priv(indio_dev);
397 st->reg = devm_regulator_get_optional(&spi->dev, "vref");
398 if (!IS_ERR(st->reg)) {
399 ret = regulator_enable(st->reg);
400 if (ret)
401 return ret;
403 ret = regulator_get_voltage(st->reg);
404 if (ret < 0)
405 goto error_disable_reg;
407 st->vref_mv = ret / 1000;
408 } else {
409 /* Any other error indicates that the regulator does exist */
410 if (PTR_ERR(st->reg) != -ENODEV)
411 return PTR_ERR(st->reg);
412 /* Use internal reference */
413 st->vref_mv = 2500;
416 if (pdata) {
417 st->fixed_addr = pdata->fixed_addr;
418 st->mode = pdata->mode;
419 st->range = pdata->range;
421 if (!st->fixed_addr) {
422 for (i = 0; i < ARRAY_SIZE(st->gpios); ++i) {
423 st->gpios[i].gpio = pdata->addr_gpios[i];
424 st->gpios[i].flags = GPIOF_OUT_INIT_LOW;
425 st->gpios[i].label = ad7266_gpio_labels[i];
427 ret = gpio_request_array(st->gpios,
428 ARRAY_SIZE(st->gpios));
429 if (ret)
430 goto error_disable_reg;
432 } else {
433 st->fixed_addr = true;
434 st->range = AD7266_RANGE_VREF;
435 st->mode = AD7266_MODE_DIFF;
438 spi_set_drvdata(spi, indio_dev);
439 st->spi = spi;
441 indio_dev->dev.parent = &spi->dev;
442 indio_dev->dev.of_node = spi->dev.of_node;
443 indio_dev->name = spi_get_device_id(spi)->name;
444 indio_dev->modes = INDIO_DIRECT_MODE;
445 indio_dev->info = &ad7266_info;
447 ad7266_init_channels(indio_dev);
449 /* wakeup */
450 st->single_xfer[0].rx_buf = &st->data.sample[0];
451 st->single_xfer[0].len = 2;
452 st->single_xfer[0].cs_change = 1;
453 /* conversion */
454 st->single_xfer[1].rx_buf = st->data.sample;
455 st->single_xfer[1].len = 4;
456 st->single_xfer[1].cs_change = 1;
457 /* powerdown */
458 st->single_xfer[2].tx_buf = &st->data.sample[0];
459 st->single_xfer[2].len = 1;
461 spi_message_init(&st->single_msg);
462 spi_message_add_tail(&st->single_xfer[0], &st->single_msg);
463 spi_message_add_tail(&st->single_xfer[1], &st->single_msg);
464 spi_message_add_tail(&st->single_xfer[2], &st->single_msg);
466 ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
467 &ad7266_trigger_handler, &iio_triggered_buffer_setup_ops);
468 if (ret)
469 goto error_free_gpios;
471 ret = iio_device_register(indio_dev);
472 if (ret)
473 goto error_buffer_cleanup;
475 return 0;
477 error_buffer_cleanup:
478 iio_triggered_buffer_cleanup(indio_dev);
479 error_free_gpios:
480 if (!st->fixed_addr)
481 gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
482 error_disable_reg:
483 if (!IS_ERR(st->reg))
484 regulator_disable(st->reg);
486 return ret;
489 static int ad7266_remove(struct spi_device *spi)
491 struct iio_dev *indio_dev = spi_get_drvdata(spi);
492 struct ad7266_state *st = iio_priv(indio_dev);
494 iio_device_unregister(indio_dev);
495 iio_triggered_buffer_cleanup(indio_dev);
496 if (!st->fixed_addr)
497 gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
498 if (!IS_ERR(st->reg))
499 regulator_disable(st->reg);
501 return 0;
504 static const struct spi_device_id ad7266_id[] = {
505 {"ad7265", 0},
506 {"ad7266", 0},
509 MODULE_DEVICE_TABLE(spi, ad7266_id);
511 static struct spi_driver ad7266_driver = {
512 .driver = {
513 .name = "ad7266",
515 .probe = ad7266_probe,
516 .remove = ad7266_remove,
517 .id_table = ad7266_id,
519 module_spi_driver(ad7266_driver);
521 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
522 MODULE_DESCRIPTION("Analog Devices AD7266/65 ADC");
523 MODULE_LICENSE("GPL v2");